CN113448785A

CN113448785A - Method, device and equipment for processing bandwidth state exception and readable medium

Info

Publication number: CN113448785A
Application number: CN202110594327.6A
Authority: CN
Inventors: 刘涛
Original assignee: Shandong Yingxin Computer Technology Co Ltd
Current assignee: Shandong Yingxin Computer Technology Co Ltd
Priority date: 2021-05-28
Filing date: 2021-05-28
Publication date: 2021-09-28
Anticipated expiration: 2041-05-28
Also published as: CN113448785B

Abstract

The invention discloses a processing method of bandwidth state exception, which comprises the following steps: reading the PCIE card state of the slot position through the CPLD, reading the bandwidth state information through the PCIE Switch, and judging whether the bandwidth state information is consistent with the PCIE card state; if not, unbundling the slot position and reconfiguring bandwidth state information based on the PCIE card state; sending command request content to the PCIE Switch, reading return data obtained by the PCIE Switch based on the command request content and executing the step circularly based on the return data; responding to the condition that the number of times of executing the last step in a circulating mode does not exceed the preset number of times of circulating, and continuously reading the returned data for three times to be consistent, considering that the returned data is successful, and further judging whether the current bandwidth state information is consistent with the state of the PCIE card or not based on the returned data; and if the current bandwidth state information is inconsistent with the PCIE card state, unbinding and reconfiguring the current bandwidth state information based on the PCIE card state. The invention also discloses a corresponding processing device, computer equipment and a readable storage medium.

Description

Method, device and equipment for processing bandwidth state exception and readable medium

Technical Field

The present invention relates to the field of server technologies, and in particular, to a method, an apparatus, a device, and a readable medium for handling a bandwidth status exception.

Background

In the server product, in order to improve the competitiveness of the product in the market and increase the product advantages, the high-performance server needs to support a plurality of x16 external PCIE cards to improve the flexible configuration of the product.

When the server is in use, once resource reading failure occurs, the server is unacceptable for the product of the server. Because in the server industry, the server product has the requirement of not being down and not losing data, which also means that the server product has extremely high requirement on stability.

At present, the BMC reads the external card status provided by the CPLD register, and if the bandwidth configuration information of the Switch read by the BMC is inconsistent with the external card information, the BMC performs unbundling on the current slot, and reconfigures the Switch and powers on the Switch again. The current slot unbinding and binding of the card only occur after the equipment is powered on for the first time and before the BMC starts and finishes scanning the PCIE resources by the BIOS, the whole equipment is not powered down, and the operation of the process cannot be triggered. However, during the restart of the operating system, the configured Switch may be abnormal, and the card is operated according to the PCIE resource allocated by the BIOS, and at this time, the system may not recognize the card because the configuration abnormal resource is unavailable. Therefore, the abnormal bandwidth function of the PCIE chip may affect the application manufacturer, which is not favorable for the enterprise to improve the competitiveness and reduce the detection efficiency and the yield of the product.

Disclosure of Invention

In view of this, an object of the embodiments of the present invention is to provide a method, an apparatus, a device, and a readable medium for processing a bandwidth status exception, which optimize a processing flow and reliability of read data, solve a problem of reducing stability of a server product due to instability of a third-party firmware chip, improve stability of the server product, avoid a serious card loss problem or other problems, even downtime, caused by data reception and data processing, and reduce labor cost and material cost of the product due to such problems.

Based on the above purpose, an aspect of the embodiments of the present invention provides a method for handling a bandwidth status exception, including the following steps: reading the PCIE card state of the slot position through the CPLD by the BMC, reading bandwidth state information through the PCIE Switch, and judging whether the bandwidth state information is consistent with the PCIE card state; if the bandwidth state information is inconsistent with the PCIE card state, the BMC unbinds the slot position and reconfigures the bandwidth state information based on the PCIE card state; the BMC sends command request content to the PCIE Switch, reads return data obtained by the PCIE Switch based on the command request content and circularly executes the step based on the return data; responding to the condition that the number of times of executing the last step in a circulating mode does not exceed the preset number of times of circulating, and continuously reading the returned data for three times to be consistent, considering that the returned data is successful, and further judging whether the current bandwidth state information is consistent with the PCIE card state or not based on the returned data; and if the current bandwidth state information is inconsistent with the PCIE card state, the BMC unbundles and reconfigures the current bandwidth state information based on the PCIE card state.

In some embodiments, sending, by the BMC, a command request content to the PCIE Switch, reading return data obtained by the PCIE Switch executing based on the command request content, and executing this step in a loop based on the return data includes: sending a command number to the PCIE Switch by the BMC, and judging whether the command number is sent successfully or not; if the command number is successfully sent, the BMC sends command request content corresponding to the command number to the PCIE Switch, and judges whether the command request content is successfully sent; if the command request content is successfully sent, the BMC queries whether the thread is successfully received from the PCIE Switch, and if the thread is successfully received, the BMC queries whether the command is successfully executed from the PCIE Switch; and if the command is successfully executed, reading data from the PCIE Switch by the BMC.

In some embodiments, further comprising: if the command number is not successfully sent, returning to the step of sending the command number to the PCIE Switch by the BMC; and if the command request content corresponding to the command number is not successfully sent, returning to the step of sending the command number to the PCIE Switch by the BMC.

In some embodiments, further comprising: if the thread receiving fails, the BMC queries whether the thread receiving is successful from the PCIE Switch again; and returning to the step of sending a command number to the PCIE Switch by the BMC in response to the number of times of executing the previous step exceeding three times.

In some embodiments, further comprising: if the command is being executed, the BMC queries whether the command is successfully executed from the PCIE Switch again; if the command execution fails, returning to the step of sending a command number to the PCIE Switch by the BMC.

In some embodiments, further comprising: and if the current bandwidth state information is consistent with the PCIE card state, skipping the steps of unbinding and binding.

In some embodiments, reading, by the BMC through the CPLD, the PCIE card status of the slot includes: and the BMC receives the slot position signal through the CPLD and reads the PCIE card state of the slot position based on the slot position signal, wherein the PCIE card state comprises an off-position state, an x8 card and an x16 card.

In another aspect of the embodiments of the present invention, a device for processing a bandwidth status exception is further provided, including: the first module is configured to read the PCIE card state of the slot position through the CPLD by the BMC, read bandwidth state information through the PCIE Switch, and judge whether the bandwidth state information is consistent with the PCIE card state; a second module configured to unbind the slot by the BMC and reconfigure the bandwidth state information based on the PCIE card state if the bandwidth state information is inconsistent with the PCIE card state; a third module, configured to send a command request content to the PCIE Switch by the BMC, and read return data obtained by the PCIE Switch executing based on the command request content; a fourth module, configured to respond that the number of times of executing the previous step in a loop does not exceed a preset number of loop times, and the returned data read for three consecutive times are consistent, consider that the returned data is successful, and further determine whether the current bandwidth state information is consistent with the PCIE card state based on the returned data; and a fifth module configured to, if the current bandwidth state information is inconsistent with the PCIE card state, unbundle by the BMC and reconfigure the current bandwidth state information based on the PCIE card state.

In another aspect of the embodiments of the present invention, there is also provided a computer device, including: at least one processor; and a memory storing computer instructions executable on the processor, the instructions when executed by the processor implementing method steps comprising: reading the PCIE card state of the slot position through the CPLD by the BMC, reading bandwidth state information through the PCIE Switch, and judging whether the bandwidth state information is consistent with the PCIE card state; if the bandwidth state information is inconsistent with the PCIE card state, the BMC unbinds the slot position and reconfigures the bandwidth state information based on the PCIE card state; the BMC sends command request content to the PCIE Switch, reads return data obtained by the PCIE Switch based on the command request content and circularly executes the module based on the return data; responding to the condition that the number of times of circularly executing the last module does not exceed the preset number of times of circulation and the returned data read for three continuous times are consistent, considering that the returned data are successful, and further judging whether the current bandwidth state information is consistent with the PCIE card state based on the returned data; and if the current bandwidth state information is inconsistent with the PCIE card state, the BMC unbundles and reconfigures the current bandwidth state information based on the PCIE card state.

In a further aspect of the embodiments of the present invention, a computer-readable storage medium is also provided, in which a computer program for implementing the above method steps is stored when the computer program is executed by a processor.

The invention has the following beneficial technical effects: the reliability of the processing flow and the read data and the abnormal processing scene are optimized, the problem that the stability of a server product is reduced due to the instability of a third-party firmware chip is solved, the stability of the server product is improved, the problem that a system is seriously lost due to data receiving and data processing or other problems or even downtime is avoided, and the labor cost and the material cost of the product due to the fact that the problem is solved.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other embodiments can be obtained by using the drawings without creative efforts.

FIG. 1 is a diagram illustrating a method for handling a bandwidth status exception according to an embodiment of the present invention;

FIG. 2 is a diagram of an embodiment of a device for handling a bandwidth status exception according to the present invention;

FIG. 3 is a schematic diagram of an embodiment of a computer device provided by the present invention;

FIG. 4 is a schematic diagram of an embodiment of a computer-readable storage medium provided by the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, the following embodiments of the present invention are described in further detail with reference to the accompanying drawings.

It should be noted that all expressions using "first" and "second" in the embodiments of the present invention are used for distinguishing two entities with the same name but different names or different parameters, and it should be noted that "first" and "second" are merely for convenience of description and should not be construed as limitations of the embodiments of the present invention, and they are not described in any more detail in the following embodiments.

In view of the foregoing, a first aspect of the embodiments of the present invention provides an embodiment of a method for handling a bandwidth status exception. Fig. 1 is a schematic diagram illustrating an embodiment of a method for handling a bandwidth status exception according to the present invention. As shown in fig. 1, the embodiment of the present invention includes the following steps:

s01, the BMC reads the PCIE card state of the slot position through the CPLD, reads the bandwidth state information through the PCIE Switch, and judges whether the bandwidth state information is consistent with the PCIE card state;

s02, if the bandwidth state information is inconsistent with the PCIE card state, unbundling the slot positions by the BMC and reconfiguring the bandwidth state information based on the PCIE card state;

s03, the BMC sends command request content to the PCIE Switch, reads return data obtained by the PCIE Switch based on the command request content and circularly executes the step based on the return data;

s04, responding to the fact that the number of times of executing the previous step in a circulating mode does not exceed the preset number of circulating times, and continuously reading the returned data for three times to be consistent, considering that the returned data are successful, and further judging whether the current bandwidth state information is consistent with the PCIE card state or not based on the returned data; and

and S05, if the current bandwidth state information is inconsistent with the PCIE card state, the BMC unbundles and reconfigures the current bandwidth state information based on the PCIE card state.

In this embodiment, the BMC reads the external plug-in card status provided by the CPLD register, which includes three statuses, i.e., no-bit status, x8 PCIE card and x16 PCIE card. After the BMC reads the PCIE card whose current slot is X16, the BMC reads the bandwidth configuration information of the Switch, the Switch returns that the PCIE card of the current slot is not X16, and the BMC performs unbinding of the PCIE card of the current slot, reconfigures the PCIE card to be a card of X16, and then powers on the card. The unbinding and binding of the current slot to the card only occur after the equipment is powered on for the first time, and the start of the BMC is completed before the BIOS scans the PCIE resources. The whole device is not powered down, and the process operation is not triggered. On the basis, exception flow processing for reading the x16 state of Switch by the BMC is added; increasing protocol format judgment of Switch return data; increasing the effectiveness judgment of the returned data by judgment; and (4) judging an abnormal scene after adding the returned data.

In this embodiment, the BMC first measures the state of the PCIE card in the current slot of the CPLD; the CPLD informs the BMC that the current slot position is X16; BMC instantiates Switch x16 status; the BMC reads exception handling of x16 state flow of Switch; and after the data is successfully returned, locally storing the data, continuously reading the data twice, if the data read three times is consistent, determining that the read data is correct, otherwise, circularly reading the data to ensure that the data read three times continuously are consistent, determining that the data read three times continuously are correct, and determining that the data read three times continuously are not consistent after the number of cycles reaches the maximum number, and determining that the data read is wrong.

In this embodiment, the returned data is successful and the data is in the x16 state, and this scene data indicates that the BMC has been correctly bound, and then the unbinding and binding are skipped; returning that the data is successful and the data is in an x8 state, wherein the scene data indicates that the BMC is not bound, and the BMC is unbound and bound; returning that the data was successful and the data was not in x16 or x8 states, this scenario indicates that Switch returned erroneous data, for which the BMC considered an exception scenario. BMC does not process; and when the data return fails, the scene indicates that the Switch returns error data, the BMC considers the scene as an abnormal scene, and the BMC does not process the abnormal scene.

In the embodiment, the data reliability is realized through a certain algorithm, the difficulty of the realization method is small, the problem of card loss caused by card insertion outside the server is reduced, and the stability is high, so that the stability of the service product is improved, and the labor cost and the material cost of the product caused by the occurrence of the problem are reduced. The problem of server product stability reduction caused by third party firmware chip instability is solved, the product stability of the server is improved, and the problem of serious card loss or other problems or even downtime caused by data receiving and data processing is avoided. The labor cost and the material cost of the product caused by the occurrence of the phenomenon are reduced.

In some embodiments of the present invention, sending, by the BMC, a command request content to the PCIE Switch, reading return data obtained by the PCIE Switch executing based on the command request content, and executing the step cyclically based on the return data includes: the BMC sends a command number to the PCIE Switch and judges whether the command number is sent successfully or not; if the command number is successfully sent, the BMC sends command request content corresponding to the command number to the PCIE Switch, and judges whether the command request content is successfully sent; if the command request content is successfully sent, the BMC queries whether the thread is successfully received from the PCIE Switch, and if the thread is successfully received, the BMC queries whether the command is successfully executed from the PCIE Switch; if the command is successfully executed, the BMC reads data from the PCIE Switch.

In this embodiment, the BMC sends a cmd command number to the Switch, and if the command is successfully sent, the next step is performed, otherwise, the BMC exits and initiates the flow again; the BMC sends command request content corresponding to the command number to the Switch, if the command request content is successfully sent, the next step is carried out, otherwise, the BMC exits, and the process is restarted; the BMC queries whether the thread of the Switch is successfully received or not from the Switch, the thread fails to receive, retries are carried out, the BMC exits when the third retries fail, and re-initiates the sending of the command to the Switch; the BMC inquires whether the command is successfully executed or not from the Switch, and the Switch returns that the command is failed to be executed, and then quits and restarts the initiating process; the Switch return command is being executed, the BMC waits for the execution, the query is carried out again, the execution of the Switch return command is successfully queried within the specified time, the next operation is carried out, otherwise, the BMC returns that the command is overtime, and the starting process is restarted; the BMC reads data from the Switch, and the return data includes the bandwidth state (X8/X16) of the PCIE card, the issued CMD command number, and the issued command request data.

In this embodiment, the BMC determines whether the returned command number is consistent with the issued command, and determines whether the returned request data is consistent with the issued request data. If the data are consistent, the returned bandwidth state data of the PCIE card is considered to be correct, otherwise, the data are judged to be failed, and the process is restarted.

In some embodiments of the invention, further comprising: if the command number is not successfully sent, returning to the step of sending the command number to the PCIE Switch by the BMC; and if the command request content corresponding to the command number is not successfully sent, returning to the step of sending the command number to the PCIE Switch by the BMC.

In some embodiments of the invention, further comprising: if the thread receiving fails, the BMC queries whether the thread receiving is successful from the PCIE Switch again; and in response to the number of times of executing the previous step exceeding three times, returning to the step of sending the command number to the PCIE Switch by the BMC.

In some embodiments of the invention, further comprising: if the command is being executed, the BMC queries whether the command is successfully executed from the PCIE Switch again; if the command fails to be executed, returning to the step of sending the command number to the PCIE Switch by the BMC.

In some embodiments of the invention, further comprising: and if the current bandwidth state information is consistent with the PCIE card state, skipping the steps of unbinding and binding.

In some embodiments of the present invention, the reading, by the BMC, the PCIE card state of the slot through the CPLD includes: and the BMC receives the slot position signal through the CPLD and reads the PCIE card state of the slot position based on the slot position signal, wherein the PCIE card state comprises an off-position state, an x8 card and an x16 card.

It should be particularly noted that, the steps in the embodiments of the processing method for a bandwidth status exception described above may be mutually intersected, replaced, added, or deleted, and therefore, the processing method for a bandwidth status exception based on these reasonable permutation and combination transformations shall also belong to the scope of the present invention, and shall not limit the scope of the present invention to the embodiments.

In view of the above object, according to a second aspect of the embodiments of the present invention, an apparatus for handling a bandwidth status exception is provided. Fig. 2 is a schematic diagram illustrating an embodiment of a device for handling a bandwidth status exception according to the present invention. As shown in fig. 2, the embodiment of the present invention includes the following modules: a first module S11, configured to read, by the BMC, the PCIE card state of the slot through the CPLD, and read bandwidth state information through the PCIE Switch, and determine whether the bandwidth state information is consistent with the PCIE card state; a second module S12 configured to, if the bandwidth state information is inconsistent with the PCIE card state, unbundle the slot by the BMC and reconfigure the bandwidth state information based on the PCIE card state; a third module S13, configured to send a command request content to the PCIE Switch by the BMC, read return data obtained by the PCIE Switch executing based on the command request content, and execute this module cyclically based on the return data; a fourth module S14, configured to respond that the number of times of executing the previous module in a loop does not exceed a preset number of cycles, and if the returned data read for three consecutive times are consistent, consider that the returned data is successful, and further determine whether the current bandwidth state information is consistent with the PCIE card state based on the returned data; and a fifth module S15 configured to, if the current bandwidth state information is inconsistent with the PCIE card state, unbundle by the BMC and reconfigure the current bandwidth state information based on the PCIE card state.

In view of the above object, a third aspect of the embodiments of the present invention provides a computer device. Fig. 3 is a schematic diagram of an embodiment of a computer device provided by the present invention. As shown in fig. 3, an embodiment of the present invention includes: at least one processor S21; and a memory S22, the memory S22 storing computer instructions S23 executable on the processor, the instructions when executed by the processor implementing method steps comprising: the BMC reads the PCIE card state of the slot position through the CPLD, reads the bandwidth state information through the PCIE Switch, and judges whether the bandwidth state information is consistent with the PCIE card state; if the bandwidth state information is inconsistent with the PCIE card state, the BMC unbundles the slot position and reconfigures the bandwidth state information based on the PCIE card state; the BMC sends command request content to the PCIE Switch, reads return data obtained by the PCIE Switch based on the command request content and circularly executes the step based on the return data; responding to the condition that the number of times of executing the last step in a circulating mode does not exceed the preset number of times of circulating, and continuously reading the returned data for three times to be consistent, considering that the returned data is successful, and further judging whether the current bandwidth state information is consistent with the state of the PCIE card or not based on the returned data; and if the current bandwidth state information is inconsistent with the PCIE card state, the BMC unbundles and reconfigures the current bandwidth state information based on the PCIE card state.

The invention also provides a computer readable storage medium. FIG. 4 is a schematic diagram illustrating an embodiment of a computer-readable storage medium provided by the present invention. As shown in fig. 4, the computer readable storage medium stores S31 a computer program that, when executed by a processor, performs the method as described above S32.

Finally, it should be noted that, as one of ordinary skill in the art can appreciate that all or part of the processes of the methods of the above embodiments can be implemented by a computer program to instruct related hardware, and the program of the method for handling a bandwidth status exception can be stored in a computer-readable storage medium, and when executed, the program can include the processes of the embodiments of the methods described above. The storage medium of the program may be a magnetic disk, an optical disk, a Read Only Memory (ROM), a Random Access Memory (RAM), or the like. The embodiments of the computer program may achieve the same or similar effects as any of the above-described method embodiments.

Furthermore, the methods disclosed according to embodiments of the present invention may also be implemented as a computer program executed by a processor, which may be stored in a computer-readable storage medium. Which when executed by a processor performs the above-described functions defined in the methods disclosed in embodiments of the invention.

Further, the above method steps and system elements may also be implemented using a controller and a computer readable storage medium for storing a computer program for causing the controller to implement the functions of the above steps or elements.

Those of skill would further appreciate that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the disclosure herein may be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as software or hardware depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the disclosed embodiments of the present invention.

In one or more exemplary designs, the functions may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium. Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage media may be any available media that can be accessed by a general purpose or special purpose computer. By way of example, and not limitation, such computer-readable media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a general-purpose or special-purpose computer, or a general-purpose or special-purpose processor. Also, any connection is properly termed a computer-readable medium. For example, if the software is transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, Digital Subscriber Line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of medium. Disk and disc, as used herein, includes Compact Disc (CD), laser disc, optical disc, Digital Versatile Disc (DVD), floppy disk, blu-ray disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.

The foregoing is an exemplary embodiment of the present disclosure, but it should be noted that various changes and modifications could be made herein without departing from the scope of the present disclosure as defined by the appended claims. The functions, steps and/or actions of the method claims in accordance with the disclosed embodiments described herein need not be performed in any particular order. Furthermore, although elements of the disclosed embodiments of the invention may be described or claimed in the singular, the plural is contemplated unless limitation to the singular is explicitly stated.

It should be understood that, as used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly supports the exception. It should also be understood that "and/or" as used herein is meant to include any and all possible combinations of one or more of the associated listed items.

The numbers of the embodiments disclosed in the embodiments of the present invention are merely for description, and do not represent the merits of the embodiments.

It will be understood by those skilled in the art that all or part of the steps for implementing the above embodiments may be implemented by hardware, or may be implemented by a program instructing relevant hardware, and the program may be stored in a computer-readable storage medium, and the above-mentioned storage medium may be a read-only memory, a magnetic disk or an optical disk, etc.

Those of ordinary skill in the art will understand that: the discussion of any embodiment above is meant to be exemplary only, and is not intended to intimate that the scope of the disclosure, including the claims, of embodiments of the invention is limited to these examples; within the idea of an embodiment of the invention, also technical features in the above embodiment or in different embodiments may be combined and there are many other variations of the different aspects of the embodiments of the invention as described above, which are not provided in detail for the sake of brevity. Therefore, any omissions, modifications, substitutions, improvements, and the like that may be made without departing from the spirit and principles of the embodiments of the present invention are intended to be included within the scope of the embodiments of the present invention.

Claims

1. A processing method for bandwidth state exception is characterized by comprising the following steps:

reading the PCIE card state of the slot position through the CPLD by the BMC, reading bandwidth state information through the PCIE Switch, and judging whether the bandwidth state information is consistent with the PCIE card state;

if the bandwidth state information is inconsistent with the PCIE card state, the BMC unbinds the slot position and reconfigures the bandwidth state information based on the PCIE card state;

sending a command request content to the PCIE Switch by the BMC, reading return data obtained by the PCIE Switch based on the command request content and circularly executing the step based on the return data;

responding to the condition that the number of times of executing the last step in a circulating mode does not exceed the preset number of times of circulating, and continuously reading the returned data for three times to be consistent, considering that the returned data is successful, and further judging whether the current bandwidth state information is consistent with the PCIE card state or not based on the returned data; and

and if the current bandwidth state information is inconsistent with the PCIE card state, the BMC unbundles and reconfigures the current bandwidth state information based on the PCIE card state.

2. The method according to claim 1, wherein the sending, by the BMC, a command request content to the PCIE Switch, reading return data obtained by the PCIE Switch executing based on the command request content, and executing the step cyclically based on the return data includes:

sending a command number to the PCIE Switch by the BMC, and judging whether the command number is sent successfully or not;

if the command number is successfully sent, the BMC sends command request content corresponding to the command number to the PCIE Switch, and judges whether the command request content is successfully sent;

if the command request content is successfully sent, the BMC queries whether the thread is successfully received from the PCIE Switch, and if the thread is successfully received, the BMC queries whether the command is successfully executed from the PCIE Switch;

and if the command is successfully executed, reading data from the PCIE Switch by the BMC.

3. The method for handling a bandwidth status exception according to claim 2, further comprising:

if the command number is not successfully sent, returning to the step of sending the command number to the PCIE Switch by the BMC;

and if the command request content corresponding to the command number is not successfully sent, returning to the step of sending the command number to the PCIE Switch by the BMC.

4. The method for handling a bandwidth status exception according to claim 2, further comprising:

if the thread receiving fails, the BMC queries whether the thread receiving is successful from the PCIE Switch again;

and returning to the step of sending a command number to the PCIE Switch by the BMC in response to the number of times of executing the previous step exceeding three times.

5. The method for handling a bandwidth status exception according to claim 2, further comprising:

if the command is being executed, the BMC queries whether the command is successfully executed from the PCIE Switch again;

if the command execution fails, returning to the step of sending a command number to the PCIE Switch by the BMC.

6. The method for handling a bandwidth status exception according to claim 1, further comprising:

and if the current bandwidth state information is consistent with the PCIE card state, skipping the steps of unbinding and binding.

7. The method for processing the bandwidth status exception according to claim 1, wherein the reading, by the BMC through the CPLD, the PCIE card status of the slot includes:

and the BMC receives the slot position signal through the CPLD and reads the PCIE card state of the slot position based on the slot position signal, wherein the PCIE card state comprises an off-position state, an x8 card and an x16 card.

8. A device for handling a bandwidth status exception, comprising:

the first module is configured to read the PCIE card state of the slot position through the CPLD by the BMC, read bandwidth state information through the PCIE Switch, and judge whether the bandwidth state information is consistent with the PCIE card state;

a second module configured to unbind the slot by the BMC and reconfigure the bandwidth state information based on the PCIE card state if the bandwidth state information is inconsistent with the PCIE card state;

a third module, configured to send a command request content to the PCIE Switch by the BMC, read return data obtained by the PCIE Switch executing based on the command request content, and execute the present module cyclically based on the return data;

the fourth module is configured to respond that the number of times of circularly executing the previous module does not exceed a preset number of times of circulation, and the returned data read for three continuous times are consistent, the returned data is considered to be successful, and whether the current bandwidth state information is consistent with the state of the PCIE card or not is further judged based on the returned data; and

and the fifth module is configured to, if the current bandwidth state information is inconsistent with the PCIE card state, unbundle by the BMC and reconfigure the current bandwidth state information based on the PCIE card state.

9. A computer device, comprising:

at least one processor; and

a memory storing computer instructions executable on the processor, the instructions when executed by the processor implementing the steps of the method of any one of claims 1 to 7.

10. A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, carries out the steps of the method according to any one of claims 1 to 7.