CN112953594B - Burst MSK direct sequence spread spectrum communication synchronous detection device and method - Google Patents
Burst MSK direct sequence spread spectrum communication synchronous detection device and method Download PDFInfo
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Abstract
The invention relates to a burst MSK direct sequence spread spectrum communication synchronous detection device and a method, belongs to the technical field of signal detection, and solves the problems of complex algorithm and low detection efficiency of the conventional detection device. The device comprises a signal preprocessing module, a signal processing module and a signal processing module, wherein the signal preprocessing module is used for acquiring a digital intermediate frequency signal comprising a plurality of synchronous sequences based on an analog radio frequency signal; the synchronous sequence detection modules are respectively used for detecting corresponding synchronous sequences; obtaining a plurality of numerical value sequences based on the digital intermediate frequency signals through a plurality of filters, extracting and selecting corresponding numerical values from the plurality of numerical value sequences based on the synchronous code elements corresponding to the synchronous sequences to calculate and obtain time domain correlation values, and further judging whether the digital intermediate frequency signals contain the synchronous sequences; the synchronous pulse joint detection module determines whether the communication information exists in the digital intermediate frequency signal and the position of the communication information based on the number and time of the detected synchronous sequences.
Description
Technical Field
The invention relates to the technical field of signal detection, in particular to a burst MSK direct sequence spread spectrum communication synchronous detection device and method.
Background
For burst data communication, information is pulse-type modulated and the position is unknown, at present, a spread spectrum technology is generally adopted, a group of spread spectrum sequences with excellent autocorrelation are inserted in front of a transmitted data frame for system synchronization, a receiver detects the synchronization sequences to determine whether the information exists and the specific position of the information, and then the subsequent data information is analyzed to obtain the original information for transmission.
MSK modulation is a special FSK modulation method, and unlike the conventional BPSK/QPSK modulation method, MSK modulation realizes transmission of the symbol 0/1 by changing the frequency of a transmission signal. For the continuous wave MSK, carrier frequency locking can be realized by utilizing a phase-locked loop; for burst communication type pulse MSK modulation, it is difficult to recover the carrier frequency of a narrow pulse signal in a short time. The non-coherent demodulation can be completed under the condition that the carrier frequency phase of the signal is unknown, so the burst MSK communication generally adopts a non-coherent demodulation mode.
The existing synchronous sequence detection method comprises an algorithm of demodulating firstly and then despreading, such as a zero-crossing detection method; secondly, algorithms such as FFT, delay multiplication, segmentation autocorrelation and the like are used; thirdly, a matched filter and the like are used, the intermediate frequency sampling signal is down-converted to a baseband through time domain correlation calculation, and then the digital filter is used for filtering, so that the synchronous sequence is detected.
The prior art has at least the following defects: firstly, the algorithm of demodulation and de-spreading loses precious spread spectrum gain and has poor detection performance; secondly, a detection algorithm of FFT and the like are used, so that the algorithm complexity is high and the detection efficiency is low; thirdly, a matched filter and the like are used, the intermediate frequency sampling signal is down-converted to a baseband at first and then filtered, the algorithm is still relatively complex, and the detection efficiency is low.
Disclosure of Invention
In view of the above analysis, the present invention provides a burst MSK direct sequence communication synchronization detection apparatus and method, so as to solve the problems of high computation complexity, low spread spectrum gain and low detection efficiency of the conventional synchronization sequence signal detection apparatus.
In one aspect, the present invention provides a burst MSK direct sequence spread spectrum communication synchronization detection apparatus, including:
the signal preprocessing module is used for obtaining a digital intermediate frequency signal comprising a plurality of synchronous sequences based on the received analog radio frequency signal;
the synchronous sequence detection modules are respectively used for detecting corresponding synchronous sequences; the synchronization sequence detection module performs matched filtering on the digital intermediate frequency signal through a plurality of filters respectively to obtain a plurality of numerical value sequences correspondingly, extracts and selects corresponding numerical values from the numerical value sequences based on synchronization code elements corresponding to the synchronization sequences to calculate and obtain time domain correlation values, judges whether the digital intermediate frequency signal contains the synchronization sequences or not according to the time domain correlation values, and records the time when the synchronization sequences are detected if the synchronization sequences are contained in the digital intermediate frequency signal;
and the synchronous pulse joint detection module is used for determining whether communication information exists in the digital intermediate frequency signal and the position of the communication information based on the number of the detected synchronous sequences and the time of detecting the synchronous sequences.
Further, the synchronization sequence detection module comprises:
the four filters are used for respectively carrying out intra-symbol matched filtering on the digital intermediate frequency signals to correspondingly obtain four numerical value sequences;
the shift register and extraction unit is used for respectively shifting and storing the four numerical value sequences, respectively extracting corresponding numerical values from the four numerical value sequences at preset intervals, and correspondingly obtaining a first numerical value sequence, a second numerical value sequence, a third numerical value sequence and a fourth numerical value sequence;
a time domain calculating unit, configured to select corresponding values from the first numerical sequence and the second numerical sequence to form a first matching numerical sequence based on a synchronization symbol corresponding to a synchronization sequence, select corresponding values from the third numerical sequence and the fourth numerical sequence to form a second matching numerical sequence, and calculate a time domain correlation value based on the first matching numerical sequence and the second matching numerical sequence;
the dynamic threshold calculation unit is used for calculating a dynamic threshold in real time;
and the threshold judgment unit is used for comparing the time domain correlation value with the dynamic threshold obtained by calculation, and if the time domain correlation value is greater than the dynamic threshold, the digital intermediate frequency signal is determined to comprise the synchronization sequence.
Further, the values of the sampling points of the four filters are respectively as follows:
the values of the first filter are:
the values of the second filter are:
the values of the third filter are:
the values of the fourth filter are:
wherein the content of the first and second substances,
fs represents the sampling clock frequency and fm represents the code rate.
Further, the number of values in the first value sequence, the second value sequence, the third value sequence and the fourth value sequence is the same as the number of symbols in the synchronization sequence;
the time domain calculating unit is specifically configured to:
obtaining a first matching numerical sequence based on the first numerical sequence, the second numerical sequence and the synchronization code element in the synchronization sequence by:
wherein Fi (n) denotes the nth value in the first sequence of matching values, Fi0(n) denotes the nth value in the first sequence of values, Fi1(n) denotes the nth value in the second sequence of values, and ds (n) denotes the nth symbol in the synchronization sequence;
obtaining a second matching numerical sequence based on the third numerical sequence, the fourth numerical sequence and the synchronization code element in the synchronization sequence by:
wherein Fq (n) represents the nth value in the second sequence of matching values, Fq0(n) represents the nth value in the third sequence of values, and Fq1(n) represents the nth value in the fourth sequence of values;
calculating a synchronization phase sequence of the synchronization sequence, and performing symbol transformation on the first matching numerical sequence and the second matching numerical sequence by the following method:
wherein di (n) represents the nth value in the first sequence of matching values after symbol transformation, dq (n) represents the nth value in the second sequence of matching values after symbol transformation, and ph (n) represents the phase corresponding to the nth symbol ds (n) in the synchronization sequence;
and accumulating the first matching numerical sequence and the second matching numerical sequence after symbol conversion respectively, and performing modulus calculation to obtain a time domain correlation value of the synchronization sequence.
Further, the synchronization phase sequence of the synchronization sequence is obtained by calculating according to the following formula:
ph (N) represents the phase corresponding to the nth code element in the synchronization sequence, Ds (j) represents the jth code element in the first N code elements in the synchronization sequence, N represents the number of code elements in the synchronization sequence, and mod represents the remainder function.
Further, the time domain correlation value of the synchronization sequence is obtained by the following formula:
wherein e (t) represents the time domain correlation value of the synchronization sequence, and N represents the number of symbols included in the synchronization sequence.
Further, the dynamic threshold calculating unit calculates the dynamic threshold in real time according to the following formula:
wherein R (t) represents a calculated dynamic threshold, c0Representing a detection threshold coefficient, s (Kn) representing a Kn-th signal value in said digital intermediate frequency signal, N representing a number of symbols in a synchronization sequence,
fs represents the sampling clock frequency and fm represents the code rate.
Further, the synchronization pulse joint detection module is specifically configured to:
comparing the number of the synchronous sequences in the digital intermediate frequency signal detected by the synchronous sequence detection module with the actual number of the synchronous sequences in the digital intermediate frequency signal, if the number of the synchronous sequences in the digital intermediate frequency signal is consistent with the actual number of the synchronous sequences in the digital intermediate frequency signal, determining the time interval between the synchronous sequences according to the time of the synchronous sequences detected by the synchronous sequence detection module, comparing the time interval with the actual pulse interval between the synchronous sequences in the digital intermediate frequency signal, and if the number of the synchronous sequences in the digital intermediate frequency signal is consistent with the actual pulse interval, determining that communication information exists in the digital intermediate frequency signal and the communication information is located at a preset position.
Further, the signal preprocessing module is specifically configured to:
receiving an analog radio frequency signal, amplifying, frequency converting and filtering the analog radio frequency signal to obtain an analog intermediate frequency signal, and converting the analog intermediate frequency signal into a digital intermediate frequency signal;
the frequency of the analog intermediate frequency signal is x fs +/-fm +/-0.25 fm, wherein x is any integer, fs is the sampling clock frequency, and fm is the code rate.
On the other hand, the invention provides a burst MSK direct sequence spread spectrum communication synchronous detection method, which comprises the following steps:
preprocessing a received analog radio frequency signal to obtain a digital intermediate frequency signal comprising a plurality of synchronous sequences;
detecting a plurality of synchronization sequences in the digital intermediate frequency signal, respectively, the detecting including: respectively carrying out matched filtering on the digital intermediate frequency signal through a plurality of filters matched with the synchronization sequence to obtain a plurality of numerical value sequences correspondingly, extracting and selecting corresponding numerical values from the numerical value sequences based on the synchronization code elements corresponding to the synchronization sequence to calculate and obtain a time domain correlation value, judging whether the digital intermediate frequency signal contains the synchronization sequence or not according to the time domain correlation value, and if so, recording the time when the synchronization sequence is detected;
determining whether communication information exists in the digital intermediate frequency signal and a position of the communication information based on the number of detected synchronization sequences and a time when the synchronization sequences are detected.
Compared with the prior art, the invention can realize at least one of the following beneficial effects:
1. the invention provides a burst MSK direct sequence communication synchronization detection device and method, which utilize four filters to simultaneously carry out matched filtering on a synchronization sequence to obtain four numerical sequences, extract corresponding numerical values from the numerical sequences according to synchronization code elements corresponding to the synchronization sequence to respectively obtain two numerical sequences corresponding to the synchronization code elements, further obtain a time domain correlation value by modulo calculation, and judge whether the synchronization sequence is detected.
2. The burst MSK direct sequence spread spectrum communication synchronous detection device and the method provided by the invention can directly carry out matched filtering on the digital intermediate frequency signal by adopting a plurality of filters, do not need to down convert the digital intermediate frequency signal to a baseband, have fixed order of the adopted filter, do not need to change along with the change of the length of a step sequence, have small resource consumption and good detection performance.
3. The burst MSK direct sequence communication synchronous detection device and the burst MSK direct sequence communication synchronous detection method provided by the invention can simultaneously detect a plurality of synchronous sequences through a plurality of synchronous sequence detection modules, and determine whether the digital intermediate frequency signal contains communication information and the position of the communication information according to the number of the detected synchronous sequences and the time interval between the synchronous sequences, so that the detection efficiency is high.
In the invention, the technical schemes can be combined with each other to realize more preferable combination schemes. Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and drawings.
Drawings
The drawings are only for purposes of illustrating particular embodiments and are not to be construed as limiting the invention, wherein like reference numerals are used to designate like parts throughout.
Fig. 1 is a schematic diagram of a burst MSK direct sequence spread spectrum communication synchronization detection apparatus according to an embodiment of the present invention;
FIG. 2 is a diagram of a synchronization sequence detection module according to an embodiment of the present invention;
FIG. 3 is a diagram illustrating shift register and decimation of a sequence of values according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of waveforms and sampling points of filters according to an embodiment of the present invention;
FIG. 5 is a diagram illustrating a detection process of a synchronization pulse joint detection module according to an embodiment of the present invention;
fig. 6 is a flowchart of a burst MSK direct sequence spread spectrum communication synchronization detection method according to an embodiment of the present invention.
Reference numerals:
110-a signal pre-processing module; 120-a plurality of sync sequence detection modules; 130-synchronous pulse joint detection module; 121-a filter; 122-shift register and decimation unit; 123-time domain calculating unit; 124-dynamic threshold calculation unit; 125-threshold decision unit.
Detailed Description
The accompanying drawings, which are incorporated in and constitute a part of this application, illustrate preferred embodiments of the invention and together with the description, serve to explain the principles of the invention and not to limit the scope of the invention.
Device embodiment
The invention discloses a burst MSK direct sequence spread spectrum communication synchronous detection device. As shown in fig. 1, the apparatus includes:
a signal preprocessing module 110, configured to obtain a digital intermediate frequency signal including a plurality of synchronization sequences based on the received analog radio frequency signal.
The plurality of sync sequence detection modules 120 are respectively configured to detect corresponding sync sequences, that is, detect whether the digital intermediate frequency signal includes the corresponding sync sequences and detect the time of the corresponding sync sequences. Each synchronization sequence detection module performs matched filtering on the digital intermediate frequency signal through a plurality of filters respectively to obtain a plurality of numerical value sequences correspondingly, extracts and selects corresponding numerical values from the plurality of numerical value sequences based on the synchronization code elements corresponding to the synchronization sequences to calculate and obtain time domain correlation values, judges whether the digital intermediate frequency signal contains the synchronization sequences or not according to the time domain correlation values, and records the time of detecting the synchronization sequences if the digital intermediate frequency signal contains the synchronization sequences.
The sync pulse joint detection module 130 determines whether communication information exists in the digital intermediate frequency signal and a position of the communication information based on the number of detected sync sequences and a time when the sync sequences are detected.
Specifically, the burst MSK direct sequence communication system inserts a plurality of spreading sequences as synchronization sequences before communication information to be transmitted, and transmits the synchronization sequences after MSK modulation at a certain pulse interval, that is, an analog radio frequency signal received by the detection device provided by the present invention includes a plurality of synchronization sequences at fixed intervals and communication information located at a preset position after the synchronization sequences, so that the detection device is used to detect the plurality of synchronization sequences according to synchronization symbols corresponding to the plurality of synchronization sequences, and when the plurality of synchronization sequences are detected and a time interval between the plurality of synchronization sequences is consistent with the fixed interval, it can be determined that the received signal includes the communication information and determine a position of the communication information.
Preferably, the signal preprocessing module comprises an antenna, a radio frequency front end module and an AD converter. Wherein the content of the first and second substances,
an antenna for receiving an analog radio frequency signal;
the radio frequency front-end module is used for amplifying, frequency converting and filtering the received analog radio frequency to obtain an analog intermediate frequency signal;
an AD converter for converting the analog intermediate frequency signal into a digital intermediate frequency signal;
specifically, the frequency of the analog intermediate frequency signal is x × fs ± fm ± 0.25fm, where x may be any integer, fs is the sampling clock frequency, and fm is the code rate. Illustratively, the sampling clock frequency is 50MHz, the code rate is 10MHz, and the analog intermediate frequency signal frequency can be set to + -7.5 MHz, + -12.5 MHz, + -57.5 MHz, or + -62.5 MHz, etc.
Preferably, as shown in fig. 2, the sync sequence detection module includes:
and the four filters 121 are used for performing intra-symbol matched filtering on the digital intermediate frequency signals respectively to correspondingly obtain four numerical value sequences.
The shift register and extract unit 122 is configured to shift and store the four numerical value sequences, and extract corresponding numerical values from the four numerical value sequences at preset intervals, so as to obtain a first numerical value sequence, a second numerical value sequence, a third numerical value sequence, and a fourth numerical value sequence correspondingly. Illustratively, when the predetermined interval is 5, the schematic diagram of the shift register and decimation of the value sequence corresponding to one of the filters is shown in fig. 3, where D (0) to D (5N-1) represent values in the value sequence, and D (0) to D (N-1) represent values in the value sequence obtained after decimation at the predetermined interval 5.
And the time domain calculating unit 123 is configured to select corresponding values from the first numerical sequence and the second numerical sequence to form a first matching numerical sequence based on the synchronization symbol corresponding to the synchronization sequence, select corresponding values from the third numerical sequence and the fourth numerical sequence to form a second matching numerical sequence, and calculate to obtain the time domain correlation value based on the first matching numerical sequence and the second matching numerical sequence.
And the dynamic threshold calculation unit 124 is used for calculating the dynamic threshold in real time.
And a threshold decision unit 125, configured to compare the time domain correlation value with the dynamic threshold obtained through calculation, and if the time domain correlation value is greater than the dynamic threshold, determine that the digital intermediate frequency signal includes the synchronization sequence.
Preferably, the sync sequence detection module further comprises a time monitoring unit for monitoring and recording the time when the sync sequence is detected.
Preferably, the sampling points of the four filters take values respectively as follows:
the values of the first filter are:
the values of the second filter are:
the values of the third filter are:
the values of the fourth filter are:
wherein the content of the first and second substances,
fs represents the sampling clock frequency and fm represents the code rate, and for example, when K is 5, the waveforms and sampling points of the four filters are as shown in fig. 4. In addition, the order of the filter is the value of K, and in the invention, the order of the filter is only related to the sampling clock frequency and the code rate and is not related to the length of the synchronous sequence, and the order of the filter does not need to be adjusted along with the change of the length of the synchronous sequence.
Preferably, a combination of a multiplier and an adder can be used to replace the filter to realize the same function.
Preferably, the number of values in the first, second, third and fourth value sequences is the same as the number of symbols in the synchronization sequence.
The time domain calculating unit obtains a first matching numerical sequence and a second matching numerical sequence specifically by the following method:
obtaining a first matching numerical sequence based on the first numerical sequence, the second numerical sequence and the synchronization code element in the synchronization sequence by the following modes:
where Fi (n) denotes an nth value in the first matching sequence of values, Fi0(n) denotes an nth value in the first sequence of values, Fi1(n) denotes an nth value in the second sequence of values, and ds (n) denotes an nth symbol in the synchronization sequence, in other words, when a symbol in the synchronization sequence is 0, a value that is the same sort number as the symbol is extracted from the first sequence of values, and when a symbol in the synchronization sequence is 1, a value that is the same sort number as the symbol is extracted from the second sequence of values, thereby composing the first matching sequence of values.
Obtaining a second matching numerical sequence based on the third numerical sequence, the fourth numerical sequence and the synchronization code element in the synchronization sequence by the following modes:
wherein Fq (n) represents the nth value in the second sequence of matching values, Fq0(n) represents the nth value in the third sequence of values, and Fq1(n) represents the nth value in the sequence of values; in other words, when the symbol in the synchronization sequence is 0, a value having the same sequence number as the symbol is extracted from the third sequence of values, and when the symbol in the synchronization sequence is 1, a value having the same sequence number as the symbol is extracted from the fourth sequence of values, thereby forming the second matching sequence of values.
The synchronization phase sequence of the synchronization sequence is obtained by calculation as follows:
ph (N) represents the phase corresponding to the nth symbol in the synchronization sequence, Ds (j) represents the jth symbol in the first N symbols in the synchronization sequence, N represents the number of symbols in the synchronization sequence, and mod represents the remainder function.
Based on the synchronization phase sequence of the synchronization sequence obtained by calculation, performing symbol transformation on the first matching numerical sequence and the second matching numerical sequence in the following way:
wherein di (n) represents the nth value in the first sequence of symbol-transformed matching values, dq (n) represents the nth value in the second sequence of symbol-transformed matching values, and ph (n) represents the phase corresponding to the nth symbol ds (n) in the synchronization sequence.
And accumulating the first matching numerical sequence and the second matching numerical sequence after symbol conversion respectively, and performing modulus calculation to obtain a time domain correlation value of the synchronization sequence. Specifically, the time domain correlation value of the synchronization sequence is calculated and obtained through the following formula:
wherein e (t) represents the time domain correlation value of the synchronization sequence, and N represents the number of symbols included in the synchronization sequence.
In the process of calculating the time domain correlation value of the synchronous sequence, only selection and addition and subtraction operation are needed, the calculation is simple, the calculation amount is small, and the calculation complexity of the time domain correlation value calculation method in the prior art is greatly reduced.
Preferably, the dynamic threshold calculating unit calculates the dynamic threshold in real time by using the following formula:
wherein R (t) represents a calculated dynamic threshold, c0Representing a detection threshold coefficient, which can be dynamically set according to the actual requirements of a user on false alarms, s (Kn) representing the Kn-th signal value in the digital intermediate frequency signal, N representing the number of symbols in the synchronization sequence,
fs represents the sampling clock frequency and fm represents the code rate.
Preferably, when the time domain correlation value and the dynamic threshold of the synchronization sequence are calculated, in addition to the modulo calculation method, calculation methods such as square sum and absolute value calculation may be used to determine the time domain correlation value and the dynamic threshold of the synchronization sequence.
Preferably, the synchronization pulse joint detection module is specifically configured to:
comparing the number of the synchronous sequences in the digital intermediate frequency signal detected by the synchronous sequence detection module with the actual number of the synchronous sequences in the digital intermediate frequency signal, if the number of the synchronous sequences in the digital intermediate frequency signal is consistent with the actual number of the synchronous sequences in the digital intermediate frequency signal, determining the time interval between the synchronous sequences according to the time of the synchronous sequences detected by the synchronous sequence detection module, comparing the time interval with the actual pulse interval between the synchronous sequences in the digital intermediate frequency signal, and if the number of the synchronous sequences is consistent with the actual pulse interval, determining that communication information exists in the digital intermediate frequency signal and the communication information is located at a preset position.
Illustratively, the synchronization sequences in the digital intermediate frequency signal include sequence 1, sequence 2, sequence 1, sequence 2 and are arranged at time intervals T1, T2, T3, respectively. The specific process of detecting and judging the signal by the sync sequence detection module is shown in fig. 5, and according to the aforementioned judging method, only when the detection of P2(T), P1(T-T3), P2(T-T3-T2) and P1(T-T3-T2-T1) is valid, the existence of the communication information in the digital intermediate frequency signal can be judged.
Method embodiment
The invention further discloses a burst MSK direct sequence spread spectrum communication synchronous detection method. Since the method embodiment and the device embodiment are based on the same principle, the description is omitted, and the device embodiment may be referred to for the repeated points.
Specifically, as shown in fig. 6, the method includes the following steps:
s110, preprocessing the received analog radio frequency signal to obtain a digital intermediate frequency signal comprising a plurality of synchronous sequences; specifically, the signal preprocessing module 110 of the foregoing embodiment can be used to implement the specific preprocessing manner, which is described in detail in the foregoing embodiment.
S120, respectively detecting a plurality of synchronization sequences in the digital intermediate frequency signal, where the detecting includes: respectively carrying out matched filtering on the digital intermediate frequency signal through a plurality of filters matched with the synchronous sequence to obtain a plurality of numerical value sequences correspondingly, extracting and selecting corresponding numerical values from the plurality of numerical value sequences based on the synchronous code elements corresponding to the synchronous sequence to calculate and obtain a time domain correlation value, judging whether the digital intermediate frequency signal contains the synchronous sequence or not according to the time domain correlation value, and if so, recording the time of detecting the synchronous sequence; specifically, the detection process of the synchronization sequence can be implemented by using the multiple synchronization sequence detection modules 120 of the foregoing embodiments, and refer to the detailed description of the foregoing embodiments.
And S130, determining whether the communication information exists in the digital intermediate frequency signal and the position of the communication information based on the number of the detected synchronous sequences and the time of detecting the synchronous sequences. Specifically, the method for specifically determining whether to include the communication information is implemented by using the synchronization pulse joint detection module 130 in the apparatus embodiment, refer to the detailed description of the above embodiment.
Compared with the prior art, the burst MSK direct sequence communication synchronization detection device and the burst MSK direct sequence communication synchronization detection method disclosed by the embodiment of the invention have the advantages that firstly, four filters are used for carrying out matched filtering on a synchronization sequence at the same time to obtain four numerical value sequences, corresponding numerical values are extracted from the numerical value sequences according to synchronization code elements corresponding to the synchronization sequence to respectively obtain two numerical value sequences corresponding to the synchronization code elements, then a modulus is obtained to obtain a time domain correlation value, and whether the synchronization sequence is detected or not is judged; secondly, the digital intermediate frequency signals can be directly subjected to matched filtering by adopting a plurality of filters without down-converting the digital intermediate frequency signals to a baseband, the order of the adopted filter is fixed and does not need to change along with the change of the length of the step sequence, the resource consumption is low, and the detection performance is good. Finally, the burst MSK direct sequence communication synchronization detection device and method disclosed by the embodiment of the invention can simultaneously detect a plurality of synchronization sequences through a plurality of synchronization sequence detection modules, and determine whether the digital intermediate frequency signal contains communication information and the position of the communication information according to the number of the detected synchronization sequences and the time interval between the synchronization sequences, so that the detection efficiency is high.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention.
Claims (9)
1. A burst MSK direct sequence spread spectrum communication synchronous detection device is characterized by comprising:
the signal preprocessing module is used for obtaining a digital intermediate frequency signal comprising a plurality of synchronous sequences based on the received analog radio frequency signal;
the synchronous sequence detection modules are respectively used for detecting corresponding synchronous sequences; the synchronization sequence detection module comprises:
the four filters are used for respectively carrying out intra-symbol matched filtering on the digital intermediate frequency signals to correspondingly obtain four numerical value sequences;
the shift register and extraction unit is used for respectively shifting and storing the four numerical value sequences, respectively extracting corresponding numerical values from the four numerical value sequences at preset intervals, and correspondingly obtaining a first numerical value sequence, a second numerical value sequence, a third numerical value sequence and a fourth numerical value sequence;
a time domain calculating unit, configured to select corresponding values from the first numerical sequence and the second numerical sequence to form a first matching numerical sequence based on a synchronization symbol corresponding to a synchronization sequence, select corresponding values from the third numerical sequence and the fourth numerical sequence to form a second matching numerical sequence, and calculate a time domain correlation value based on the first matching numerical sequence and the second matching numerical sequence;
the dynamic threshold calculation unit is used for calculating a dynamic threshold in real time;
a threshold decision unit, configured to compare the time domain correlation value with a dynamic threshold obtained through calculation, and if the time domain correlation value is greater than the dynamic threshold, determine that the digital intermediate frequency signal includes the synchronization sequence, and record a time when the synchronization sequence is detected;
and the synchronous pulse joint detection module is used for determining whether communication information exists in the digital intermediate frequency signal and the position of the communication information based on the number of the detected synchronous sequences and the time of detecting the synchronous sequences.
2. The burst MSK direct spread communication synchronous detection device according to claim 1, wherein the sampling points of the four filters take values respectively as follows:
the values of the first filter are:
the values of the second filter are:
the values of the third filter are:
the values of the fourth filter are:
wherein the content of the first and second substances,
fs represents the sampling clock frequency and fm represents the code rate.
3. The burst MSK direct sequence communication synchronous detection device of claim 1 or 2, characterized in that the number of values in the first, second, third and fourth value sequences is the same as the number of symbols in the synchronous sequence;
the time domain calculating unit is specifically configured to:
obtaining a first matching numerical sequence based on the first numerical sequence, the second numerical sequence and the synchronization code element in the synchronization sequence by:
wherein Fi (n) denotes the nth value in the first sequence of matching values, Fi0(n) denotes the nth value in the first sequence of values, Fi1(n) denotes the nth value in the second sequence of values, and ds (n) denotes the nth symbol in the synchronization sequence;
obtaining a second matching numerical sequence based on the third numerical sequence, the fourth numerical sequence and the synchronization code element in the synchronization sequence by:
wherein Fq (n) represents the nth value in the second sequence of matching values, Fq0(n) represents the nth value in the third sequence of values, and Fq1(n) represents the nth value in the fourth sequence of values;
calculating a synchronization phase sequence of the synchronization sequence, and performing symbol transformation on the first matching numerical sequence and the second matching numerical sequence by the following method:
wherein di (n) represents the nth value in the first sequence of matching values after symbol transformation, dq (n) represents the nth value in the second sequence of matching values after symbol transformation, and ph (n) represents the phase corresponding to the nth symbol ds (n) in the synchronization sequence;
and accumulating the first matching numerical sequence and the second matching numerical sequence after symbol conversion respectively, and performing modulus calculation to obtain a time domain correlation value of the synchronization sequence.
4. The burst MSK direct sequence communication synchronous detection device of claim 3, wherein the synchronous phase sequence of the synchronous sequence is obtained by the following formula:
ph (N) represents the phase corresponding to the nth code element in the synchronization sequence, Ds (j) represents the jth code element in the first N code elements in the synchronization sequence, N represents the number of code elements in the synchronization sequence, and mod represents the remainder function.
5. The synchronous detection device of burst MSK direct sequence communication according to claim 3, characterized in that the time domain correlation value of the synchronization sequence is calculated by the following formula:
wherein e (t) represents the time domain correlation value of the synchronization sequence, and N represents the number of symbols included in the synchronization sequence.
6. The burst MSK direct spread communication synchronous detection device according to claim 1, wherein the dynamic threshold calculation unit calculates the dynamic threshold in real time by the following formula:
wherein R (t) represents a calculated dynamic threshold, c0Representing a detection threshold coefficient, s (Kn) representing a Kn-th signal value in said digital intermediate frequency signal, N representing a number of symbols in a synchronization sequence,
fs represents the sampling clock frequency and fm represents the code rate.
7. The burst MSK direct sequence spread spectrum communication synchronization detection apparatus according to claim 1, wherein the synchronization pulse joint detection module is specifically configured to:
comparing the number of the synchronous sequences in the digital intermediate frequency signal detected by the synchronous sequence detection module with the actual number of the synchronous sequences in the digital intermediate frequency signal, if the number of the synchronous sequences in the digital intermediate frequency signal is consistent with the actual number of the synchronous sequences in the digital intermediate frequency signal, determining the time interval between the synchronous sequences according to the time of the synchronous sequences detected by the synchronous sequence detection module, comparing the time interval with the actual pulse interval between the synchronous sequences in the digital intermediate frequency signal, and if the number of the synchronous sequences in the digital intermediate frequency signal is consistent with the actual pulse interval, determining that communication information exists in the digital intermediate frequency signal and the communication information is located at a preset position.
8. The burst MSK direct sequence spread spectrum communication synchronous detection device according to claim 1, wherein the signal preprocessing module is specifically configured to:
receiving an analog radio frequency signal, amplifying, frequency converting and filtering the analog radio frequency signal to obtain an analog intermediate frequency signal, and converting the analog intermediate frequency signal into a digital intermediate frequency signal;
the frequency of the analog intermediate frequency signal is x fs +/-fm +/-0.25 fm, wherein x is any integer, fs is the sampling clock frequency, and fm is the code rate.
9. A burst MSK direct sequence spread spectrum communication synchronous detection method is characterized by comprising the following steps:
preprocessing a received analog radio frequency signal to obtain a digital intermediate frequency signal comprising a plurality of synchronous sequences;
detecting a plurality of synchronization sequences in the digital intermediate frequency signal, respectively, the detecting including: respectively carrying out matched filtering on the digital intermediate frequency signal through a plurality of filters matched with the synchronization sequence to obtain a plurality of numerical value sequences correspondingly, extracting and selecting corresponding numerical values from the numerical value sequences based on the synchronization code elements corresponding to the synchronization sequence to calculate and obtain a time domain correlation value, judging whether the digital intermediate frequency signal contains the synchronization sequence or not according to the time domain correlation value, and if so, recording the time when the synchronization sequence is detected;
determining whether communication information exists in the digital intermediate frequency signal and a position of the communication information based on the number of detected synchronization sequences and a time when the synchronization sequences are detected.
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