CN112953546B - Successive approximation type analog-digital converter based on automatic zeroing and working method - Google Patents
Successive approximation type analog-digital converter based on automatic zeroing and working method Download PDFInfo
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Abstract
The application provides a high-precision successive approximation type analog-digital converter based on Autozero and a working method thereof, wherein the analog-digital converter comprises a first-stage analog-digital converter, a second-stage analog-digital converter, an amplifier, a control module and an output switch; the analog-digital converter utilizes two times of amplification of an amplifier, and only mismatch voltage and noise are amplified in the first time of amplification; in the second amplification, the residual voltage and mismatch voltage and noise are amplified. Two single-ended digital-to-analog converters in the second-stage analog-to-digital converter respectively sample the voltages amplified twice and form a differential digital-to-analog converter to offset mismatch voltage and noise and only quantize the residual voltage of the first-stage analog-to-digital converter. And weighting and outputting the quantization results of the first-stage analog-digital converter and the second-stage analog-digital converter. By utilizing the Autozero technology, the influence of mismatch voltage and noise on the quantization result of the integral analog-digital converter is eliminated, and the quantization precision is improved.
Description
Technical Field
The invention relates to the technical field of large-scale integrated circuits, in particular to a successive approximation type analog-digital converter based on automatic zeroing and a working method.
Background
In recent years, new information technologies such as big data, artificial intelligence, internet of things and the like are rapidly developed, and deep influence is brought to the economic society. These techniques have evolved without the need for large amounts of data acquisition, quantification and processing. Data quantization is an integral loop in the whole data processing flow and determines the quantity and quality of the whole data circulation. Data quantization is to convert an analog signal into a digital signal; the circuit that performs the conversion of the analog signal to the digital signal is called an analog-to-digital converter. The analog-to-digital converter includes a pipeline analog-to-digital converter, a successive approximation analog-to-digital converter, an oversampling analog-to-digital converter, and the like.
When analog-digital conversion is carried out, accurate quantization is often required to be carried out on an analog signal, so that a higher requirement is put on the accuracy of an analog-digital converter; the amplifier has a mismatch voltage and noise of millivolt level, which limits the precision of the analog-digital converter. Fig. 1 is a schematic structural diagram of a conventional analog-to-digital converter; in order to realize accurate quantization of an analog signal, a two-stage analog-to-digital converter is adopted in the field of a high-precision successive approximation type analog-to-digital converter, and the basic structure of the two-stage analog-to-digital converter is shown in fig. 2. The structure mainly comprises three parts: the device comprises a first-stage analog-digital converter, an amplifier and a second-stage analog-digital converter. The first-stage analog-digital converter quantizes the input analog signal to obtain a corresponding quantization result. When the first-stage analog-digital converter is quantized, according to the characteristics of the successive approximation type analog-digital converter, residual voltage exists at the input end of the comparator, and the range of the residual voltage value is 1 minimum weight voltage (LSB) of the first-stage analog-digital converter. The residual voltage is amplified by a certain multiple by an amplifier and then is used as an input signal to be input into a second-stage analog-digital converter. And the second-stage analog-digital converter further quantizes the amplified residual voltage to obtain a corresponding quantization result. The quantization results of the first-stage analog-digital converter and the second-stage analog-digital converter are combined and distributed according to a certain weight to obtain an accurate quantization result, so that the conversion from an analog signal to a digital signal is realized. The analog-digital converter utilizes two-stage analog-digital converters to quantize the residual voltage of the first-stage analog-digital converter again, and the requirement of high precision is met. However, in such a structure, due to the influence of factors such as a manufacturing process, mismatch voltage and noise of several tens of millivolts exist at an input end of the amplifier, and how to eliminate the influence of the mismatch voltage and the noise of the amplifier, so as to effectively improve the accuracy of the analog-to-digital converter is a problem to be solved at present.
Disclosure of Invention
In view of this, embodiments of the present application are directed to providing a successive approximation type analog-to-digital converter based on Auto Zero and a working method thereof, where an Auto Zero technology is used to calibrate mismatch voltage and noise of an amplifier, so as to eliminate the influence of the mismatch voltage and noise on a quantization result of a second stage analog-to-digital converter and improve quantization precision.
The successive approximation type analog-digital converter based on automatic zeroing provided by the embodiment of the application comprises a first-stage analog-digital converter, a second-stage analog-digital converter, an amplifier, a control module and an output switch;
the input end of a first comparator in the first-stage analog-digital converter is respectively connected with the input end of an amplifier; the input end of the amplifier is connected with the control module, the output end of the amplifier is connected with two output switches, and the other ends of the two output switches are respectively connected with two single-ended digital-to-analog converters in the second-stage analog-to-digital converter; the first-stage analog-digital converter and the second-stage analog-digital converter are respectively connected with an external digital circuit.
Preferably, the two output switches comprise a first switch and a second switch; one end of the first switch is connected with the output end of the amplifier; the other end of the first single-ended digital-to-analog converter is connected with a second single-ended digital-to-analog converter in the second-stage analog-to-digital converter; one end of the second switch is connected with the output end of the amplifier; the other end of the first single-ended digital-to-analog converter is connected with a first single-ended digital-to-analog converter in the first-stage analog-to-digital converter.
Further preferably, the control module includes a non-inverting input switch, an inverting input switch, and a common mode switch disposed between the non-inverting input and the inverting input of the amplifier.
Still further, the common mode switch comprises a first common mode switch and a second common mode switch; the first common mode switch and the second common mode switch are connected in series; and a common-mode voltage signal is arranged at the joint of the first common-mode switch and the second common-mode switch.
The invention also provides a working method of the successive approximation type analog-digital converter based on automatic zeroing, which is applied to the successive approximation type analog-digital converter based on automatic zeroing and comprises the following steps:
s1, receiving input positive and negative end sampling voltages and quantizing the voltages by a first-stage analog-digital converter;
s2, short-circuiting the input end of the amplifier, and amplifying mismatch voltage and noise;
s3, sampling the amplified mismatch voltage and noise by a first single-ended digital-to-analog converter in the second-stage analog-to-digital converter;
s4, the first-stage analog-digital converter completes quantization, and the two ends of the first comparator keep residual voltage; the amplifier is connected with the first-stage digital-to-analog converter and amplifies residual voltage, mismatch voltage and noise;
s5, sampling the amplified mismatch voltage, noise and residual voltage by a second single-ended digital-to-analog converter in the second-stage analog-to-digital converter; mismatch voltage and noise sampled by the first and second digital-to-analog converters of the second stage analog-to-digital converter cancel each other out, and only the amplified residual voltage is quantized.
And S6, combining the quantization results of the first-stage analog-digital converter and the second-stage analog-digital converter, and distributing according to preset weight to obtain an accurate quantization result.
Further preferably, in step S1, the first-stage analog-to-digital converter performs a quantization process on the input positive and negative end sampling voltages by using the following method:
s101, comparing the voltage of an input end by a first comparator, and outputting a high level or a low level;
s102, setting the lower pole plate of the capacitor in sequence from the maximum capacitor of the digital-to-analog converter according to the comparison result;
s103, comparing again by the comparator according to the voltage change of the input end of the comparator, and outputting a comparison result again; setting the capacitor at the corresponding position again;
s104, repeating the steps S101-S103 until all the capacitors of the first-stage analog-digital converter are set, and finishing the quantization.
Still further, in S101, according to whether the comparator outputs a high level or a low level, the following method is used for setting the capacitor:
when the comparison result of the comparator is high level, the capacitor connected with the positive end of the comparator in the group of capacitors to be compared is set at reference low voltage, and the capacitor connected with the negative end of the comparator is set at reference high voltage;
and when the comparison result is low level, the capacitor connected with the positive end of the comparator in the group of capacitors to be compared is set at a reference high voltage, and the capacitor connected with the negative end of the comparator is set at a reference low voltage.
Further preferably, in S2, when the input terminal of the amplifier is short-circuited, the following method is adopted:
when mismatched voltage and noise are sampled, the in-phase input switch and the anti-phase input switch are switched off, the common-mode switch is switched on, the input of the amplifier is short-circuited and is connected to the common-mode voltage, the external input voltage of the amplifier is zero, and only the mismatched voltage and the noise are amplified; the mismatch voltage and the noise are amplified by the amplifier and then output to the second-stage analog-digital converter;
further preferably, in S4, when the amplifier amplifies the residual voltage of the first stage analog-to-digital converter, the mismatch voltage of the amplifier, and the noise, the following method is adopted:
the non-inverting input switch and the inverting input switch are closed, the common mode switch is opened, the input end of the amplifier is connected with the positive end input and the negative end input of the first-stage digital-to-analog converter respectively, and the amplifier amplifies the residual voltage of the first-stage analog-to-digital converter, the mismatch voltage of the amplifier and the noise.
Further preferably, in S5, when the second stage adc performs sampling and quantization, the output switch is turned off, the amplifier is isolated from the digital-to-analog converter of the second stage adc, and the first stage adc and the amplifier are in a non-operating state.
The invention provides a successive approximation type analog-digital converter based on automatic zeroing and a working method thereof. The high-precision analog-digital converter uses Auto Zero technology, and can effectively eliminate the influence of mismatch voltage and noise of an amplifier, thereby further improving the precision.
The invention provides a successive approximation type analog-digital converter based on automatic zeroing, wherein when a second-stage analog-digital converter performs sampling and quantization, an output switch is switched off, an amplifier and a digital-analog converter of the second-stage analog-digital converter are separated and isolated, and a first-stage analog-digital converter and the amplifier are in a non-working state, so that the power consumption of the first-stage analog-digital converter and the power consumption of the amplifier are reduced.
Drawings
Fig. 1 is a basic block diagram of a conventional analog-to-digital converter of the related art.
Fig. 2 is a block diagram of a conventional two-stage analog-to-digital converter as mentioned in the background art.
Fig. 3 is a structural diagram of an auto-zero based successive approximation analog-to-digital converter according to the present application.
Fig. 4 is a block diagram of an auxiliary circuit of an auto-zero based successive approximation analog-to-digital converter according to the present application.
Fig. 5 is a flowchart illustrating an operating method of the successive approximation type analog-to-digital converter based on auto-zero according to the present application.
Fig. 6 is a timing diagram of the successive approximation analog-to-digital converter based on auto-zero provided in the present application.
Fig. 7 is a connection structure diagram of an amplifier in an auto-zero based successive approximation analog-to-digital converter according to the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Further, in the exemplary embodiments, since the same reference numerals denote the same components having the same structure or the same steps of the same method, if an embodiment is exemplarily described, only a structure or a method different from the already described embodiment is described in other exemplary embodiments.
Throughout the specification and claims, when one element is described as being "connected" to another element, the one element may be "directly connected" to the other element or "electrically connected" to the other element through a third element. Furthermore, unless explicitly described to the contrary, the term "comprising" and its corresponding terms should only be taken as including the stated features, but should not be taken as excluding any other features.
The application provides a successive approximation type analog-digital converter based on automatic zeroing, which comprises a first-stage analog-digital converter, a second-stage analog-digital converter, an amplifier, a control module and an output switch; the output switch comprises a first switch and a second switch;
the input end of a first comparator in the first-stage analog-digital converter is respectively connected with the input end of an amplifier, the input end of the amplifier is connected with the control module, and the output end of the amplifier is connected with one end of a first switch S31 and one end of a second switch S32; one end of the first switch S31 is connected with the output end of the amplifier; the other end of the first single-ended digital-to-analog converter is connected with a second single-ended digital-to-analog converter in the second-stage analog-to-digital converter; one end of the second switch S32 is connected with the output end of the amplifier; and the other end of the second single-ended digital-to-analog converter is connected with a second single-ended digital-to-analog converter in the second-stage analog-to-digital converter.
The control module comprises a non-inverting input switch S11, an inverting input switch S12 and common mode switches S21 and S22 arranged between the non-inverting input and the inverting input of the amplifier.
Two selective first switches S31 and second switches S32 are added behind the amplifier to output the voltage amplified twice by the amplifier (first amplification of mismatch voltage and noise, second amplification of residual voltage and mismatch voltage and noise) to different single-ended digital-to-analog converters. The second stage analog-digital converter is connected with the output of the amplifier through a switch S31 and a switch S32; the input mode is a pseudo-differential input mode, the single-ended digital-to-analog converter 21 and the single-ended digital-to-analog converter 22 are both single-ended input, the single-ended digital-to-analog converter 21 inputs amplified mismatch voltage and noise, and the single-ended digital-to-analog converter 22 inputs the sum of the amplified mismatch voltage and noise and the amplified residual voltage of the first-stage analog-to-digital converter. The two-stage analog-to-digital converters are connected through an amplifier. Meanwhile, the single-ended digital-to-analog converters correspond to the digital circuits one to one and are controlled by the digital circuits.
It should be noted that fig. 4 is a structural diagram of an auxiliary circuit of a high-precision successive approximation type analog-to-digital converter proposed in the present application, and the auxiliary circuit such as a digital-to-analog converter, a digital control circuit, etc. is not the core content of this patent, and only assists and supports this converter to implement corresponding control and conversion functions.
The amplifier amplifies the residual voltage of the first stage analog-digital converter, and the second stage analog-digital converter quantizes the amplified residual voltage again, so that the input voltage is accurately quantized. The high-precision analog-digital converter uses Auto Zero technology, and can effectively eliminate the influence of mismatch voltage and noise of the amplifier, thereby further improving the precision.
As shown in fig. 5, the high-precision successive approximation type analog-to-digital converter provided by the present application operates according to the following flow:
s1, receiving input positive and negative end sampling voltages and quantizing the voltages by a first-stage analog-digital converter; specifically, the digital-to-analog converter 11 and the digital-to-analog converter 12 sample the positive and negative terminal input voltages under the control of the digital circuit 11 and the digital circuit 12.
The specific quantization process is as follows: in the first step, the comparator compares the voltage at the input terminal of the comparator and outputs a high level or a low level. And secondly, setting the lower plates of the capacitors from left to right in sequence from the maximum capacitor (usually the first group of capacitors on the left side) of the digital-analog converter according to the comparison result of the comparator. When the comparison result of the comparator is high level, the capacitor connected with the positive end of the comparator in the group of capacitors to be compared is set at reference low voltage, and the capacitor connected with the negative end of the comparator is set at reference high voltage; and when the comparison result is low level, the capacitor connected with the positive end of the comparator in the group of capacitors to be compared is set at reference high voltage, and the capacitor connected with the negative end of the comparator is set at reference low voltage. And thirdly, setting the capacitor connected with the comparator, changing the voltage at the input end of the comparator, comparing again by the comparator and outputting a comparison result. And setting the capacitance at the corresponding position according to the output result of the comparator. And fourthly, repeating the process until all the capacitors of the first-stage analog-digital converter are set, and finishing the quantization.
S2, short-circuiting the input end of the amplifier, and amplifying mismatch voltage and noise;
the amplifier amplifies mismatch voltage and noise. The input of the amplifier is short-circuited, the external input voltage is zero, and only self mismatch voltage and noise are amplified. The mismatch voltage and noise are amplified by the amplifier, the switch S31 is turned on, and the first single-ended digital-to-analog converter 21 samples the amplified mismatch voltage and noise of the amplifier. The amplifier mismatch voltage and noise are stored in the first single-ended digital-to-analog converter 21. After the first-stage analog-digital converter is quantized, residual voltage exists at two ends of the comparator. The residual voltage is input to the input of the amplifier. Due to the mismatch voltage and noise of the amplifier, the amplifier amplifies the residual voltage of the first stage analog-to-digital converter and the mismatch voltage and noise of the amplifier.
And S3, sampling the amplified mismatch voltage, noise and residual voltage by a second single-ended digital-to-analog converter 22 in the second-stage analog-to-digital converter.
And sampling by the second-stage analog-digital converter. After the residual voltage of the first stage adc and the mismatch voltage and noise of the amplifier are amplified by the amplifier, the switch S32 is turned on, and the second single-ended dac 22 samples the amplified residual voltage of the first stage adc and the mismatch voltage and noise of the amplifier. In conjunction with step S2, the input voltage of the second stage adc is:
(first stage adc remnant voltage + amplifier mismatch voltage and noise) -amplifier mismatch voltage and noise) is the amplification factor, i.e. the first stage adc remnant voltage.
And S4, quantizing the second-stage analog-digital converter. The first single-ended digital-to-analog converter and the second single-ended digital-to-analog converter form a differential digital-to-analog converter, mismatch voltage and noise are mutually offset, and only residual voltage is quantized. After multiple comparisons by the comparator, all the capacitors of the second-stage analog-digital converter are set, and the quantization is finished.
And S5, combining the quantization results of the first-stage analog-digital converter and the second-stage analog-digital converter, and distributing according to a certain weight to obtain an accurate quantization result so as to realize the conversion from an analog signal to a digital signal.
Fig. 6 shows a timing chart of the analog-to-digital converter. In one quantization period, three time segments are divided. At each time period, three major parts of the analog-to-digital converter (first stage analog-to-digital converter, amplifier, second stage analog-to-digital converter) operate simultaneously.
At time 1, the first stage analog-to-digital converter samples and quantizes the input signal; the amplifier input is shorted to the common mode voltage VCM. The amplifier output is connected to a single-ended digital-to-analog converter 21 in the second stage. The mismatch voltage and noise are amplified by the amplifier and stored in the second digital-to-analog converter 21 of the second stage analog-to-digital converter. Corresponding to steps S1 and S2 in the specific working process.
At time 2, the quantization of the first-stage analog-to-digital converter is finished, and the residual voltage is kept; the input voltage of the amplifier is the residual voltage of the first-stage analog-digital converter, and because the input end of the amplifier always has mismatch voltage and noise, the amplifier amplifies the residual voltage of the first-stage analog-digital converter and the mismatch voltage and noise of the amplifier; the amplified remaining voltage of the first stage adc and the mismatch voltage and noise of the amplifier are stored in the second digital-to-analog converter 22 of the second stage adc. Corresponding to step S3 in the specific working process.
At time 3, switch S31 and switch S32 are open and the amplifier is isolated from the two single-ended digital to analog converters of the second stage. At this time, the first stage analog-to-digital converter and the amplifier are in a non-operating state and can be dormant to save power consumption. The second stage adc continues to quantize the amplified remaining voltage, and the first single-ended dac 21 and the second single-ended dac 22 operate simultaneously to quantize the remaining voltage of the first stage adc. After the second-stage analog-digital converter is quantized, the quantization results of the first-stage analog-digital converter and the second-stage analog-digital converter are combined and distributed according to certain weight to obtain an accurate quantization result, and conversion from an analog signal to a digital signal is achieved.
In the implementation process of Auto Zero technology, the connection mode of the amplifier and the first-stage analog-to-digital converter and the second-stage analog-to-digital converter is the key. Fig. 7 is a detailed diagram of the connection of the amplifier.
The specific working steps are as follows:
1. when mismatch voltage and noise are amplified, the switch S11 and the switch S12 are opened, the switch S21 and the switch S22 are closed, and the amplifier input is short-circuited and connected to the common-mode voltage VCM. At this time, the amplifier input voltage is a mismatch voltage and noise. The mismatch voltage and noise are amplified by the amplifier and then output to the second stage analog-to-digital converter from the output 1.
2. When the residual voltage of the first-stage analog-digital converter is amplified, the switch S11 and the switch S12 are closed, the switch S21 and the switch S22 are opened, and the input ends of the amplifier are respectively connected with the input end and the input end of the positive end of the first-stage analog-digital converter, namely the residual voltage of the first-stage analog-digital converter. At this time, the amplifier input voltage is the sum of the residual voltage of the first stage analog-to-digital converter, the mismatch voltage of the amplifier and the noise. The sum of the residual voltage of the first-stage analog-digital converter, the mismatch voltage of the amplifier and the noise is amplified by the amplifier and then is output to the second-stage analog-digital converter from the output 1.
In addition to the above-described methods and apparatus, embodiments of the present application may also be a computer program product comprising computer program instructions that, when executed by a processor, cause the processor to perform the steps in the methods according to the various embodiments of the present application described in the "exemplary methods" section of this specification, above.
The computer program product may be written with program code for performing the operations of embodiments of the present application in any combination of one or more programming languages, including an object oriented programming language such as Java, C + + or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computing device, partly on the user's device, as a stand-alone software package, partly on the user's computing device and partly on a remote computing device, or entirely on the remote computing device or server.
Furthermore, embodiments of the present application may also be a computer readable storage medium having stored thereon computer program instructions that, when executed by a processor, cause the processor to perform steps in a method according to various embodiments of the present application described in the "exemplary methods" section above of this specification.
The computer-readable storage medium may take any combination of one or more readable media. The readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may include, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or a combination of any of the foregoing. More specific examples (a non-exhaustive list) of the readable storage medium include: an electrical connection having one or more wires, a portable diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
The foregoing describes the general principles of the present application in conjunction with specific embodiments, however, it is noted that the advantages, effects, etc. mentioned in the present application are merely examples and are not limiting, and they should not be considered essential to the various embodiments of the present application. Furthermore, the foregoing disclosure of specific details is for the purpose of illustration and description and is not intended to be limiting, since the foregoing disclosure is not intended to be exhaustive or to limit the disclosure to the precise details disclosed.
The block diagrams of devices, apparatuses, systems referred to in this application are only given as illustrative examples and are not intended to require or imply that the connections, arrangements, configurations, etc. must be made in the manner shown in the block diagrams. These devices, apparatuses, devices, systems may be connected, arranged, configured in any manner, as will be appreciated by those skilled in the art. Words such as "including," "comprising," "having," and the like are open-ended words that mean "including, but not limited to," and are used interchangeably therewith. The words "or" and "as used herein mean, and are used interchangeably with, the word" and/or, "unless the context clearly dictates otherwise. The word "such as" is used herein to mean, and is used interchangeably with, the phrase "such as but not limited to".
It should also be noted that in the devices, apparatuses, and methods of the present application, the components or steps may be decomposed and/or recombined. These decompositions and/or recombinations are to be considered as equivalents of the present application.
The previous description of the disclosed aspects is provided to enable any person skilled in the art to make or use the present application. Various modifications to these aspects will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other aspects without departing from the scope of the application. Thus, the present application is not intended to be limited to the aspects shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
The foregoing description has been presented for purposes of illustration and description. Furthermore, the description is not intended to limit embodiments of the application to the form disclosed herein. While a number of example aspects and embodiments have been discussed above, those of skill in the art will recognize certain variations, modifications, alterations, additions and sub-combinations thereof.
Claims (6)
1. A working method of successive approximation type analog-digital converter based on automatic zeroing is characterized in that the working method is applied to the successive approximation type analog-digital converter based on automatic zeroing,
the device comprises a first-stage analog-digital converter, a second-stage analog-digital converter, an amplifier, a control module and an output switch;
the input end of a first comparator in the first-stage analog-digital converter is respectively connected with the input end of an amplifier; the input end of the amplifier is connected with the control module, the output end of the amplifier is connected with one end of two output switches, and the other end of the two output switches is correspondingly connected with two single-ended digital-to-analog converters in the second-stage analog-to-digital converter; the first-stage analog-digital converter and the second-stage analog-digital converter are respectively connected with an external digital circuit;
the working process comprises the following steps:
s1, receiving input positive and negative end sampling voltages by a first-stage analog-digital converter and quantizing the voltages;
s2, short-circuiting the input end of the amplifier, and amplifying mismatch voltage and noise;
s3, sampling the amplified mismatch voltage and noise by a first single-ended digital-to-analog converter in the second-stage analog-to-digital converter;
s4, the first-stage analog-digital converter completes quantization, and the two ends of the first comparator keep residual voltage; the amplifier is connected with the first-stage digital-to-analog converter and amplifies residual voltage, mismatch voltage and noise;
s5, sampling the amplified mismatch voltage, noise and residual voltage by a second single-ended digital-to-analog converter in the second-stage analog-to-digital converter; mismatched voltage and noise sampled by a first single-ended digital-to-analog converter and a second single-ended digital-to-analog converter of the second-stage analog-to-digital converter are mutually offset, and only amplified residual voltage is quantized;
and S6, combining the quantization results of the first-stage analog-digital converter and the second-stage analog-digital converter, and distributing according to preset weight to obtain an accurate quantization result.
2. The method of claim 1, wherein in step S1, the first stage adc performs quantization on the input positive and negative sample voltages by using the following method:
s101, comparing the voltage of an input end by a first comparator, and outputting a high level or a low level;
s102, setting the lower electrode plates of the capacitors in sequence from the maximum capacitor of the digital-to-analog converter according to the comparison result;
s103, comparing again by the comparator according to the voltage change of the input end of the comparator, and outputting a comparison result again; setting the capacitor at the corresponding position again;
s104, repeating the steps S101-S103 until all the capacitors of the first-stage analog-digital converter are set, and finishing the quantization.
3. The method of claim 2, wherein in step S101, the capacitor is set according to the high level or the low level of the comparator output by the following method:
when the comparison result of the comparator is high level, the capacitor connected with the positive end of the comparator in the group of capacitors to be compared is set at reference low voltage, and the capacitor connected with the negative end of the comparator is set at reference high voltage;
and when the comparison result is low level, the capacitor connected with the positive end of the comparator in the group of capacitors to be compared is set at a reference high voltage, and the capacitor connected with the negative end of the comparator is set at a reference low voltage.
4. The method of claim 1, wherein the two output switches include a first switch and a second switch; one end of the first switch is connected with the output end of the amplifier; the other end of the first single-ended digital-to-analog converter is connected with a second single-ended digital-to-analog converter in the second-stage analog-to-digital converter; one end of the second switch is connected with the output end of the amplifier; the other end of the first single-ended digital-to-analog converter is connected with a first single-ended digital-to-analog converter in the first-stage analog-to-digital converter;
the control module comprises a non-inverting input switch, an inverting input switch and a common mode switch arranged between the non-inverting input end and the inverting input end of the amplifier;
the common mode switch comprises a first common mode switch and a second common mode switch; the first common mode switch and the second common mode switch are connected in series; a common mode voltage signal is arranged at the joint of the first common mode switch and the second common mode switch;
in S2, when the amplifier input is short-circuited, the following method is adopted:
when mismatched voltage and noise are sampled, the in-phase input switch and the anti-phase input switch are switched off, the common-mode switch is switched on, the input of the amplifier is short-circuited and is connected to the common-mode voltage, the external input voltage of the amplifier is zero, and only the mismatched voltage and the noise of the amplifier are amplified; the mismatch voltage and the noise are amplified by the amplifier and then output to the second-stage analog-digital converter.
5. The method of claim 4, wherein the step of amplifying the residual voltage of the first stage adc, the mismatch voltage of the amplifier, and the noise in S4 comprises:
the non-inverting input switch and the inverting input switch are closed, the common mode switch is opened, the input end of the amplifier is connected with the positive end input and the negative end input of the first-stage digital-to-analog converter respectively, and the amplifier amplifies the residual voltage of the first-stage analog-to-digital converter, the mismatch voltage of the amplifier and the noise.
6. The method of claim 1, wherein in step S5, when the second stage adc samples and quantizes, the output switch of the amplifier is turned off, the amplifier and the dac of the second stage adc are isolated, and the first stage adc and the amplifier are in a non-operating state.
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