CN112583518A - Interference signal generating device and method - Google Patents
Interference signal generating device and method Download PDFInfo
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- CN112583518A CN112583518A CN202110207327.6A CN202110207327A CN112583518A CN 112583518 A CN112583518 A CN 112583518A CN 202110207327 A CN202110207327 A CN 202110207327A CN 112583518 A CN112583518 A CN 112583518A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04K—SECRET COMMUNICATION; JAMMING OF COMMUNICATION
- H04K3/00—Jamming of communication; Counter-measures
- H04K3/40—Jamming having variable characteristics
- H04K3/42—Jamming having variable characteristics characterized by the control of the jamming frequency or wavelength
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Abstract
The invention discloses an interference signal generating device and method, wherein the interference signal generating device comprises: a baseband signal generating module for generating a baseband signal; the sampling rate conversion module is used for receiving the baseband signal output by the baseband signal generation module and carrying out Lagrange interpolation on the sampling rate of the baseband signal; the multi-phase digital oscillators receive the baseband signals output by the sampling rate conversion module, carry out frequency conversion on the baseband signals and carry out interpolation on the sampling rate of the baseband signals; the combiner is used for receiving the baseband signals output by the multiphase digital oscillator and combining and adding the baseband signals into an interference signal; and the digital-to-analog conversion module is used for receiving the interference signal output by the combiner, performing digital-to-analog conversion on the interference signal and then outputting the interference signal. The invention realizes flexible full-band suppression and bandwidth-variable multipoint suppression interference.
Description
Technical Field
The present invention belongs to the technical field of signal interference, and in particular, to an interference signal generating device and method.
Background
The electromagnetic environment of the present electronic warfare is complex, the battlefield environment may have various data chain command signals and telemetering signals for large-capacity data transmission, so that the target signal may have a plurality of or large-bandwidth signals, and the noise signal at present can either realize fixed bandwidth signal interference or only realize full-band suppression.
Disclosure of Invention
The present invention is directed to overcoming one or more of the deficiencies of the prior art and providing an apparatus and method for generating an interference signal.
The purpose of the invention is realized by the following technical scheme: an interference signal generating apparatus, comprising:
the baseband signal generating module is used for generating a baseband signal and outputting the baseband signal;
the sampling rate conversion module is used for receiving the baseband signal output by the baseband signal generation module, performing Lagrange interpolation on the sampling rate of the baseband signal and outputting the baseband signal after interpolation;
the multi-phase digital oscillators receive the baseband signals output by the sampling rate conversion module, carry out frequency conversion on the baseband signals, carry out interpolation on the sampling rate of the baseband signals and then output the baseband signals;
the combiner is used for receiving baseband signals output by the multiphase digital oscillator, combining and adding the baseband signals into interference signals and then outputting the interference signals;
and the digital-to-analog conversion module is used for receiving the interference signal output by the combiner, performing digital-to-analog conversion on the interference signal and then outputting the interference signal.
Preferably, the interference signal generating apparatus further includes:
and the power amplifier is used for receiving the interference signal output by the digital-to-analog conversion module, performing power amplification on the interference signal, and outputting the interference signal after power amplification through an antenna.
Preferably, the maximum complex bandwidth of the baseband signal generated by the baseband signal generation module is 62.5MHz × R, where R is a raised cosine roll-off factor.
Preferably, the sampling rate conversion module interpolates the sampling rate of the baseband signal to 250 MHz.
Preferably, the multi-phase digital oscillator interpolates the sampling rate of the baseband signal to 1 GHz.
Preferably, the multiphase digital oscillator comprises:
the parallel interpolation module is used for receiving the baseband signals sent by the sampling rate conversion module, performing Lagrange interpolation on the sampling rate of the baseband signals, and dividing the interpolated baseband signals into a plurality of paths to be sent out in parallel;
the DDS modules are used for receiving the baseband signals sent by the parallel interpolation module and changing the O intermediate frequency signals of the baseband signals to a preset carrier frequency value;
and a fixed phase difference exists between the adjacent DDS modules.
A method of interfering signal generation, comprising:
generating a baseband signal;
sending the baseband signal to a sampling rate conversion module, and carrying out Lagrange interpolation on the sampling rate of the baseband signal;
sending the baseband signals to a plurality of parallel digital oscillators for frequency conversion and sampling rate interpolation;
combining and adding baseband signals output by the digital oscillators in parallel into interference signals;
and D/A conversion is carried out on the interference signal, and the interference signal is output.
Preferably, the method of generating a baseband signal includes: and two paths of M sequences are used as data source signal symbols, and are used as baseband signals after being subjected to raised cosine roll-off forming and filtering.
Preferably, when the baseband signal is generated, the roll-off factor of the roll-off filter is selected to be 0.25, the interpolation coefficient of the raised cosine filter is 4, and the baseband processing clock is 250 MHz.
Preferably, the sampling rate conversion module interpolates the sampling rate of the baseband signal by using a 4-order lagrange interpolation method.
The invention has the beneficial effects that: the invention realizes flexible full-band suppression and bandwidth-variable multipoint suppression interference.
Drawings
Fig. 1 is a schematic diagram of a specific structure of an interference signal generating apparatus;
fig. 2 is an overall block diagram of an interference signal generating apparatus;
FIG. 3 is a schematic diagram of baseband signal generation;
FIG. 4 is a schematic flow chart of a Lagrangian interpolation process;
FIG. 5 is a schematic diagram of a multiphase digital oscillator;
fig. 6 is a flowchart illustrating a method for generating an interference signal.
Detailed Description
The technical solutions of the present invention will be described clearly and completely with reference to the following embodiments, and it should be understood that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be obtained by a person skilled in the art without inventive effort based on the embodiments of the present invention, are within the scope of the present invention.
Referring to fig. 1 to 6, the present invention provides an interference signal generating apparatus and method:
as shown in fig. 1, the interference signal generating apparatus in this embodiment adopts an FPGA (field programmable gate array) + DAC (digital-to-analog conversion module) structure, where the FPGA has a baseband signal generating module, a sampling rate conversion module, a plurality of multiphase digital oscillators (NCO) and a combiner, and the DAC selects AD 9163. The AD9163 supports the bandwidth of a baseband signal at most of 1GHz, and the FPGA cannot input data into the DAC at the rate of 1GHz, so that the FPGA uses a parallel multiphase processing technology to divide 4 paths of high-speed data into 4 paths of data to be input into the AD9163 in parallel, and the rate of each path is 250 MHz.
The interference signal generating device further comprises a Power Amplifier (PA), wherein the PA is used for receiving the interference signal output by the D/A conversion module, performing power amplification on the interference signal, and outputting the interference signal after power amplification through an antenna.
As shown in fig. 2, an interference signal generating apparatus includes a baseband signal generating module, a sampling rate converting module, a plurality of multiphase digital oscillators, a combiner, and a digital-to-analog converting module.
In fig. 2, freq represents frequency, sample _ en represents sample enable, I _ data represents in-phase data, Q _ data represents quadrature data, IQ0 represents 0 th path in-phase and quadrature data, IQ1 represents 1 st path in-phase and quadrature data, IQ2 represents 2 nd path in-phase and quadrature data, and IQ3 represents 3 rd path in-phase and quadrature data.
The baseband signal generating module is used for generating a baseband signal and outputting the baseband signal.
Specifically, as shown in fig. 3, the baseband signal generating module includes an M sequence generator and a raised cosine roll-off filter, the M sequence generator is used to generate two M sequences as data source signal symbols, and the two M sequences are filtered by the raised cosine roll-off filter to be used as a baseband signal IQ, where a roll-off factor of the roll-off filter is 0.25, an interpolation coefficient of the raised cosine filter is 4, and a baseband processing clock of the FPGA is 250MHz, so that a maximum symbol rate of a single baseband signal supports 62.5MHz (250/4), a maximum bandwidth of the baseband signal is 62.5MHz/2 (1 + 0.25), and a bandwidth of the baseband signal after conversion to radio frequency is 62.5MHz (1 + 0.25) ═ 78.125 MHz.
In fig. 3, sample _ en denotes sample enable, I _ data denotes in-phase data, Q _ data denotes quadrature data, I _ seq denotes in-phase random data, and Q _ seq denotes quadrature random data.
The sampling rate conversion module is used for receiving the baseband signal output by the baseband signal generation module, performing Lagrange interpolation on the sampling rate of the baseband signal, and outputting the baseband signal after interpolation.
Specifically, the shaping filtering interpolation coefficient is fixed to be 4, so that the sampling rate of the baseband signal determines the signal bandwidth; in order to realize that the bandwidth of a generated signal is configurable, and meanwhile, the clock of an FPGA system does not need to be frequently modified, so that sampling rate conversion is needed, the sampling rate of a baseband signal can be 0-250 MHz, and the sampling rate of the baseband signal is changed into uniform 250MHz after the sampling rate conversion.
In this embodiment, a lagrange interpolation method is combined, the actual signal bandwidth can be configured in real time by software, and effective interference can be implemented for different target signal bandwidths.
In this embodiment, the signal sampling rate conversion is implemented by using a 4-order lagrange interpolation method, and since the baseband signal sampling rate is not greater than 250MHz, each clock needs to output one sampling point data under the drive of the 250MHz clock of the FPGA. For example, if the sampling rate of the baseband signal after the shaping filtering is 62.5MHz, the bandwidth of the baseband signal is 15.625MHz/2 (1 + 0.25), and the FPGA clock is 250MHz, so that one sample of the baseband signal is updated every 4 clocks, and each clock updates 0.25 sample, then the sample value at the position of 0.25 decimal point needs to be implemented by interpolation, and the corresponding implementation flow is shown in fig. 4.
According to the Lagrange interpolation method,
wherein the content of the first and second substances,
where x denotes the signal, μ denotes the fractional sampling interval, Ts denotes the sampling interval,
represents the weight coefficient of the 0 th sample point,
represents the weight coefficient of the 1 st sample point,
represents the weight coefficient of the 2 nd sample point,
representing the weight coefficient of the 3 rd sample point.
The multi-phase digital oscillators are used for receiving the baseband signals output by the sampling rate conversion module, carrying out frequency conversion on the baseband signals, carrying out interpolation on the sampling rate of the baseband signals and then outputting the baseband signals.
The multiphase digital oscillator includes: the parallel interpolation module is used for receiving the baseband signals sent by the sampling rate conversion module, performing Lagrange interpolation on the sampling rate of the baseband signals, and dividing the interpolated baseband signals into a plurality of paths to be sent out in parallel; the DDS modules are used for receiving the baseband signals sent by the parallel interpolation module and changing the O intermediate frequency signals of the baseband signals to a preset carrier frequency value; and a fixed phase difference exists between the adjacent DDS modules.
Specifically, the optimal operation clock of the FPGA is below 250MHz, and an excessively high clock may cause timing instability, resulting in an output signal inconsistent with an expected output signal. Theoretically, a 250MHz sampling rate can maximally output signals with a bandwidth of 125MHz, and the signal sampling rate is increased to 1000MHz through a 4-path parallel NCO module (multiphase digital oscillator). The parallel NCO module is divided into two parts, the first part is a parallel interpolation module, a baseband signal with a sampling rate of 250MHz is interpolated to a sampling rate of 1GHz, and the baseband signal is parallelly sent out in 4 paths; the second part is that 4-path DDS modules realize frequency conversion, and change the baseband O intermediate frequency signal to a certain carrier frequency value, wherein, the 4-path DDS modules have a fixed phase difference, which is substantially multiphase NCO, and the corresponding flow is shown in figure 5.
In fig. 5, Freq represents frequency, sample _ en represents sample enable, I _ data represents in-phase data, Q _ data represents quadrature data, IQ0 represents 0 th path in-phase and quadrature data, IQ1 represents 1 st path in-phase and quadrature data, IQ2 represents 2 nd path in-phase and quadrature data, IQ3 represents 3 rd path in-phase and quadrature data, Freq _ word represents a frequency control word, and Δ θ represents an offset frequency control word.
In this embodiment, the sampling rate of the signal sent by the FPGA theoretically may reach 1GHz, and the image rejection effect inside the DAC is considered, and 50MHz guard bandwidths are reserved on both sides, so that a 900MHz ultra wide band interference signal can be realized to the maximum, and a large-gain spread spectrum signal can be effectively suppressed. In addition, the embodiment may not only be used for blocking interference of a full frequency band, but also be used for only interfering some frequency points through software configuration, and the interference bandwidth of each frequency point may be configured.
The combiner is used for receiving baseband signals output by the multiphase digital oscillator, combining and adding the baseband signals into interference signals, and then outputting the interference signals.
The digital-to-analog conversion module is used for receiving the interference signal output by the combiner, performing digital-to-analog conversion on the interference signal and then outputting the interference signal.
As shown in fig. 6, an interference signal generating method includes:
and S1, generating a baseband signal.
Specifically, the method for generating the baseband signal includes: and two paths of M sequences are used as data source signal symbols, and are used as baseband signals after being subjected to raised cosine roll-off forming and filtering. When the baseband signal is generated, the roll-off factor of the roll-off filter is selected to be 0.25, the interpolation coefficient of the raised cosine filter is 4, and the baseband processing clock is 250 MHz.
And S2, sending the baseband signal to a sampling rate conversion module, and performing Lagrange interpolation on the sampling rate of the baseband signal.
Specifically, the sampling rate conversion module interpolates the sampling rate of the baseband signal by using a 4-order lagrange interpolation method, so that the sampling rate of the baseband signal is changed into uniform 250 MHz.
And S3, sending the baseband signals to a plurality of parallel digital oscillators for frequency conversion and sampling rate interpolation.
The digital oscillator changes the 0 intermediate frequency signal of the baseband to a preset carrier frequency value and interpolates the baseband signal with the sampling rate of 250MHz to the sampling rate of 1 GHz.
And S4, combining and adding baseband signals output by the digital oscillators in parallel to form interference signals.
And S5, performing digital-to-analog conversion on the interference signal, and outputting the interference signal.
The interference signal generation method further includes: and carrying out power amplification on the interference signal, and outputting the interference signal after power amplification through an antenna.
The foregoing is illustrative of the preferred embodiments of this invention, and it is to be understood that the invention is not limited to the precise form disclosed herein and that various other combinations, modifications, and environments may be resorted to, falling within the scope of the concept as disclosed herein, either as described above or as apparent to those skilled in the relevant art. And that modifications and variations may be effected by those skilled in the art without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (10)
1. An interference signal generation apparatus, comprising:
the baseband signal generating module is used for generating a baseband signal and outputting the baseband signal;
the sampling rate conversion module is used for receiving the baseband signal output by the baseband signal generation module, performing Lagrange interpolation on the sampling rate of the baseband signal and outputting the baseband signal after interpolation;
the multi-phase digital oscillators receive the baseband signals output by the sampling rate conversion module, carry out frequency conversion on the baseband signals, carry out interpolation on the sampling rate of the baseband signals and then output the baseband signals;
the combiner is used for receiving baseband signals output by the multiphase digital oscillator, combining and adding the baseband signals into interference signals and then outputting the interference signals;
and the digital-to-analog conversion module is used for receiving the interference signal output by the combiner, performing digital-to-analog conversion on the interference signal and then outputting the interference signal.
2. The interference signal generating apparatus of claim 1, wherein the interference signal generating apparatus further comprises:
and the power amplifier is used for receiving the interference signal output by the digital-to-analog conversion module, performing power amplification on the interference signal, and outputting the interference signal after power amplification through an antenna.
3. The interference signal generating apparatus of claim 1, wherein the baseband signal generating module generates the baseband signal with a maximum complex bandwidth of 62.5MHz x R, where R is a raised cosine roll-off factor.
4. The jammer generator of claim 1, wherein the sample rate converter module interpolates the sample rate of the baseband signal to 250 MHz.
5. The jammer generator of claim 1, wherein the multi-phase digital oscillator interpolates the sample rate of the baseband signal to 1 GHz.
6. The interference signal generating apparatus of claim 1, wherein the multi-phase digital oscillator comprises:
the parallel interpolation module is used for receiving the baseband signals sent by the sampling rate conversion module, performing Lagrange interpolation on the sampling rate of the baseband signals, and dividing the interpolated baseband signals into a plurality of paths to be sent out in parallel;
the DDS modules are used for receiving the baseband signals sent by the parallel interpolation module and changing the O intermediate frequency signals of the baseband signals to a preset carrier frequency value;
and a fixed phase difference exists between the adjacent DDS modules.
7. A method for generating an interference signal, comprising:
generating a baseband signal;
sending the baseband signal to a sampling rate conversion module, and carrying out Lagrange interpolation on the sampling rate of the baseband signal;
sending the baseband signals to a plurality of parallel digital oscillators for frequency conversion and sampling rate interpolation;
combining and adding baseband signals output by the digital oscillators in parallel into interference signals;
and D/A conversion is carried out on the interference signal, and the interference signal is output.
8. The method of claim 7, wherein the step of generating the baseband signal comprises: and two paths of M sequences are used as data source signal symbols, and are used as baseband signals after being subjected to raised cosine roll-off forming and filtering.
9. The interference signal generation method of claim 8, wherein when generating the baseband signal, a roll-off filter roll-off factor is selected to be 0.25, a raised cosine filter interpolation coefficient is 4, and a baseband processing clock is 250 MHz.
10. The method as claimed in claim 7, wherein the sample rate conversion module interpolates the sample rate of the baseband signal by a 4 th order Lagrangian interpolation method.
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Application publication date: 20210330 |