CN112564950B - Low-delay simulation intelligent adapting and long-line transmission device - Google Patents

Low-delay simulation intelligent adapting and long-line transmission device Download PDF

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CN112564950B
CN112564950B CN202011352820.9A CN202011352820A CN112564950B CN 112564950 B CN112564950 B CN 112564950B CN 202011352820 A CN202011352820 A CN 202011352820A CN 112564950 B CN112564950 B CN 112564950B
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data
serial port
simulation
data information
length
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CN112564950A (en
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黄杉
程禹
郝恩义
柳超杰
徐啸
张业鑫
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Shanghai Shenjian Electromechanical Engineering Co ltd
Shanghai Institute of Electromechanical Engineering
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Shanghai Shenjian Electromechanical Engineering Co ltd
Shanghai Institute of Electromechanical Engineering
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L41/00Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
    • H04L41/14Network analysis or design
    • H04L41/145Network analysis or design involving simulating, designing, planning or modelling of a network
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/02Details

Abstract

The invention provides a low-delay simulation intelligent adapting and long-line transmission device, which comprises: the device comprises a reflection memory card (1), a simulation equipment interface module (2) and an interface controller (3); the reflective memory cards (1) of the low-delay simulation intelligent adapting and long-line transmission devices are all connected with a reflective memory switch to form a reflective memory network, and data information written in each reflective memory card (1) can be automatically transmitted to onboard memories of other reflective memory cards (1) in the reflective memory network; the simulation equipment interface module (2) is provided with an input/output channel and can perform data information interaction with a simulation tested object; the invention uses the reflective memory network as a long-distance transmission medium, compared with the Ethernet, the invention reduces the CPU overhead, ensures the transmission delay, has convenient hardware operation, is independent of an operating system, and can realize the real-time data transmission between different-place heterogeneous systems. Aiming at serial port data transmission, a mode of 'receiving while sending' is adopted, and transmission delay is effectively reduced.

Description

Low-delay simulation intelligent adapting and long-line transmission device
Technical Field
The invention relates to the technical field of real-time data communication, in particular to a low-delay simulation intelligent adapting and long-line transmission device.
Background
Along with the complexity and diversification of air combat environment interference, meanwhile, formation cooperative combat and multi-azimuth saturated attack tactics are adopted for combat objects, and air defense missile weaponry cannot adapt to a new combat mode by adopting a single mode. The traditional combat thought is broken through by multi-missile cooperative guidance/multi-body cooperative combat, mutual communication and information sharing among missiles are realized through a data link, so that more efficient overall combat efficiency is obtained, and the method is one of the leading roles of a future battlefield.
The real-time simulation technology and application provide full-life-cycle support for design, development, sizing, batch production and the like of complex weaponry, but the current semi-physical simulation still mainly uses single missile guidance control system simulation, and cannot effectively meet the requirements of multi-missile cooperation/multi-body cooperation/full-system full-link real-time simulation of the complex weaponry.
The existing simulation resources are integrated, a plurality of sets of test systems are utilized to develop a combined simulation test, and the simulation of the full link of a multi-bullet or weapon system is completed, which is one of the main solution approaches. However, a plurality of sets of simulation test systems have constraint conditions of isomerism, different places, real time and the like, and a high-speed, low-delay, long-distance and multi-signal-type transmission device is needed to meet long-distance and real-time data interaction between systems, between a tested object and between a simulation system and the tested object.
The transmission mode widely used at present is that after signals are collected locally, the signals are transmitted to a far end through Ethernet or optical fibers, and far-end equipment needs to additionally develop threads for data real-time monitoring, copying and network protocol interpretation, so that the program design is complex and the CPU cost is high; in addition, the Ethernet transmission adopts CSMA/CD collision detection protocol, the transmission delay is uncertain, and the requirement of real-time simulation cannot be met. Meanwhile, serial port data generally adopt the mode that the data packet is received and then transferred, compare with direct serial port communication between the testees, increased the consuming time of transmission device received data, this consuming time overlength can influence the interactive real-time of data between the testees.
Disclosure of Invention
Aiming at the defects in the prior art, the invention aims to provide a low-delay simulation intelligent adapting and long-line transmission device.
The invention provides a low-delay simulation intelligent adapting and long-line transmission device, which comprises a reflection memory card 1, a simulation equipment interface module 2 and an interface controller 3;
the reflective memory cards 1 of the low-delay simulation intelligent adapting and long-line transmission devices are all connected with a reflective memory switch to build a reflective memory network, and data information written in each reflective memory card 1 can be automatically transmitted to onboard memories of other reflective memory cards 1 in the reflective memory network;
the simulation equipment interface module 2 is provided with an input/output channel and can perform data information interaction with a simulation tested object;
the interface controller 3 is connected with the reflective memory card 1 and the emulation device interface module 2 through the PCI bus respectively, the interface controller 3 can write the output data information of the emulation tested object received by the emulation device interface module 2 into the storage address on the corresponding reflective memory card 1, and simultaneously read the input data information required by the emulation tested object from the reflective memory card 1, and after processing, the input data information is sent to the corresponding output channel of the emulation device interface module 2.
Preferably, the simulation device interface module 2 comprises a serial port card 21, an AD card 22, a DA card 23, and a DIO card 24, wherein the serial port card 21 provides a serial port communication interface, the AD card 22 provides an analog quantity acquisition interface, the DA card 23 provides an analog quantity output interface, and the DIO card 24 provides a digital quantity input/output interface.
Preferably, the interface controller 3 runs an RTX real-time operating system, which includes a data feature table 31, a data distribution software module 32, and a serial data processing software module 33;
the data characteristic table 31 is used for realizing intelligent adaptation of the simulated tested object through the data characteristic table 31 according to a starting point, an end point and a data type of data obtained by sorting input and output information data of the simulated tested object, a storage address of the data on an onboard memory of the reflective memory card 1 and a serial port data communication protocol;
the data distribution software module 32 writes the output data of the simulated object to be tested into the corresponding storage address of the reflective memory card 1 according to the start point, the end point and the data type of the data in the data feature table 31, and simultaneously sends the input data required by the simulated object to the corresponding data output channel of the simulation equipment interface module 2; the data distribution software module 32 comprises a sending end and a receiving end;
the serial data processing software module 33 processes the serial output data of the simulated object according to the serial data communication protocol in the data feature table 31, and generates the serial input data required by the simulated object.
Preferably, the data characteristic table 31 is written according to the following rules:
rule 1: according to the input and output information of the simulation tested object, the starting point, the end point and the data type of the data are obtained through sorting, and the data and the offset of the storage address of the updating mark in the reflective memory 1 relative to the base address are automatically generated;
rule 2: according to a serial port data communication protocol, arranging and obtaining configuration conditions of a data bit, a stop bit, a check bit, a baud rate, a frame header, a data length and a data packaging mode of a serial port channel;
rule 3: the method comprises the steps that according to the electrical connection relation between a simulation tested object and an input/output channel of a simulation equipment interface module 2, the input/output channel of a hardware interface of a low-delay simulation intelligent adapting and long-line transmission device through which data pass is obtained through sorting, wherein input/output channel information comprises the node number of a reflective memory card 1 of the low-delay simulation intelligent adapting and long-line transmission device, the equipment number of a simulation equipment interface module 2 board card of which the input/output channel is located, and the channel number used by the input/output channel;
rule 4: and according to the simulation test working condition, arranging to obtain parameters needing to be monitored and modified in the serial port data information.
Preferably, the data distribution software module 32 receives data information output by the simulated object from the simulated device interface module 2, and writes the data information into the storage address of the corresponding reflective memory card 1;
the data distribution software module 32 reads the input data information required by the simulation of the tested object in the reflective memory card 1, and if the data information is non-serial port data information, the data information is directly sent to the corresponding output channel of the simulation equipment interface module 2; if the data information is serial data information, the serial data information is sent to the serial data processing software module 33 for analysis and processing, and then sent to the serial output channel of the corresponding simulation equipment interface module 2.
Preferably, when the data information is non-serial data information, the receiving process of the data information is as follows:
at a data receiving end, triggering and receiving data information by timing interruption of a system clock period, scanning a non-serial port input channel in an interface module 2 of the simulation equipment, acquiring output data information of a simulation tested object, obtaining a storage address of a reflection memory card 1 corresponding to the received data information according to the data input channel in a data feature table 31, storing the data information to the storage address of the corresponding reflection memory card 1, and updating a mark 1 for the corresponding data information in the reflection memory card 1;
when the data information is non-serial port data information, the sending process of the data information is as follows:
at a data sending end, sending data information by timing interrupt triggering in a system clock period, according to a data output channel in a data feature table 31, extracting the storage address of a reflective memory card 1 simulating input data information and an update flag word of the input data information required by a tested object, circularly reading a required data information update identifier in the reflective memory card 1, setting a data information update identifier to be 1, reading input data required by the simulated tested object from the corresponding storage address of the reflective memory card 1, sending the data to a corresponding non-serial port output channel in a simulation equipment interface module 2, and setting a data information update identifier in the reflective memory card 1 to be 0.
Preferably, when the received data information is serial data information, first extracting the data length K, the data storage first address a, and the data update identification storage address B of the data information in the data feature table 33, and then performing a data information receiving process according to the following steps:
step S1: at a data receiving end, waiting for a receiving register readable interrupt signal of the serial port card;
step S2: reading a data packet in a receiving register of an interrupt source serial port channel after receiving a receiving register readable interrupt signal of the serial port card;
and step S3: judging the length M of the received data information in the received data packet, if the length M of the received data information is less than 2, executing a step S3.1, if the length M of the received data information is more than or equal to 2, indicating that the received data information is non-frame header data information, executing a step S4;
step S3.1: comparing the received data information with the data frame header of the serial port channel in the data feature table 31, if the frame header is correctly verified, executing the step S4, otherwise, setting M to be 0, and returning to execute the step S1;
and step S4: writing the received serial port data into a corresponding reflective memory storage address A + M;
step S5: updating the length M of the received data to be M +1, writing the updated M into a reflecting memory data updating identification storage address B, and returning to the step S1;
preferably, the data distribution process of the serial port sending terminal is as follows: firstly, intelligently distributing the cache size of a corresponding serial port channel according to a serial port communication protocol in a data characteristic table, and setting the initial address of a cache region as X; if the serial port data needs to be modified and a single parameter in a serial port protocol bound by the serial port channel needs to be represented by N bytes at most, caching the serial port data into N +1 bytes; if the serial port data does not need to be modified, N is 1, and the cache is 2 bytes; extracting the data length K, the data storage initial address A and the data updating identification storage address B in the data characteristic table 33 bound by the serial port output channel, and executing the following steps in a main thread:
step D1, creating a semaphore Event and setting the Event to be in an activated state;
step D2, waiting for the activation of the semaphore Event;
step D3, freezing the semaphore Event after the semaphore Event is activated;
d4, reading the data length M received by the receiving end of the data bound by the serial port channel from the reflective memory address B;
step D5, if M is less than N +1, returning to the step D4, otherwise, returning to the step D2 after the 'sending register empty' interrupt of the corresponding serial port card 21 is enabled;
in the interrupt service routine of "sending register null", the following steps are carried out:
step E1, waiting for the interrupt of the serial port card 'sending register null';
step E2, after receiving a serial port card sending register empty interrupt signal, reading the received data length M of a receiving end of the data bound by the serial port channel from the reflecting memory address B;
e3, writing M-L data stored in the reflective memory addresses A + L to A + M-1 into cache addresses X to X + M-L-1;
e4, transmitting the cache data to the serial port data processing software module 33 for processing to obtain the processed data length Z of the return value cache region of the serial port data processing software module 33;
e5, writing all the Z byte data in the cache addresses from X to X + Z-1 into a sending register of the corresponding serial port card 21;
e6, updating the length L of the sent data to be L + Z;
and E7, if L is less than K, returning to the step E1 to continue waiting for the 'sending register empty' interrupt, otherwise forbidding the 'sending register empty' interrupt, resetting the sent data length L to 0, resetting the received data length M to 0, and activating the semaphore Event.
Preferably, the serial data processing software module 33 defines a pointer P to point to the parameter sequence according to the serial data frame feature table, and initially points to the parameter sequence number 1, and then completes data modification and extraction of parameters to be monitored according to the following steps;
step M1: setting the processed data length Z in the cache to be 0, reading the sent data length L and the received data length M of the current data packet;
step M2: comparing the data length K, the sent data length L and the sum of the processed data length Z in the cache, if L + Z is less than K, executing the step M3, otherwise executing the step M5;
step M3: extracting a starting byte C and a parameter length D of a parameter pointed by the pointer P;
step M4: comparing the length M of the received data, the starting byte C of the parameter pointed by the pointer P and the sum of the length D of the parameter, if M is less than C + D, indicating that the sent data and the data in the cache can be completely expressed to the previous parameter of the parameter pointed by the pointer P, executing a step M5, otherwise, executing a step M6;
step M5: the pointer P is subtracted from 1 to point to the previous parameter in the serial port data frame feature table, the initial byte C and the parameter length D of the previous parameter are extracted, the processed data byte length Z = C + D-L in the cache is obtained, and then the step M7 is executed;
step M6: after Z is updated to Z + D, judging whether the parameter pointed by the pointer P needs to be modified, if not, adding 1 to the pointer P to point to the next parameter in the serial port data frame feature table, and returning to the step M2; if the data needs to be modified, analyzing the data from the Z-th byte to the Z + D-1 th byte in the cache according to the data type characteristics and the scale factor characteristics of the affiliated parameters, then calculating the analysis value and the modification factor according to a modification mode to obtain a modified analysis value, coding the modified analysis value according to the data type characteristics and the scale factor characteristics to obtain a modified coded value, updating the modified coded value to the Z-th byte to the Z + D-1 th byte in the cache, then adding 1 to the pointer P, and returning to the step M2;
step M7: and setting the return value as Z, if L + Z is more than or equal to K, resetting the pointer P to point to the parameter of the sequence number 1, otherwise, keeping the pointer P, and then returning to the data distribution module 32.
According to the steps, the analysis, modification and coding of the parameters can be completed in a self-adaptive manner. In addition, after the last byte number of the current data packet is processed, the content of the current data packet is analyzed according to the serial port data feature table, parameters to be monitored are extracted and written into the corresponding storage address of the reflective memory card for the simulation computer in the reflective memory network to use.
Compared with the prior art, the invention has the following beneficial effects:
1. the invention has reasonable flow structure and convenient use, and can overcome the defects of the prior art;
2. the invention processes serial port data forwarding by using a mode of sending and receiving simultaneously, and reduces the time consumption of data transmission compared with the traditional mode of sending after receiving. For example, 50 bytes of data are transmitted, the baud rate is 460800,1 bit start bit, 8 bit data bit, 1 bit stop bit and 1 bit check bit, a single parameter in serial data needs 4 bytes at most to represent, a traditional 'receiving and sending-out' mode is used, the data is sent out from a simulated object to be tested, the data is completely received, and the transmission delay is at least the time consumption for transmitting 50 x 2 bytes and is about 2.39ms; by using the 'transmitting and receiving' mode designed by the invention, the transmission delay is at least the time consumption of transmitting 50+5 bytes, which is about 1.31ms. Meanwhile, the longer the length of single-frame data is, the more obvious the effect of saving time is;
3. the invention uses the data characteristic table to store parameters of the starting point, the end point, the data type, the passing input interface channel, the passing output interface channel, the communication protocol and the like of the data, and matches with the serial port data processing software module, thereby adjusting the content of the data characteristic table according to the actual test situation, and completing the adaptation of the test state without changing the program. The serial port data feature table is used as the input of the serial port data processing, and the self-adaptive parameter analysis, modification and encoding of the serial port data are realized;
4. the invention uses the reflective memory network as the long-distance transmission medium, compared with the Ethernet, the invention reduces the CPU cost, ensures the transmission delay, has convenient hardware operation, is independent of the operation system, and can realize the real-time data transmission between different-place heterogeneous systems.
Drawings
Other features, objects and advantages of the invention will become more apparent upon reading of the detailed description of non-limiting embodiments with reference to the following drawings:
fig. 1 is a schematic diagram of a low-latency emulation adaptive and long-line transmission apparatus according to the present invention.
Fig. 2 is a schematic diagram of a non-serial port data distribution process in the embodiment of the present invention.
Fig. 3 is a schematic diagram of a data distribution flow of a serial port receiving channel in the embodiment of the present invention.
Fig. 4 is a schematic diagram of a data distribution flow of a serial port transmission channel in the embodiment of the present invention.
Fig. 5 is a schematic diagram of a serial port data frame structure in the embodiment of the present invention.
Fig. 6 is a serial port data feature representation intention in the embodiment of the present invention.
Fig. 7 is a schematic flow chart of a serial port data processing software module in the embodiment of the present invention.
Detailed Description
The present invention will be described in detail with reference to specific examples. The following examples will aid those skilled in the art in further understanding the present invention, but are not intended to limit the invention in any manner. It should be noted that variations and modifications can be made by persons skilled in the art without departing from the concept of the invention. All falling within the scope of the present invention.
In the description of the present application, it is to be understood that the terms "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience in describing the present application and simplifying the description, but do not indicate or imply that the referred device or element must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present application.
Fig. 1 is a block diagram of a low-latency emulation adaptation and long-line transmission apparatus, and as shown in fig. 1, the apparatus mainly includes a reflective memory card (1), an emulation device interface module (2), and an interface controller (3).
The interface controller (3) generally uses an industrial personal computer as a carrier to run an RTX real-time operating system, and a PCI bus slot on a mainboard of the interface controller is provided with the reflection memory card (1) and the simulation equipment interface module (2) (comprising a serial port card (21), an AD card (22), a DA card (23) and a DIO card (24)); the interface controller (3) writes the output data of the simulated tested object received by the simulation equipment interface module (2) into the corresponding storage address on the reflective memory card (1), reads the input data required by the simulated tested object from the reflective memory card (1), and sends the input data to the corresponding output channel of the simulation equipment interface module (2) after processing. The interface controller (3) is divided into a data characteristic table (31), a data distribution software module (32) and a serial port data processing software module (33) according to the functional modules.
The data characteristic table (31) comprises information such as a starting point, an end point and a data type of data, a storage address of the data on a board-mounted memory of the reflecting memory card and a communication protocol when the data is of a serial port data type; it is written according to the following rules:
a) According to the input and output information of each simulation tested object, the starting point, the end point and the data type of the data are obtained through sorting, and the data and the offset of the storage address of the updating mark in the reflective memory relative to the base address are automatically generated;
b) According to a serial port data communication protocol, arranging and obtaining the configuration conditions of a data bit, a stop bit, a check bit, a baud rate, a frame header, a data length and a data packaging mode of each serial port channel;
c) The method comprises the steps that according to the electrical connection relation between each simulation tested object and each board card input/output channel of a simulation equipment interface module (2), the input channel and the output channel of a hardware interface of the device through which data pass are obtained through sorting, wherein input and output channel information comprises a node number of a reflection memory card (1) of the device, an equipment number of a board card of the simulation equipment interface module (2) where the input and output channels are located, and a used channel number;
d) And according to the simulation test working condition, the parameters needing to be monitored and modified in the serial port data are obtained through sorting.
The data distribution software module (32) is used for distributing data, firstly reads the data characteristic table (31), and extracts the characteristic information of the data to be distributed according to the number of the reflective memory node; and writing the output data of the simulated tested object into the storage address on the corresponding reflective memory card (1), and simultaneously sending the input data required by the simulated tested object to the corresponding data output channel of the simulation equipment interface module (2), wherein different data processing flows exist according to different data types.
Fig. 2 is a non-serial port data distribution flow chart, and referring to fig. 2, for analog and digital quantities, a distribution program is triggered in a system clock cycle, and the following branches are completed in parallel:
a) At a data receiving end, scanning DI channels in an AD card (22) and a DIO card (24) in a simulation equipment interface module (2), sampling to obtain output data of a simulation tested object, obtaining a reflection memory storage address corresponding to the received data according to a data input channel in a data feature table (31), storing the data to the corresponding storage address, and updating a mark 1 for the corresponding data in the reflection memory;
b) At a data sending end, according to a data output channel of a data feature table (31), extracting input data required by a local simulation tested object and a storage address of an update flag word thereof, circularly reading an update identifier of the required data in a reflective memory, setting a to-be-identified value to 1, reading the input data required by the local simulation tested object from the corresponding storage address of the reflective memory, writing the data into a DA (data acquisition) card (23) in a simulation equipment interface module and a DO (data output) channel in a DIO (digital-to-analog) card (24), and setting a storage identifier in the reflective memory to 0.
Fig. 3 is a data distribution flow of a serial port receiving end, and referring to fig. 3, firstly, a data length K, a data storage initial address a, and a data update identifier storage address B in a data feature table (33) bound by a channel are extracted, and then the following steps are performed:
a) Waiting for a receive register readable interrupt signal of the serial port card;
b) Reading a data packet in a receiving register of an interrupt source serial port channel after receiving a receiving register readable interrupt signal of the serial port card;
c) Judging the length M of the received data information in the received data packet, if the length M of the received data information is less than 2, executing the step d, if the length M of the received data information is more than or equal to 2, indicating that the received data information is non-frame header data information, executing the step e;
d) Comparing the received data information with the data frame header of the serial port channel in the data feature table (31), if the frame header is correctly verified, executing the step e, otherwise, setting M to be 0, and returning to execute the step a;
e) Writing the received data into a corresponding reflective memory storage address A + M;
f) Updating the length M of the received data to be M +1, writing the updated M into a reflecting memory data updating identifier storage address B, and returning to the step a;
fig. 4 is a data distribution flow chart of the serial port sending end, and as shown in fig. 4, firstly, according to the serial port communication protocol in the data feature table, the cache size of the corresponding serial port channel is intelligently allocated, and the initial address of the cache region is set to be X; if the serial port data needs to be modified and a single parameter in a serial port protocol bound by the serial port channel needs to be represented by N bytes at most, the serial port data is cached into N +1 bytes; if the serial port data does not need to be modified, N is 1, and the cache is 2 bytes; extracting the data length K, the data storage initial address A and the data updating identification storage address B in a data characteristic table (33) bound by the serial port output channel, and executing in a main thread according to the following steps:
a) Creating a semaphore Event and setting the Event to an active state;
b) After the semaphore Event is activated, waiting for the semaphore Event to be activated;
c) Freezing the semaphore Event;
d) Reading the data length M received by a receiving end of the data bound by the serial port channel from the reflective memory address B;
e) If M is less than N +1, returning to the step d, otherwise, returning to the step b after enabling the 'sending register empty' interrupt of the corresponding serial port card (21);
in the 'sending register empty' interrupt service routine, the following steps are carried out:
a) Waiting for the serial port card to send a register empty interrupt;
b) After receiving a 'sending register empty' interrupt signal of the serial port card, reading the length M of the data received by a receiving end of the data bound by the serial port channel from a reflecting memory address B;
c) Writing M-L data stored in the reflecting memory addresses A + L to A + M-1 into cache addresses X to X + M-L-1;
d) Transmitting the cache data to a serial port data processing software module (33) for processing to obtain the processed data length Z of a return value cache region of the serial port data processing software module (33);
e) All Z byte data in the cache addresses from X to X + Z-1 are written into a sending register of the corresponding serial port card (21);
f) Updating the length L of the sent data to be L + Z;
g) If L is less than K, returning to step a to continue waiting for the 'sending register empty' interrupt, otherwise forbidding the 'sending register empty' interrupt, resetting the sent data length L to be 0, resetting the received data length M to be 0, and activating the semaphore Event.
Fig. 5 is a structure diagram of a serial data frame, and referring to fig. 5, serial data includes K bytes, which generally adopts the following structure:
a) 1, 2 bytes are frame headers;
b) The 3 rd byte is the effective data length N of the data packet, and N = K-5 can be obtained;
c) Bytes 4 to K-2 are parameter areas;
d) The K-1 and K bytes are check words, and data from 3 to K-2 are generally checked in a mode of sum check, CRC check and the like.
Fig. 6 is a serial data feature table, and referring to fig. 6, according to the serial data shown in fig. 5, the serial protocol may be translated into a serial data frame parsing table shown in fig. 6, and the rule includes:
a) The serial number indicates the number of parameters contained in the data frame, including a frame header, a frame length and a check word;
b) The start byte represents the offset of the parameter start address relative to the serial port data head address;
c) The parameter length represents the length of bytes occupied by the parameter;
d) The parameter types generally include const (constant), uchar (unsigned character), ushort (unsigned short integer), uint (unsigned integer), float (single precision floating point), and the like;
e) The scale factor represents the ratio of the actual value to the stored value, and if the parameter is of the const type, the scale factor is fixed to 1;
f) The operation mode between the modification mode surface parameter and the modification factor is 0, which indicates that modification is not needed, the modification mode of the check word is sum representation and check, and CRC represents CRC check;
g) The modification factor address indicates a storage address of the modification factor in the reflective memory.
h) Storing the modified parameter in the reflecting memory by the parameter storage address surface, wherein 0xffffffff represents that the parameter does not need to be stored;
fig. 7 is a schematic flow chart of a serial port data processing software module in the embodiment of the present invention, and as shown in fig. 7, a pointer P is first defined to point to a parameter number and initially point to a parameter number 1 according to a serial port data frame feature table, and then data modification and parameter extraction to be monitored are completed in the following manner;
a) Setting the processed data length Z in the cache to be 0, reading the sent data length L and the received data length M of the current data packet;
b) Comparing the data length K, the sent data length L and the sum of the processed data length Z in the cache, if L + Z is less than K, executing the step c, otherwise executing the step e;
c) Extracting a starting byte C and a parameter length D of a parameter pointed by the pointer P;
d) Comparing the length M of the received data and the initial byte C of the parameter pointed by the pointer P with the sum of the length D of the parameter, if M is less than C + D, indicating that the sent data and the data in the cache can be completely expressed to the previous parameter of the parameter pointed by the pointer P, executing the step e, otherwise, executing the step f;
e) The pointer P is subtracted from 1 to point to the previous parameter in the serial port data frame feature table, the initial byte C and the parameter length D of the previous parameter are extracted, the data byte length Z = C + D-L needing to be processed in the cache is obtained, and then the step g is executed;
f) After Z is updated to Z + D, judging whether the parameter pointed by the pointer P needs to be modified, if not, adding 1 to the pointer P to point to the next parameter in the serial port data frame feature table, and returning to the step b; if the data needs to be modified, analyzing the data from the Z-th byte to the Z + D-1 th byte in the cache according to the data type characteristics and the scale factor characteristics of the affiliated parameters, then calculating the analysis value and the modification factor according to a modification mode to obtain a modified analysis value, coding the modified analysis value according to the data type characteristics and the scale factor characteristics to obtain a modified coded value, updating the modified coded value to the Z-th byte to the Z + D-1 th byte in the cache, then adding 1 to the pointer P, and returning to the step b;
g) Setting the return value to be Z, if L + Z is larger than or equal to K, resetting the pointer P to point to the parameter of the sequence number 1, otherwise keeping the pointer P, and then returning to the data distribution module (32);
according to the steps, the work of analyzing, modifying and encoding the parameters can be completed in a self-adaptive mode. In addition, after the last byte number of the current data packet is processed, the content of the current data packet is analyzed according to the serial port data feature table, parameters to be monitored are extracted and written into the corresponding storage address of the reflective memory card for the simulation computer in the reflective memory network to use.
The invention processes serial port data forwarding by using a mode of sending and receiving simultaneously, and reduces the time consumption of data transmission compared with the traditional mode of sending after receiving. For example, 50 bytes of data are transmitted, the baud rate of 460800,1 bit start bit, 8 bit data bits, 1 bit stop bit and 1 bit check bit are required, a single parameter in serial data needs 4 bytes at most to represent, the data is transmitted from a simulation tested object to be completely received by using a traditional 'receiving and transmitting' mode, and the transmission delay is at least the time consumption for transmitting 50 x 2 bytes and is about 2.39ms; by using the 'transmitting and receiving' mode designed by the invention, the transmission delay is at least the time consumption of transmitting 50+5 bytes, which is about 1.31ms. Meanwhile, the longer the length of single frame data is, the more obvious the time saving effect is.
The invention uses the data characteristic table to store parameters such as the starting point, the end point, the data type, the passing input interface, the output interface, the communication protocol and the like of the data, and is matched with the serial port data processing software module, so that the content of the data characteristic table can be adjusted according to the actual test condition, and the adaptation of the test state can be completed without changing the program; and the serial port data feature table is used as the input of the serial port data processing, so that the self-adaptive parameter analysis, modification and encoding of the serial port data are realized.
Compared with the Ethernet, the reflective memory network is used as a long-distance transmission medium, so that the CPU overhead is reduced, the transmission delay is determined, the hardware operation is convenient, and the reflective memory network is independent of an operating system, so that the real-time data transmission between different-place heterogeneous systems can be realized.
The foregoing description has described specific embodiments of the present invention. It is to be understood that the present invention is not limited to the specific embodiments described above, and that various changes or modifications may be made by one skilled in the art within the scope of the appended claims without departing from the spirit of the invention. The embodiments and features of the embodiments of the present application may be combined with each other arbitrarily without conflict.

Claims (8)

1. A low-delay simulation intelligent adapting and long-line transmission device is characterized by comprising a reflection memory card (1), a simulation equipment interface module (2) and an interface controller (3);
the reflective memory cards (1) of the low-delay simulation intelligent adapting and long-line transmission devices are all connected with a reflective memory switch to form a reflective memory network, and data information written in each reflective memory card (1) can be automatically transmitted to onboard memories of other reflective memory cards (1) in the reflective memory network;
the simulation equipment interface module (2) is provided with an input/output channel and can perform data information interaction with a simulation tested object;
the interface controller (3) is respectively connected with the reflective memory card (1) and the simulation equipment interface module (2) through a PCI bus, the interface controller (3) can write the output data information of the simulation tested object received by the simulation equipment interface module (2) into the corresponding storage address on the reflective memory card (1), simultaneously read the input data information required by the simulation tested object from the reflective memory card (1), and send the input data information to the corresponding output channel of the simulation equipment interface module (2) after processing;
the interface controller (3) runs an RTX real-time operating system and comprises a data characteristic table (31), a data distribution software module (32) and a serial port data processing software module (33);
the serial port data processing software module (33) defines a pointer P to point to a parameter serial number and initially point to a parameter serial number 1 according to a serial port data frame feature table, and then completes data modification and extraction of parameters to be monitored according to the following steps;
step M1: setting the processed data length Z in the cache to be 0, reading the sent data length L and the received data length M of the current data packet;
step M2: comparing the sum of the data length K of the serial port data information, the sent data length L and the processed data length Z in the cache, if L + Z is less than K, executing a step M3, otherwise, executing a step M5;
step M3: extracting a starting byte C and a parameter length D of a parameter pointed by the pointer P;
step M4: comparing the length M of the received data and the initial byte C of the parameter pointed by the pointer P with the sum of the length D of the parameter, if M is less than C + D, indicating that the sent data and the data in the cache can be completely expressed to the previous parameter of the parameter pointed by the pointer P, executing a step M5, otherwise executing a step M6;
step M5: the pointer P is subtracted by 1, points to the previous parameter in the serial port data frame feature table, extracts the initial byte C and the parameter length D of the previous parameter to obtain the processed data byte length Z = C + D-L in the cache, and then executes the step M7;
step M6: after Z is updated to Z + D, judging whether the parameter pointed by the pointer P needs to be modified, if not, adding 1 to the pointer P to point to the next parameter in the serial port data frame feature table, and returning to the step M2; if the data needs to be modified, analyzing the data from the Z-th byte to the Z + D-1 th byte in the cache according to the data type characteristics and the scale factor characteristics of the parameters, calculating the analysis value and the modification factor according to a modification mode to obtain a modified analysis value, encoding the modified analysis value according to the data type characteristics and the scale factor characteristics to obtain a modified encoded value, updating the modified encoded value to the Z-th byte to the Z + D-1 th byte in the cache, adding 1 to the pointer P, and returning to the step M2;
step M7: and setting the return value as Z, if L + Z is larger than or equal to K, resetting the pointer P to point to the parameter of the sequence number 1, otherwise, keeping the pointer P, and then returning to the data distribution module (32).
2. The device for low-latency emulation smart adapter and long-line transmission according to claim 1, wherein the emulation device interface module (2) comprises a serial port card (21), an AD card (22), a DA card (23), and a DIO card (24), the serial port card (21) provides a serial communication interface, the AD card (22) provides an analog acquisition interface, the DA card (23) provides an analog output interface, and the DIO card (24) provides a digital input/output interface.
3. The low-delay simulation intelligent adapting and long-line transmission device according to claim 1, wherein the data characteristic table (31) is used for realizing the intelligent adaptation of the simulation tested object through the data characteristic table (31) according to a starting point, a finishing point, a data type, a storage address of the data on an onboard memory of the reflective memory card (1) and a serial port data communication protocol of input and output information data of the simulation tested object;
the data distribution software module (32) writes output data of the simulated tested object into a corresponding storage address of the reflective memory card (1) according to a starting point, an end point and a data type of the data in the data characteristic table (31), and simultaneously sends input data required by the simulated tested object to a corresponding data output channel of the simulation equipment interface module (2); the data distribution software module (32) comprises a sending end and a receiving end;
the serial port data processing software module (33) processes the serial port output data of the simulated tested object according to the serial port data communication protocol in the data characteristic table (31) and generates the serial port input data required by the tested simulated object.
4. The intelligent low-latency simulation adapting and long-line transmission device according to claim 3, wherein the data characteristic table (31) is written according to the following rules:
rule 1: according to the input and output information of the simulated tested object, the starting point, the end point and the data type of the data are obtained through sorting, and the data and the offset of the storage address of the updating mark in the reflective memory (1) relative to the base address are automatically generated;
rule 2: according to a serial port data communication protocol, arranging and obtaining configuration conditions of a data bit, a stop bit, a check bit, a baud rate, a frame header, a data length and a data packaging mode of a serial port channel;
rule 3: the method comprises the steps that according to the electrical connection relation between a simulation tested object and an input/output channel of a simulation equipment interface module (2), the input/output channel of a hardware interface of a low-delay simulation intelligent adapting and long-line transmission device, through which data pass, is obtained through sorting, wherein the input/output channel information comprises the node number of a reflection memory card (1) of the low-delay simulation intelligent adapting and long-line transmission device, the equipment number of a simulation equipment interface module (2) card of which the input/output channel is located, and the channel number used by the input/output channel;
rule 4: and according to the simulation test working condition, arranging to obtain parameters needing to be monitored and modified in the serial port data information.
5. The low-latency simulation intelligent adapting and long-line transmission device according to claim 3, wherein the data distribution software module (32) receives data information output by a simulation object from the simulation device interface module (2), and writes the data information into a storage address of the corresponding reflective memory card (1);
the data distribution software module (32) reads input data information required by a simulation tested object in the reflective memory card (1), and if the data information is non-serial port data information, the data information is directly sent to an output channel of the corresponding simulation equipment interface module (2); if the data information is serial data information, the serial data information is sent to a serial data processing software module (33) for analysis and processing, and then sent to a serial output channel of the corresponding simulation equipment interface module (2).
6. The intelligent low-delay simulation adapting and long-line transmitting device as claimed in claim 5, wherein when the data information is non-serial data information, the receiving process of the data information is as follows:
at a data receiving end, triggering and receiving data information in a system clock period timed interruption manner, scanning a non-serial port input channel in an interface module (2) of the simulation equipment, acquiring output data information of a simulation tested object, obtaining a storage address of a reflection memory card (1) corresponding to the received data information according to the data input channel in a data feature table (31), storing the data information to the storage address of the corresponding reflection memory card (1), and updating a mark 1 for the corresponding data information in the reflection memory card (1);
when the data information is non-serial port data information, the sending process of the data information is as follows:
at a data sending end, sending data information by timing interrupt triggering of a system clock period, extracting a storage address of a reflective memory card (1) simulating input data information and an updating marker word of the input data information according to a data output channel in a data characteristic table (31), circularly reading a required data information updating identifier in the reflective memory card (1), setting the identifier 1 to be updated with the data information, reading input data required by simulating the tested object from the storage address of the corresponding reflective memory card (1), sending the data to a corresponding non-serial port output channel in a simulation equipment interface module (2), and setting the data information updating identifier in the reflective memory card (1) to be 0.
7. The low-delay simulation intelligent adapting and long-line transmission device as claimed in claim 5, wherein when the received data information is serial port data information, firstly extracting the data length K, the data storage head address A and the data update identification storage address B of the data information in the data characteristic table (31), and then executing the receiving process of the data information according to the following steps:
step S1: at a data receiving end, waiting for a readable interrupt signal of a receiving register of the serial port card;
step S2: reading a data packet in a receiving register of an interrupt source serial port channel after receiving a readable interrupt signal of a serial port card receiving register;
and step S3: judging the length M of the received data information in the received data packet, if the length M of the received data information is less than 2, executing a step S3.1, and if the length M of the received data information is more than or equal to 2, indicating that the received data information is non-frame header data information, executing a step S4;
step S3.1: comparing the received data information with a data frame header of the serial port channel in the data feature table (31), if the frame header is correctly verified, executing the step S4, otherwise, setting M to be 0 and returning to execute the step S1;
and step S4: writing the received serial port data into a corresponding reflective memory storage address A + M;
step S5: and updating the received data length M to be M +1, writing the updated M into the reflective memory data updating identification storage address B, and returning to the step S1.
8. The low-delay simulation intelligent adapting and long-line transmission device as claimed in claim 5, wherein the data distribution process at the serial port sending end is as follows: firstly, intelligently distributing the cache size of a corresponding serial port channel according to a serial port communication protocol in a data characteristic table, and setting the initial address of a cache region as X; if the serial port data needs to be modified and a single parameter in a serial port protocol bound by the serial port channel needs to be represented by N bytes at most, caching the serial port data into N +1 bytes; if the serial port data does not need to be modified, N is 1, and the cache is 2 bytes; extracting the data length K, the data storage initial address A and the data updating identification storage address B in the data characteristic table (31) bound by the serial port output channel, and executing in the main thread according to the following steps:
step D1, creating a semaphore Event and setting the Event to be in an activated state;
step D2, waiting for the activation of the semaphore Event;
step D3, freezing the semaphore Event after the semaphore Event is activated;
d4, reading the data length M received by the receiving end of the data bound by the serial port channel from the reflective memory address B;
step D5, if M is less than N +1, returning to step D4, otherwise, returning to step D2 after the transmission register of the corresponding serial port card (21) is enabled to be in an air break;
in the transmission register air break service program, the following steps are carried out:
step E1: waiting for the serial port card to send a register empty interrupt;
and E2: after receiving an air break signal of a serial port card sending register, reading the length M of the received data of a receiving end of the data bound by the serial port channel from a reflecting memory address B;
step E3: writing M-L data stored in the reflecting memory addresses A + L to A + M-1 into cache addresses X to X + M-L-1;
step E4: transmitting the cache data to a serial port data processing software module (33) for processing to obtain the processed data length Z of a return value cache region of the serial port data processing software module (33);
and E5: all Z byte data in the cache addresses from X to X + Z-1 are written into a sending register of a corresponding serial port card (21);
and E6: updating the length L of the sent data to be L + Z;
step E7: and if L is less than K, returning to the step E1 to continuously wait for sending the register null interrupt, otherwise, forbidding sending the register null interrupt, resetting the sent data length L to be 0, resetting the received data length M to be 0, and activating the semaphore Event.
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5375225A (en) * 1991-12-31 1994-12-20 Sun Microsystems, Inc. System for emulating I/O device requests through status word locations corresponding to respective device addresses having read/write locations and status information
CN101482753A (en) * 2009-02-11 2009-07-15 北京华力创通科技股份有限公司 Real-time simulation apparatus and system of redundancy flight control computer
CN103294632A (en) * 2013-06-24 2013-09-11 北京经纬恒润科技有限公司 Bus carrier board, data interaction system and data processing method and device
CN108574580A (en) * 2017-03-07 2018-09-25 北京空间技术研制试验中心 Real-time simulation communication system and method
CN108683488A (en) * 2018-04-24 2018-10-19 北京航天控制仪器研究所 A kind of soft synchronous method based on artificial rotary table

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5375225A (en) * 1991-12-31 1994-12-20 Sun Microsystems, Inc. System for emulating I/O device requests through status word locations corresponding to respective device addresses having read/write locations and status information
CN101482753A (en) * 2009-02-11 2009-07-15 北京华力创通科技股份有限公司 Real-time simulation apparatus and system of redundancy flight control computer
CN103294632A (en) * 2013-06-24 2013-09-11 北京经纬恒润科技有限公司 Bus carrier board, data interaction system and data processing method and device
CN108574580A (en) * 2017-03-07 2018-09-25 北京空间技术研制试验中心 Real-time simulation communication system and method
CN108683488A (en) * 2018-04-24 2018-10-19 北京航天控制仪器研究所 A kind of soft synchronous method based on artificial rotary table

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
大数据量低延时航电中继系统设计与实现;樊智勇等;《计算机应用与软件》;20200831;第37卷(第08期);第53-55页 *

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