CN112541949B - Chip positioning method for semiconductor chip package - Google Patents
Chip positioning method for semiconductor chip package Download PDFInfo
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- CN112541949B CN112541949B CN202011559926.6A CN202011559926A CN112541949B CN 112541949 B CN112541949 B CN 112541949B CN 202011559926 A CN202011559926 A CN 202011559926A CN 112541949 B CN112541949 B CN 112541949B
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- 238000000034 method Methods 0.000 title claims abstract description 19
- 239000004065 semiconductor Substances 0.000 title claims abstract description 14
- 238000004806 packaging method and process Methods 0.000 claims abstract description 11
- 238000012545 processing Methods 0.000 claims abstract description 6
- 238000003672 processing method Methods 0.000 claims abstract description 5
- 238000006073 displacement reaction Methods 0.000 claims description 5
- 238000005520 cutting process Methods 0.000 abstract description 4
- 230000007306 turnover Effects 0.000 abstract description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012858 packaging process Methods 0.000 description 2
- 230000000007 visual effect Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000012790 confirmation Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T7/00—Image analysis
- G06T7/70—Determining position or orientation of objects or cameras
- G06T7/73—Determining position or orientation of objects or cameras using feature-based methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
- H01L21/681—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment using optical controlling means
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T2207/00—Indexing scheme for image analysis or image enhancement
- G06T2207/10—Image acquisition modality
- G06T2207/10004—Still image; Photographic image
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T2207/00—Indexing scheme for image analysis or image enhancement
- G06T2207/30—Subject of image; Context of image processing
- G06T2207/30108—Industrial image inspection
- G06T2207/30148—Semiconductor; IC; Wafer
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Vision & Pattern Recognition (AREA)
- Theoretical Computer Science (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
The invention discloses a chip positioning method for semiconductor chip packaging, which comprises the following steps: s1, taking a corner point of a chip strip as an initial positioning point, and moving a camera to enable the initial positioning point to appear in a camera view field; s2, calculating the center coordinates of the initial positioning points through an image processing algorithm; s3, the camera is displaced by N1 steps along the X axis and M1 steps along the Y axis; s4, calculating the center coordinates of the primary positioning points through an image processing method; s5, the camera is displaced along the X axis by N2 steps, and the center coordinates of the secondary positioning points are calculated; s6, the camera is displaced by M2 steps along the Y axis, and the center coordinates of the three positioning points are calculated; s7, the camera is displaced along the X axis by N2 steps, and the center coordinates of four positioning points are calculated. According to the invention, four chips far away from the corners are used as positioning reference points, so that offset influence of the corner chips in the processes of cutting, turnover and the like is avoided, and the positioning accuracy is improved.
Description
Technical Field
The invention relates to the field of semiconductor packaging, in particular to a chip positioning method for semiconductor chip packaging.
Background
In the packaging process of semiconductor chips, the visual positioning technology is one of core technologies for realizing accurate pick-up and transfer of chips. Before packaging the semiconductor chips, the complete chip strip needs to be cut, and the packaging is performed after the turnover is completed, and the series of processes easily cause the chips at the corner positions to deviate. In the existing positioning method, four corners of a chip are used as references, when the corners of a cut chip strip deviate, errors are generated when the corner chip is used as the reference point for positioning, and the size of the errors is the deviation of the positioning chip.
In the packaging process of semiconductor chips, the allowable positioning error of packaging equipment is generally not more than 0.1mm. And when the offset is larger than 0.1mm, the phenomenon that the packaging equipment fails to pick up, put askew or even falls halfway easily occurs in the process of picking up and placing chips by taking the corner chips as positioning datum points. This greatly affects the production stability and production capacity of the apparatus.
Disclosure of Invention
The invention aims to solve the problem that the existing visual positioning method is inaccurate or cannot be positioned in different packaging environments, and selects the chip far from the corner as the positioning reference point, thereby avoiding the offset influence caused by the chip of the corner in the processes of cutting, turnover and the like and improving the positioning accuracy.
The technical scheme adopted by the invention is as follows: a chip positioning method for semiconductor chip packaging, comprising the steps of: s1, taking a corner point of a chip strip as an initial positioning point, and moving a camera to enable the initial positioning point to appear in a camera view field; s2, searching all complete chips in the camera view field in the step S1 through an image processing algorithm; calculating the center coordinates of the initial positioning points; s3, the camera is displaced by N1 steps along the X axis and M1 steps along the Y axis; s4, searching all complete chips in the camera view field in the step S3 through an image processing method; if the chip is complete, the position is a primary positioning point; calculating the center coordinates of the primary positioning points; s5, the camera is displaced along the X axis by N2 steps, and the position is a secondary positioning point; calculating the center coordinates of the secondary positioning points; s6, the camera is displaced by M2 steps along the Y axis, and the position is a cubic positioning point; calculating the center coordinates of the third positioning points; s7, the camera is displaced along the X axis by N2 steps, the direction of the camera is opposite to the displacement direction in the step S5, and the position is a four-time positioning point; and calculating the center coordinates of the four positioning points.
As a further improvement of the invention, the value of N1 in the step S3 is 1-3, and the value of M1 is 1-3.
As a further improvement of the present invention, the N2 value in the step S5 is calculated from the total stripe length, the number of chips in the rows and the step pitch information.
As a further improvement of the present invention, in step S4, if the chip in the camera field of view is not complete, step S3 is repeated.
As a further improvement of the present invention, in the steps S5, S6, and S7, if the chip in the field of view of the camera is not complete, the number of steps is adjusted, and the steps are repeated.
As a further development of the invention, the area of the camera field of view covers at least one complete chip.
The invention has the beneficial effects that: according to the invention, four chips far away from the corners are used as positioning reference points, so that offset influence of the corner chips in the processes of cutting, turnover and the like is avoided, and the positioning accuracy is improved.
Drawings
FIG. 1 is a schematic diagram of the present invention.
Fig. 2 is a schematic diagram of embodiment 1 of the present invention.
Detailed Description
The invention is further described below with reference to the accompanying drawings.
As shown in fig. 1, the chip positioning method for semiconductor chip package includes the steps of: s1, taking a corner point of a chip strip as an initial positioning point, and moving a camera to enable the initial positioning point to appear in a camera view field; s2, searching all complete chips in the camera view field in the step S1 through an image processing algorithm; calculating the center coordinates of the initial positioning points; s3, the camera is displaced by N1 steps along the X axis and M1 steps along the Y axis; s4, searching all complete chips in the camera view field in the step S3 through an image processing method; if the chip is complete, the position is a primary positioning point; calculating the center coordinates of the primary positioning points; s5, the camera is displaced along the X axis by N2 steps, and the position is a secondary positioning point; calculating the center coordinates of the secondary positioning points; s6, the camera is displaced by M2 steps along the Y axis, and the position is a cubic positioning point; calculating the center coordinates of the third positioning points; s7, the camera is displaced along the X axis by N2 steps, the direction of the camera is opposite to the displacement direction in the step S5, and the position is a four-time positioning point; and calculating the center coordinates of the four positioning points.
Taking a picture by a first camera, and taking corner chips in a chip strip as initial positioning points. The camera is moved for a plurality of steps (generally 1 to 3 steps are taken), and the corner chips in the chip strip are taken as final positioning points by taking a picture again. The chip serving as the final positioning point is far away from the corner area, and displacement can not be generated basically in the cutting process of the chip strip, so that the accuracy of positioning the chip is ensured, and the production stability and the production capacity of the packaging equipment are improved.
It is necessary to ensure that the chip of the four anchor points is not missing, otherwise, the confirmation of the anchor points is performed again.
Example 1, as shown in figure 2,
the first step: moving the camera to enable the point A of the chip strip to appear in the field of view of the camera; and taking a picture by the camera, and returning the picture to the computer loaded with the image processing tool.
And a second step of: searching out all complete chips in a camera view field in the picture through an image processing algorithm; the point A is reserved as an initial positioning point; the center coordinates of point a were measured.
And a third step of: the camera is moved to the left by 2 steps, moved down by 1 step, and photographed again.
Fourth step: searching out all complete chips in the field of view of the camera again by an image processing method, and reserving the point B as a locating point; and measuring the center coordinates of the point B.
Fifth step: and (3) moving the camera to the left for 22 steps by utilizing the total length of the strip, the number of chips in rows and columns and the step information, photographing, and measuring the center coordinate of the C point by utilizing an algorithm.
And sixthly, the camera moves downwards for 2 steps, photographs, and the center coordinates of the point D are measured by using an algorithm.
Seventh step: the camera moves 22 steps to the right, photographs, and the center coordinates of the E point are measured by using an algorithm.
Eighth step: B. c, D and E are the final anchor points. The four points are used as final positioning datum points, so that error influence caused by corner chip displacement can be effectively avoided.
It should be understood by those skilled in the art that the protection scheme of the present invention is not limited to the above embodiments, and various arrangements and modifications can be made on the basis of the above embodiments, and various modifications of the present invention fall within the protection scope of the present invention without departing from the spirit of the present invention.
Claims (6)
1. A chip positioning method for semiconductor chip packaging, comprising the steps of:
s1, taking a corner point of a chip strip as an initial positioning point, and moving a camera to enable the initial positioning point to appear in a camera view field;
s2, searching all complete chips in the camera view field in the step S1 through an image processing algorithm; calculating the center coordinates of the initial positioning points;
s3, the camera is displaced by N1 steps along the X axis and M1 steps along the Y axis;
s4, searching all complete chips in the camera view field in the step S3 through an image processing method; if the chip is complete, the position is a primary positioning point; calculating the center coordinates of the primary positioning points;
s5, the camera is displaced along the X axis by N2 steps, and the position is a secondary positioning point; calculating the center coordinates of the secondary positioning points;
s6, the camera is displaced by M2 steps along the Y axis, and the position is a cubic positioning point; calculating the center coordinates of the third positioning points;
s7, the camera is displaced along the X axis by N2 steps, the direction of the camera is opposite to the displacement direction in the step S5, and the position is a four-time positioning point; calculating the center coordinates of four positioning points;
and S8, taking the center coordinates of the four positioning points calculated in the steps S4-S7 as final positioning reference points.
2. The chip positioning method for semiconductor chip package according to claim 1, wherein the N1 value in the step S3 is 1 to 3 and the M1 value is 1 to 3.
3. The chip positioning method for semiconductor chip package according to claim 1, wherein the N2 value in the step S5 is calculated from the total stripe length, the number of chips in rows and columns, and the pitch information.
4. A method for positioning a semiconductor chip package according to any one of claims 1 to 3, wherein in step S4, if the chip is not complete in the field of view of the camera, step S3 is repeated.
5. The method of claim 4, wherein in the steps S5, S6, and S7, if the chip is not complete in the field of view of the camera, the step of moving is adjusted, and the step is repeated.
6. The method of claim 5, wherein the area of the camera field of view covers at least one complete chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011559926.6A CN112541949B (en) | 2020-12-25 | 2020-12-25 | Chip positioning method for semiconductor chip package |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011559926.6A CN112541949B (en) | 2020-12-25 | 2020-12-25 | Chip positioning method for semiconductor chip package |
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| CN112541949A CN112541949A (en) | 2021-03-23 |
| CN112541949B true CN112541949B (en) | 2024-03-29 |
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| CN202011559926.6A Active CN112541949B (en) | 2020-12-25 | 2020-12-25 | Chip positioning method for semiconductor chip package |
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5729895A (en) * | 1994-12-28 | 1998-03-24 | Daewoo Electronics Co., Ltd. | Process for compensating for the position of a camera in a chip mount system and process for mounting chips using the compensation method |
| JP2003050106A (en) * | 2001-08-07 | 2003-02-21 | Fast:Kk | Calibration method, positioning method, positioning device, calibration program and positioning program |
| JP2004140084A (en) * | 2002-10-16 | 2004-05-13 | Sharp Corp | Pick-up method and device for picking up semiconductor chip |
| CN110175621A (en) * | 2019-03-18 | 2019-08-27 | 上海柏楚电子科技股份有限公司 | One kind being based on the matched laser cutting vision positioning method of any template |
| CN110828344A (en) * | 2019-11-14 | 2020-02-21 | 江苏京创先进电子科技有限公司 | Automatic alignment control method for cutting channel of semiconductor device |
| CN112082480A (en) * | 2020-09-08 | 2020-12-15 | 浙江清华柔性电子技术研究院 | Method and system for measuring spatial orientation of chip, electronic device and storage medium |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5946409A (en) * | 1995-05-31 | 1999-08-31 | Nec Corporation | Pick-up apparatus and method for semiconductor devices |
| JPH09304020A (en) * | 1996-05-17 | 1997-11-28 | Fuji Xerox Co Ltd | Position measuring apparatus and position regulating apparatus |
| JP2004077284A (en) * | 2002-08-19 | 2004-03-11 | Yokogawa Electric Corp | Locating method of object having recursive structure |
| JP4384899B2 (en) * | 2003-12-05 | 2009-12-16 | 株式会社テクノホロン | Device chip position measurement method |
| JP5917492B2 (en) * | 2011-03-25 | 2016-05-18 | 東レエンジニアリング株式会社 | Appearance inspection method and apparatus |
-
2020
- 2020-12-25 CN CN202011559926.6A patent/CN112541949B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5729895A (en) * | 1994-12-28 | 1998-03-24 | Daewoo Electronics Co., Ltd. | Process for compensating for the position of a camera in a chip mount system and process for mounting chips using the compensation method |
| JP2003050106A (en) * | 2001-08-07 | 2003-02-21 | Fast:Kk | Calibration method, positioning method, positioning device, calibration program and positioning program |
| JP2004140084A (en) * | 2002-10-16 | 2004-05-13 | Sharp Corp | Pick-up method and device for picking up semiconductor chip |
| CN110175621A (en) * | 2019-03-18 | 2019-08-27 | 上海柏楚电子科技股份有限公司 | One kind being based on the matched laser cutting vision positioning method of any template |
| CN110828344A (en) * | 2019-11-14 | 2020-02-21 | 江苏京创先进电子科技有限公司 | Automatic alignment control method for cutting channel of semiconductor device |
| CN112082480A (en) * | 2020-09-08 | 2020-12-15 | 浙江清华柔性电子技术研究院 | Method and system for measuring spatial orientation of chip, electronic device and storage medium |
Non-Patent Citations (2)
| Title |
|---|
| A Template Matching Based Method for Surface Mount Rectangular-Pin-Chip Positioning and Defect Detection;Han Boxuan等;《2018 EIGHTH INTERNATIONAL CONFERENCE ON INSTRUMENTATION AND MEASUREMENT, COMPUTER, COMMUNICATION AND CONTROL》;20180101;1009-1014 * |
| 基于机器视觉的IC芯片焊点定位检测与误差分析;丁婷婷;《中国优秀硕士学位论文全文数据库 信息科技辑》;20160215(第02期);I135-260 * |
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| CN112541949A (en) | 2021-03-23 |
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Inventor after: Liu Zhenglong Inventor after: Quan Jiaqing Inventor after: Xu Pengfei Inventor after: Guo Youyou Inventor after: Chen Hao Inventor after: Chen Zhihong Inventor before: Quan Jiaqing Inventor before: Xu Pengfei Inventor before: Guo Youyou Inventor before: Chen Hao Inventor before: Chen Zhihong |
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