CN112510088B - Trench gate enhanced GaN-based HEMT device and preparation method thereof - Google Patents
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- 238000002360 preparation method Methods 0.000 title claims abstract description 11
- 230000004888 barrier function Effects 0.000 claims abstract description 35
- 239000000758 substrate Substances 0.000 claims abstract description 14
- 238000000034 method Methods 0.000 claims description 10
- 238000004519 manufacturing process Methods 0.000 claims description 6
- 238000001259 photo etching Methods 0.000 claims description 6
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 3
- 239000000463 material Substances 0.000 claims description 2
- 238000005530 etching Methods 0.000 abstract description 12
- 229910002601 GaN Inorganic materials 0.000 description 19
- 229910002704 AlGaN Inorganic materials 0.000 description 10
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 3
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 2
- ATUOYWHBWRKTHZ-UHFFFAOYSA-N Propane Chemical compound CCC ATUOYWHBWRKTHZ-UHFFFAOYSA-N 0.000 description 2
- 229910004205 SiNX Inorganic materials 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 229910052594 sapphire Inorganic materials 0.000 description 2
- 239000010980 sapphire Substances 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- KRHYYFGTRYWZRS-UHFFFAOYSA-M Fluoride anion Chemical compound [F-] KRHYYFGTRYWZRS-UHFFFAOYSA-M 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000006978 adaptation Effects 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 238000002248 hydride vapour-phase epitaxy Methods 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 230000010287 polarization Effects 0.000 description 1
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- 239000001294 propane Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
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Abstract
The invention provides a trench gate enhanced GaN-based HEMT device and a preparation method thereof, wherein the HEMT device sequentially comprises a substrate layer, a buffer layer, a first voltage-resistant layer, a strip mask layer, a second voltage-resistant layer, a channel layer, a barrier layer, a PGaN layer, a source electrode, a drain electrode and a grid electrode from bottom to top, wherein the strip mask layer is positioned in a preset area on the surface of the first voltage-resistant layer, a V-shaped groove is formed in the upper surface of the channel layer, and the V-shaped groove is positioned above the strip mask layer; the thickness of the barrier layer in the V-shaped groove is 1/2-1/5 of the thickness of the horizontal surface of the channel layer; the PGaN layer is positioned on the surface of the V-shaped groove, the grid electrode is positioned on the surface of the PGaN layer, and the source electrode and the drain electrode are positioned on the surface of the channel layer. The problem of etching damage caused by barrier etching in the existing p-type trench gate enhanced HEMT device is effectively solved.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a trench gate enhanced GaN-based HEMT device and a preparation method thereof.
Background
Compared with the depletion type GaN-based HEMT, the enhancement type HEMT has the important advantages of failure protection and simple driving. The method for realizing the enhanced HEMT device comprises trench gate, p-type gate, under-gate fluorine ion implantation and a cascade structure cathode. In view of the consistency and repeatability of the production process, enhancement HEMTs that can be introduced into production are p-type trench gate and cap structures. However, both structures still have their own drawbacks, in that the cascode structure cascades a depletion mode HEMT and one low voltage MOSFET, which makes it difficult to operate at high frequencies due to the additional power dissipation introduced and the presence of the cascades parasitic inductance. In contrast, the p-type trench gate design gradually becomes the main stream of the enhanced HEMT device, but the p-type trench gate needs to be etched to thin the AlGaN barrier layer, so that the technical difficulties of accurately controlling the etching depth and sufficiently repairing the etching damage exist at present. Meanwhile, the threshold voltage of the p-type trench gate is difficult to be high and is often less than +2V due to the difficulty of AlGaN barrier etching.
Disclosure of Invention
In order to overcome the defects, the invention provides a trench gate enhanced GaN-based HEMT device and a preparation method thereof, and the problem of etching damage caused by barrier etching in the conventional p-type trench gate enhanced HEMT device is effectively solved.
The technical scheme provided by the invention is as follows:
the trench gate enhanced GaN-based HEMT device comprises a substrate layer, a buffer layer, a first voltage-resistant layer, a strip-shaped mask layer, a second voltage-resistant layer, a channel layer, a barrier layer, a PGaN layer, a source electrode, a drain electrode and a grid electrode from bottom to top in sequence, wherein the strip-shaped mask layer is positioned in a preset area on the surface of the first voltage-resistant layer, a V-shaped groove is formed in the upper surface of the channel layer, and the V-shaped groove is positioned above the strip-shaped mask layer; the thickness of the barrier layer in the V-shaped groove is 1/2-1/5 of the thickness of the horizontal surface of the channel layer; the PGaN layer is positioned on the surface of the V-shaped groove, the grid electrode is positioned on the surface of the PGaN layer, and the source electrode and the drain electrode are positioned on the surface of the channel layer.
A preparation method of a trench gate enhanced GaN-based HEMT device comprises the following steps:
sequentially epitaxially growing a buffer layer and a first pressure-resistant layer on the surface of the substrate layer;
growing a strip mask material on the surface of the first pressure-resistant layer, and forming a strip mask layer at a preset position by a photoetching method;
further growing a second pressure-resistant layer;
a channel layer with a V-shaped groove formed on the upper surface grows on the surface of the second pressure-resistant layer;
forming a barrier layer on the surface of the channel layer, and reserving a region for forming a source electrode and a drain electrode on the surface of the barrier layer by photoetching, wherein the thickness of the barrier layer in the V-shaped groove is 1/2-1/5 of the thickness of the horizontal surface of the channel layer;
epitaxially growing a PGaN layer on the surface of the V-shaped groove of the barrier layer;
and forming a source electrode and a drain electrode on the surface of the barrier layer respectively, and forming a grid electrode on the surface of the PGaN layer to finish the preparation of the HEMT device.
According to the trench gate enhanced GaN-based HEMT device and the preparation method thereof, provided by the invention, semi-polar trenches are formed on the upper surface of the channel layer and the barrier layer in a mask mode, and then pGaN is selectively grown on the V-shaped trenches. The V-shaped gate and pGaN on the surface of the HEMT device can avoid the problems of etching damage and etching depth control caused by barrier etching, and ensure that damage cannot occur in the etching process. In addition, the AlGaN barrier layer in the V-shaped groove is thinner, and the semipolarity with low polarization intensity can improve the threshold voltage of the enhanced HEMT, so that the problem of low threshold voltage of the existing p-shaped groove gate is effectively solved.
Drawings
Fig. 1 is a schematic structural diagram of a trench gate enhanced GaN-based HEMT device of the invention.
Reference numerals:
101-substrate layer, 102-buffer layer, 103-first voltage-resistant layer, 104-strip mask layer, 105-second voltage-resistant layer, 106-channel layer, 107-barrier layer, 108-PGaN layer.
Detailed Description
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following description will explain specific embodiments of the present invention with reference to the accompanying drawings. It is evident that the drawings in the following description are only examples of the invention, from which other drawings and other embodiments can be obtained by a person skilled in the art without inventive effort.
As shown in fig. 1, which is a schematic structural diagram of a trench gate enhanced GaN-based HEMT device provided by the invention, it can be seen from the figure that the HEMT device sequentially comprises a substrate layer, a buffer layer, a first voltage-resistant layer, a strip mask layer, a second voltage-resistant layer, a channel layer, a barrier layer, a PGaN layer, a source electrode, a drain electrode and a gate electrode from bottom to top, wherein the strip mask layer is positioned in a preset area on the surface of the first voltage-resistant layer, a V-shaped groove is arranged on the upper surface of the channel layer, and the V-shaped groove is positioned above the strip mask layer; the thickness of the barrier layer in the V-shaped groove is 1/2-1/5 of the thickness of the horizontal surface of the channel layer; the PGaN layer is positioned on the surface of the V-shaped groove, the grid electrode is positioned on the surface of the PGaN layer, and the source electrode and the drain electrode are positioned on the surface of the channel layer.
In the HEMT device, the substrate layer may be a semiconductor common substrate such as a silicon substrate, a sapphire substrate, a SiC substrate, and the like. The buffer layer comprises GaN, alN, alNAlGaN, etc. to relieve stress and transition to the subsequent voltage withstanding layer. The first pressure-resistant layer is carbon-doped (including internal doping and external doping) or iron-doped Al x Ga 1-x And N layers, wherein x is more than or equal to 0 and less than or equal to 0.1. The strip mask layer is SiO 2 Layer or SiN x A layer arranged on the edge of the surface of the first pressure-resistant layer<1120>Or alternatively<1100>The width is 2-10 mu m. The second voltage-resistant layer is a carbon-doped or iron-doped GaN layer and is grown in an MOCVD or HVPE mode. The upper surface of the channel layer (unintentionally doped GaN layer) comprises a V-shaped groove, the barrier layer grown on the surface of the channel layer with the V-shaped groove is also provided with the V-shaped groove, the surface in the V-shaped groove is a semi-polar surface, and the thickness of the barrier layer is 1/2-1/5 of the thickness of the horizontal surface ((0001) surface) of the channel layer. The barrier layer is Al x Ga 1-x N layer, 0.1<x<0.4. It should be clear that the thickness of each layer structure is not limited here, and can be adjusted according to practical applications.
The preparation process of the HEMT is described below by way of example:
firstly, placing a (0001) crystal orientation sapphire substrate into an MOCVD reaction chamber, treating the substrate at high temperature, and then growing a buffer layer, wherein the method comprises the following steps: growing a 400nm low-temperature GaN layer at a pressure of 500torr and a temperature of 550 ℃ and growing a 1500nm high-temperature GaN layer at a temperature of 200torr and a temperature of 1050 ℃; then, changing atmosphere to 100torr pressure, charging propane, growing 1000nm external carbon doped high resistance gallium nitride pressure-resistant layer (first pressure-resistant layer); then, growing a strip-shaped SiNx mask layer on the pressure-resistant layer by a photoetching mask method; then changing the conditions to the growth conditions of the second pressure-resistant layer, and continuing to grow a 2000 nm-thick high-resistance gallium nitride pressure-resistant layer in MOCVD; then, further growing a 300nm undoped GaN channel layer on the pressure-resistant layer at 200torr and 1050 ℃, wherein a V-shaped groove is formed on the upper surface of the GaN channel layer grown above the strip-shaped SiNx mask layer; then, a 25% Al component AlGaN barrier layer of 20nm is grown on the GaN channel layer, the AlGaN barrier layer is also provided with a V-shaped groove, the inner surface of the V-shaped groove is a (11-20) semi-polar surface, and the thickness of the V-shaped groove is 1/3 of that of the AlGaN barrier layer of a (0001) surface; thereafter, pGaN with Mg-doped concentration 2e20 was grown on the AlGaN barrier layer at 950 ℃ and 60nm with changing conditions. Finally, forming a source electrode S, a drain electrode D and a grid electrode G by photoetching, developing and evaporating.
The V-shaped AlGaN barrier layer on the surface of the HEMT formed by growth in the method can effectively avoid AlGaN etching, and AlGaN in the V-shaped groove is very thin, so that the threshold voltage of the enhanced HEMT can be improved.
It should be noted that the above embodiments can be freely combined as needed. The foregoing is merely a preferred embodiment of the present invention and it should be noted that modifications and adaptations to those skilled in the art may be made without departing from the principles of the present invention, which are intended to be comprehended within the scope of the present invention.
Claims (10)
1. The trench gate enhanced GaN-based HEMT device is characterized by sequentially comprising a substrate layer, a buffer layer, a first voltage-resistant layer, a strip-shaped mask layer, a second voltage-resistant layer, a channel layer, a barrier layer, a PGaN layer, a source electrode, a drain electrode and a grid electrode from bottom to top, wherein the strip-shaped mask layer is positioned in a preset area on the surface of the first voltage-resistant layer, a V-shaped groove is formed in the upper surface of the channel layer, and the V-shaped groove is positioned right above the strip-shaped mask layer; the thickness of the barrier layer in the V-shaped groove is 1/2-1/5 of the thickness of the horizontal surface of the channel layer; the PGaN layer is positioned on the surface of the V-shaped groove, the grid electrode is positioned on the surface of the PGaN layer, and the source electrode and the drain electrode are positioned on the surface of the channel layer.
2. The HEMT device of claim 1, wherein the strip mask layer is SiO 2 Layer or SiN x A layer.
3. The HEMT device of claim 1 or claim 2, wherein the stripe-shaped mask layer has a width along the <1120> or <1100> direction of 2-10 μm.
4. The HEMT device of claim 1, wherein the first voltage resistant layer is carbon-doped or iron-doped Al x Ga 1- x And N layers, wherein x is more than or equal to 0 and less than or equal to 0.1.
5. The HEMT device of claim 1, wherein,
the second pressure-resistant layer is a carbon-doped or iron-doped GaN layer; and/or the number of the groups of groups,
the channel layer is an unintentionally doped GaN layer; and/or the number of the groups of groups,
the barrier layer is Al x Ga 1-x N layer, 0.1<x<0.4。
6. The preparation method of the trench gate enhanced GaN-based HEMT device is characterized by comprising the following steps:
sequentially epitaxially growing a buffer layer and a first pressure-resistant layer on the surface of the substrate layer;
growing a strip mask material on the surface of the first pressure-resistant layer, and forming a strip mask layer at a preset position by a photoetching method;
further growing a second pressure-resistant layer;
a channel layer with a V-shaped groove formed on the upper surface grows on the surface of the second pressure-resistant layer; the V-shaped groove is positioned right above the strip-shaped mask layer;
forming a barrier layer on the surface of the channel layer, and reserving a region for forming a source electrode and a drain electrode on the surface of the barrier layer by photoetching, wherein the thickness of the barrier layer in the V-shaped groove is 1/2-1/5 of the thickness of the horizontal surface of the channel layer;
epitaxially growing a PGaN layer on the surface of the V-shaped groove of the barrier layer;
and forming a source electrode and a drain electrode on the surface of the barrier layer respectively, and forming a grid electrode on the surface of the PGaN layer to finish the preparation of the HEMT device.
7. The method for manufacturing a HEMT device of claim 6, wherein the strip mask layer is SiO 2 Layer or SiN x A layer.
8. The method for manufacturing a HEMT device according to claim 6 or 7, wherein the width of the strip mask layer along the <1120> or <1100> direction is 2-10 μm.
9. The method for manufacturing a HEMT device according to claim 6, wherein the first voltage-resistant layer is carbon-doped or iron-doped Al x Ga 1-x And N layers, wherein x is more than or equal to 0 and less than or equal to 0.1.
10. The method of manufacturing a HEMT device of claim 6,
the second pressure-resistant layer is a carbon-doped or iron-doped GaN layer; and/or the number of the groups of groups,
the channel layer is an unintentionally doped GaN layer; and/or the number of the groups of groups,
the barrier layer is Al x Ga 1-x N layer, 0.1<x<0.4。
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