CN112434324A - Data processing equipment - Google Patents

Data processing equipment Download PDF

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Publication number
CN112434324A
CN112434324A CN202011496844.1A CN202011496844A CN112434324A CN 112434324 A CN112434324 A CN 112434324A CN 202011496844 A CN202011496844 A CN 202011496844A CN 112434324 A CN112434324 A CN 112434324A
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Prior art keywords
encryption device
encryption
data processing
processor
data
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Granted
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CN202011496844.1A
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Chinese (zh)
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CN112434324B (en
Inventor
王京阳
李磊
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Hefei Datang Storage Technology Co ltd
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Hefei Datang Storage Technology Co ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/60Protecting data
    • G06F21/602Providing cryptographic facilities or services
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/30Authentication, i.e. establishing the identity or authorisation of security principals
    • G06F21/44Program or device authentication

Abstract

The present application provides a data processing apparatus comprising: the system comprises a processor and more than two encryption devices; a processor configured to send a generation instruction to generate a key to a default encryption device and send a first synchronization instruction to the default encryption device; the encryption device is set to receive a generation instruction from the processor, generate a key and store the generated key when the encryption device is a default encryption device; receiving a first synchronization instruction from the processor, and sending the generated key to each encryption device except the encryption device; encrypting the received data according to the generated key; receiving and saving a key from a default encryption device when the encryption device is an encryption device other than the default encryption device; and encrypting the received data according to the obtained key. By the technical scheme, normal operation of the data processing equipment can be still ensured when part of the encryption devices are in failure.

Description

Data processing equipment
Technical Field
The present application relates to, but is not limited to, the field of information security, and more particularly to data processing devices.
Background
With the continuous expansion of the scale of enterprise information centers, the problem of information security is gradually emphasized by people. There are two types of encryption mechanisms, software encryption on the one hand and hardware encryption on the other hand. The software encryption is simple to realize, the investment is small, but the secret key and the algorithm are easy to leak, and the security level is low. The hardware encryption adopts a hardware encryption machine to carry out encryption and decryption calculation, the equipment investment is required to be increased, and the protection of a secret key and an algorithm is sufficient.
When the existing encryption equipment fails, data processing needs to be carried out through other encryption equipment, so that the equipment cost is high.
Disclosure of Invention
The technology to be solved by the application is to provide a data processing device, which can still ensure the normal operation of the data processing device when a part of encryption devices are in failure.
In order to solve the above technical problem, the present application provides a data processing apparatus, including: the system comprises a processor and more than two encryption devices;
the processor is configured to send a generation instruction for generating a key to a default encryption device, and send a first synchronization instruction to the default encryption device, wherein the first synchronization instruction is used for instructing to synchronously send the generated key to each encryption device except the default encryption device;
the encryption device is set to receive a generation instruction from the processor, generate a key and store the generated key when the encryption device is a default encryption device; receiving a first synchronization instruction from a processor, and sending the generated key to each encryption device except the encryption device; encrypting the received data according to the generated key; receiving and saving a key from a default encryption device when the encryption device is an encryption device other than the default encryption device; and encrypting the received data according to the obtained key.
In an exemplary embodiment, the processor is further configured to send the received data to the selected encryption device;
and the encryption device is also configured to encrypt the data according to the key stored by the encryption device when receiving the data sent by the processor, and store the encrypted data.
In an exemplary embodiment, the encryption device further comprises at least two expansion interfaces, and each encryption device is connected with one expansion interface in a hot plug mode.
In an illustrative example, the number of encryption devices is less than or equal to the number of expansion interfaces.
In one illustrative example, each encryption device includes a secure memory chip;
the encryption chip is configured to store encrypted data, and includes: and storing the encrypted data in a self secure storage chip.
In an exemplary embodiment, the processor is further configured to send the received data to the selected encryption device, and includes:
and selecting the encryption device as a target from all encryption devices according to the load information of each encryption device, and sending the received data to the encryption device as the first target.
In an exemplary example, the selecting, from all encryption devices, an encryption device as a first target according to load information of each encryption device, and transmitting the received data to the targeted encryption device includes:
and selecting the encryption device with the lowest load according to the load of each encryption device, and sending the received data to the encryption device with the lowest load.
In an exemplary embodiment, the processor is further configured to perform trust verification on each encryption device when the data processing apparatus is powered on, and set the data processing apparatus to an unavailable state when the trust verification on any encryption device fails.
In an exemplary embodiment, the processor is further configured to perform trust verification on a newly inserted encryption device when detecting that a new encryption device is inserted during operation of the data processing apparatus, and set the newly inserted encryption device to an unavailable state when the trust verification on the newly inserted encryption device fails.
In an exemplary embodiment, the processor is further configured to send a second synchronization instruction to any encryption device, where the second synchronization instruction is used to instruct a decryption device to backup stored data to an encryption device serving as a second target, and the second synchronization instruction carries identification information of the encryption device serving as the target;
and the encryption device is also set to be the encryption device which takes the data transmission value stored by the encryption device as the second target after receiving the second synchronization instruction.
The present application provides a data processing apparatus comprising: the system comprises a processor and more than two encryption devices; the processor is configured to send a generation instruction for generating a key to a default encryption device, and send a first synchronization instruction to the default encryption device, wherein the first synchronization instruction is used for instructing to synchronously send the generated key to each encryption device except the default encryption device; the encryption device is set to receive a generation instruction from the processor, generate a key and store the generated key when the encryption device is a default encryption device; receiving a first synchronization instruction from a processor, and sending the generated key to each encryption device except the encryption device; encrypting the received data according to the generated key; receiving and saving a key from a default encryption device when the encryption device is an encryption device other than the default encryption device; and encrypting the received data according to the obtained key. According to the technical scheme, the plurality of encryption devices are arranged, the keys are synchronously stored in the plurality of encryption devices, and when part of the encryption devices are in failure, other encryption devices can be used for data processing, so that the normal operation of the data processing equipment is ensured.
Drawings
The accompanying drawings are included to provide an understanding of the present disclosure and are incorporated in and constitute a part of this specification, illustrate embodiments of the disclosure and together with the examples serve to explain the principles of the disclosure and not to limit the disclosure.
Fig. 1 is a schematic structural diagram of a data processing apparatus according to a first embodiment of the present application;
fig. 2 is a schematic structural diagram of a data processing apparatus according to example one of the present application.
Detailed Description
The present application describes embodiments, but the description is illustrative rather than limiting and it will be apparent to those of ordinary skill in the art that many more embodiments and implementations are possible within the scope of the embodiments described herein. Although many possible combinations of features are shown in the drawings and discussed in the detailed description, many other combinations of the disclosed features are possible. Any feature or element of any embodiment may be used in combination with or instead of any other feature or element in any other embodiment, unless expressly limited otherwise.
The present application includes and contemplates combinations of features and elements known to those of ordinary skill in the art. The embodiments, features and elements disclosed in this application may also be combined with any conventional features or elements to form a unique inventive concept as defined by the claims. Any feature or element of any embodiment may also be combined with features or elements from other inventive aspects to form yet another unique inventive aspect, as defined by the claims. Thus, it should be understood that any of the features shown and/or discussed in this application may be implemented alone or in any suitable combination. Accordingly, the embodiments are not limited except as by the appended claims and their equivalents. Furthermore, various modifications and changes may be made within the scope of the appended claims.
Further, in describing representative embodiments, the specification may have presented the method and/or process as a particular sequence of steps. However, to the extent that the method or process does not rely on the particular order of steps set forth herein, the method or process should not be limited to the particular sequence of steps described. Other orders of steps are possible as will be understood by those of ordinary skill in the art. Therefore, the particular order of the steps set forth in the specification should not be construed as limitations on the claims. Further, the claims directed to the method and/or process should not be limited to the performance of their steps in the order written, and one skilled in the art can readily appreciate that the sequences may be varied and still remain within the spirit and scope of the embodiments of the present application.
Example one
As shown in fig. 1, the present embodiment provides a data processing apparatus including: a processor 10, two or more encryption devices 11;
the processor 10 is configured to send a generation instruction for generating a key to a default encryption device, and send a first synchronization instruction for instructing to synchronously send the generated key to each encryption device except the default encryption device;
the encryption device 11 is configured to receive a generation instruction from the processor, generate a key, and store the generated key when the encryption device is a default encryption device; receiving a first synchronization instruction from a processor, and sending the generated key to each encryption device except the encryption device; encrypting the received data according to the generated key; receiving and saving a key from a default encryption device when the encryption device is an encryption device other than the default encryption device; and encrypting the received data according to the obtained key.
In this embodiment, one of all the extension interfaces may be set as a default extension interface, and the encryption device connected to the default extension interface may be a default encryption device (for example, it may be named as a number 0 encryption device, and the number 0 encryption device is described below). The key is generally generated by the encryption device No. 0, and then the encryption device No. 0 securely transmits the generated key to each of the other encryption devices. It should be noted that the physical device corresponding to the encryption device No. 0 may not be fixed, for example, there are encryption device a and encryption device b currently, if the encryption device a is connected to the default extension interface, the encryption device a is the encryption device No. 0, and if the encryption device b is connected to the default extension interface, the encryption device b is the encryption device No. 0.
After the key is synchronized to each encryption device, each encryption device uses the key to encrypt data during data encryption, for example, the data encryption can be performed by using the SM4 encryption algorithm. Meanwhile, each encryption device stores the same key, so when one or more encryption devices are in failure (for example, software and hardware failure, key loss and the like), other normal encryption devices without failure still can use other normal encryption devices without failure to perform data encryption processing and storage due to the fact that other normal encryption devices without failure store keys, and normal operation of the data processing equipment is guaranteed.
According to the technical scheme, the plurality of encryption devices are arranged, the keys are synchronously stored in the plurality of encryption devices, and when part of the encryption devices are in failure, other encryption devices can be used for data processing, so that the normal operation of the data processing equipment is ensured.
In an exemplary embodiment, the processor is further configured to send the received data to the selected encryption device;
and the encryption device is also configured to encrypt the data according to the key stored by the encryption device when receiving the data sent by the processor, and store the encrypted data.
In an exemplary embodiment, the encryption device further comprises at least two expansion interfaces, and each encryption device is connected with one expansion interface in a hot plug mode.
In an illustrative example, the number of encryption devices is less than or equal to the number of expansion interfaces.
In this embodiment, each data processing apparatus may be configured with a plurality of encryption devices and a plurality of expansion interfaces, and a certain number of expansion interfaces not connected with an encryption device are reserved in an initial state of the data processing apparatus, so that the encryption devices may be dynamically increased according to data throughput in subsequent use. For example, a data processing device may be provided with 64 expansion interfaces, wherein 32 expansion interfaces are respectively connected with an encryption device, that is, 32 encryption devices. If the computing power demand of the current user exceeds the computing power of the current data processing equipment, one or more new encryption devices can be inserted in a non-shutdown state to improve the computing power of the data processing equipment.
In one illustrative example, each encryption device includes a secure memory chip;
the encryption chip is configured to store encrypted data, and includes: and storing the encrypted data in a self secure storage chip.
The secure memory chip of the embodiment may be a Nand flash memory chip.
Through the technology, the encrypted data can be directly stored in the self safe storage chip, so that the risk of data leakage can be reduced, and the data safety is ensured.
In an exemplary embodiment, the processor is further configured to send the received data to the selected encryption device, and includes:
and selecting the encryption device as a target from all encryption devices according to the load information of each encryption device, and sending the received data to the encryption device as the first target.
In an exemplary example, the selecting, from all encryption devices, an encryption device as a first target according to load information of each encryption device, and transmitting the received data to the targeted encryption device includes:
and selecting the encryption device with the lowest load according to the load of each encryption device, and sending the received data to the encryption device with the lowest load.
In an exemplary embodiment, the processor is further configured to perform trust verification on each encryption device when the data processing apparatus is powered on, and set the data processing apparatus to an unavailable state when the trust verification on any encryption device fails.
In an exemplary embodiment, the processor is further configured to perform trust verification on a newly inserted encryption device when detecting that a new encryption device is inserted during operation of the data processing apparatus, and set the newly inserted encryption device to an unavailable state when the trust verification on the newly inserted encryption device fails.
In an exemplary embodiment, the processor is further configured to send a second synchronization instruction to any encryption device, where the second synchronization instruction is used to instruct a decryption device to backup stored data to an encryption device serving as a second target, and the second synchronization instruction carries identification information of the encryption device serving as the second target;
and the encryption device is also set to send the data transmission value stored by the encryption device as the target encryption device after receiving the second synchronization instruction.
By the technical scheme, the data of the encryption device can be backed up, and the reliability of data storage is improved.
In an exemplary example, the type of the encryption device may be SSD (Solid State Disk) and the type of the expansion interface may include an interface compatible with the SSD, such as SATA (Serial ATA), SATAe, U.2, mSATA, m.2, PCIe (Peripheral Component Interconnect express), SAS (Serial Attached SCSI), and the like.
Example 1
The data processing apparatus of the present application is further explained below by specific examples.
As shown in fig. 2, the data processing apparatus of the present example may include: at least one processor 101 (i.e., the aforementioned processor), at least one network interface 102, at least one secure storage expansion interface 103 (i.e., the aforementioned expansion interface), at least one security module 105 (i.e., the aforementioned encryption device), at least one memory 106, at least one communication bus 104.
Wherein each data processing device can load a plurality of security modules 105 via the security module extension interface 103. The memory 106 stores security module mutual trust software and load balancing software, wherein the security module mutual trust software is used for mutual authentication between each security module, and the load balancing software is used for distributing tasks to each security module 105.
Each security module 105 may include a secure memory chip 1051, a Nand flash memory chip 1052, and an interface unit 1053. The secure memory chip 1051 is a main controller chip in the secure module and is used for encrypting data, the Nand flash memory chip 1052 is a memory granule and is used for storing data encrypted by the secure memory chip, and the interface unit 1053 is used for receiving data sent by the processor 101.
Assume scene one is: the data acquisition end sends the video data acquired by the camera to the data processing device of the present example through the network channel for processing, and the following description takes a scene one as an example to illustrate the working principle of the data processing device as follows:
after the data processing equipment is started, loading load balancing software and security module mutual trust software in a memory into a processor;
step two, the processor carries out safety verification on all safety modules through safety module mutual trust software, and if all the safety modules are credible, the processor executes step three; and if any security module is not credible, the buzzer alarms and sets the data processing equipment to be in an unavailable state.
Loading a safety module by the processor;
step four, the number 0 security module generates a key and synchronously sends the key to each other security module;
step five, the processor loads all the security modules into a usable state;
step six, after receiving the video data, the network interface sends the video data to the processor;
step seven, the processor determines the safety module with the lowest current load;
step eight, the processor sends the data to the interface unit of the safety module with the lowest load through the safety module expansion interface connected with the safety module with the lowest load;
step nine, the interface unit of the security module sends the received video data to the security memory chip;
step ten, the safety storage chip encrypts the video data according to the stored secret key and then sends the encrypted video data to the Nand flash storage chip;
and eleventh, storing the received encrypted video data by the Nand flash memory chip.
The data processing apparatus of the present example has the following advantages:
the security module has a storage function, encrypted data can be safely stored without falling to the ground, the defect that data ciphertexts are transmitted outside is overcome, and user data are stored in the security module without falling to the ground;
secondly, the existing single encryption machine cannot realize disaster recovery, and when a fault occurs, two encryption machines are needed to realize disaster recovery operation. The data processing equipment of the example comprises a plurality of security modules, disaster recovery of the secret key can be automatically realized among the security modules, and after a certain security module is invalid, the data processing equipment can still continue to operate without adding extra hardware equipment, so that the user cost can be reduced;
third, the present example may dynamically adjust the number of security modules based on computing power, and when the current computing power demand of the user exceeds the computing power of the current data processing apparatus, a new security module may be inserted without shutdown to increase computing power. Compared with the scheme of adding the encryption machine when the current computing power is insufficient, the scheme has lower cost and simpler operation.
Fourth, in this example, the security module to which the received data is sent may be selected according to the load of the security module for processing, so that resources may be used more reasonably.
It will be understood by those of ordinary skill in the art that all or some of the steps of the methods, systems, functional modules/units in the devices disclosed above may be implemented as software, firmware, hardware, and suitable combinations thereof. In a hardware implementation, the division between functional modules/units mentioned in the above description does not necessarily correspond to the division of physical components; for example, one physical component may have multiple functions, or one function or step may be performed by several physical components in cooperation. Some or all of the components may be implemented as software executed by a processor, such as a digital signal processor or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer readable media, which may include computer storage media (or non-transitory media) and communication media (or transitory media). The term computer storage media includes volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data, as is well known to those of ordinary skill in the art. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, Digital Versatile Disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can accessed by a computer. In addition, communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media as known to those skilled in the art.

Claims (10)

1. A data processing apparatus characterized by: the method comprises the following steps: the system comprises a processor and more than two encryption devices;
the processor is configured to send a generation instruction for generating a key to a default encryption device, and send a first synchronization instruction to the default encryption device, wherein the first synchronization instruction is used for instructing to synchronously send the generated key to each encryption device except the default encryption device;
the encryption device is set to receive a generation instruction from the processor, generate a key and store the generated key when the encryption device is a default encryption device; receiving a first synchronization instruction from a processor, and sending the generated key to each encryption device except the encryption device; encrypting the received data according to the generated key; receiving and saving a key from a default encryption device when the encryption device is an encryption device other than the default encryption device; and encrypting the received data according to the obtained key.
2. The data processing device of claim 1,
the processor is also configured to send the received data to the selected encryption device;
and the encryption device is also configured to encrypt the data according to the key stored by the encryption device when receiving the data sent by the processor, and store the encrypted data.
3. The data processing apparatus of claim 2, further comprising at least two expansion interfaces, each encryption device being hot-pluggable to a respective one of the expansion interfaces.
4. The data processing device of claim 3,
the number of the encryption devices is less than or equal to the number of the expansion interfaces.
5. The data processing device of claim 2, wherein:
each encryption device comprises a secure memory chip;
the encryption chip is configured to store encrypted data, and includes: and storing the encrypted data in a self secure storage chip.
6. The data processing device of claim 2, wherein:
the processor, further configured to send the received data to the selected encryption device, includes:
and selecting the encryption device as a target from all encryption devices according to the load information of each encryption device, and sending the received data to the encryption device as the first target.
7. The data processing device of claim 6, wherein:
the selecting an encryption device as a target from all encryption devices according to load information of each encryption device, and transmitting the received data to the encryption device as the first target, includes:
and selecting the encryption device with the lowest load according to the load of each encryption device, and sending the received data to the encryption device with the lowest load.
8. The data processing device of claim 1, wherein:
the processor is further configured to perform trust verification on each encryption device when the data processing apparatus is powered on, and set the data processing apparatus in an unavailable state when any encryption device fails in trust verification.
9. The data processing device of claim 1, wherein:
the processor is further configured to, during operation of the data processing apparatus, perform trust verification on a newly inserted encryption device when it is detected that a new encryption device is inserted, and set the newly inserted encryption device in an unavailable state when the trust verification of the newly inserted encryption device fails.
10. The data processing device of claim 2, wherein:
the processor is further configured to send a second synchronization instruction to any encryption device, where the second synchronization instruction is used to instruct to backup the stored data to an encryption device serving as a second target, and the second synchronization instruction carries identification information of the encryption device serving as the second target;
and the encryption device is also set to be the encryption device which takes the data transmission value stored by the encryption device as the second target after receiving the second synchronization instruction.
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