CN111813717B - Device and method for data frame storage switching - Google Patents
Device and method for data frame storage switching Download PDFInfo
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- CN111813717B CN111813717B CN202010523731.XA CN202010523731A CN111813717B CN 111813717 B CN111813717 B CN 111813717B CN 202010523731 A CN202010523731 A CN 202010523731A CN 111813717 B CN111813717 B CN 111813717B
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- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
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- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control
Abstract
The invention discloses a device and a method for switching data frame storage, and relates to the technical field of data storage. The method comprises the following steps: when each port needs to read out the data frame, generating a multi-level port preemption request according to the port DDR resource occupation count, the port OCB resource occupation count and the cache threshold configuration value of the port; carrying out judgment arbitration on the generated multi-level port preemption requests to obtain an arbitration result; and sending the data frame of each port to a corresponding DDR buffer or OCB buffer or blocking according to the obtained arbitration result. The invention can realize the dynamic switching of the internal cache and the external cache, improve the storage bandwidth and the capacity of the equipment, has low use cost and meets the requirement of practical application.
Description
Technical Field
The invention relates to the technical field of data storage, in particular to a device and a method for switching data frame storage.
Background
At present, HGU (Home Gateway Unit) devices are applied in large scale in an access Network, and these devices need to provide a PON (Passive Optical Network) access supporting multiple protocols for a client, and with the continuous improvement of access bandwidth, a conventional data storage manner cannot meet the requirement of throughput.
In data communication, a large number of data frames need to be cached in some application scenarios, and Chip internal cache (OCB) is adopted, which is limited by Chip area and cost control, and capacity often cannot meet requirements. At this time, a mode of expanding an external cache of a chip, such as a DDR (Double Data Rate) cache, is usually adopted to meet a requirement of capacity, but is limited by factors such as a bit width of the DDR, a working frequency, and a loss of efficiency, and a storage bandwidth may have a condition that cannot meet a special application scenario.
For example, in an XGSPON (10-Gigabit-Capable Symmetric Passive Optical Network, 10 Gigabit Symmetric Passive Optical Network) HGU device, the device specification requires that the downstream can buffer 1000 1518 bytes of data frames, the upstream can buffer data frames within a DBA (dynamic Bandwidth allocation) response interval, and the maximum upstream and downstream flows are both 10 Gbps. Although bandwidth can meet requirements by adopting an OCB (optical bus buffer) cache, the chip area and the cost are overhigh due to overlarge cache capacity, the read-write bandwidth of about 34G can be provided at most by adopting the bus BIT width of an external cache such as DDR1066 and 16BIT, the actually available storage bandwidth is lower in consideration of cost and efficiency loss, and the cost of the chip and a system is increased due to the fact that the DDR specification is improved to meet the requirements.
In the related art, although it is mentioned that an internal cache and an external cache may coexist to improve throughput during data storage, one of the internal cache or the external cache needs to be selected based on port fixation, for example, an OCB cache mode is selected for an uplink port and a DDR cache mode is selected for a downlink port in an HGU device. Although the scheme can meet the requirements of some scenes, the scheme cannot meet the requirements of the scenes with requirements on the number of buffer frames in both uplink and downlink.
Therefore, in a scenario where the internal cache and the external cache coexist, how to efficiently utilize the storage bandwidth and the capacity is an urgent problem to be solved by those skilled in the art.
Disclosure of Invention
The present invention aims to overcome the defects of the background art, and provides a device and a method for switching data frame storage, which can realize dynamic switching between an internal cache and an external cache, improve the storage bandwidth and capacity of equipment, have low use cost, and meet the requirements of practical application.
In order to achieve the above object, the present invention provides a device for switching data frame storage, which comprises a port switching decision module, a decision arbitration module, a DDR read-write control module and an OCB read-write control module;
the port switching decision module is configured to: generating a multi-level port preemption request according to the port DDR resource occupation count, the port OCB resource occupation count and the port cache threshold configuration value; sending each port data frame to a corresponding DDR read-write control module or OCB read-write control module or blocking according to an arbitration result fed back by the judgment arbitration module;
the decision arbitration module is configured to: performing decision arbitration on the multi-level port preemption request generated by the port switching decision module, and feeding an arbitration result back to the port switching decision module;
the DDR read-write control module is used for: counting the DDR resource occupation count of each port; controlling data writing and reading of the DDR cache;
the OCB read-write control module is used for: counting the OCB resource occupation count of each port and sending the OCB resource occupation count to a port switching judgment module; and controlling the data writing and reading of the OCB buffer.
On the basis of the above technical solution, the configuration value of the buffer threshold of the port includes: the OCB caches the threshold configuration value and DDR caches the threshold configuration value; the OCB cache threshold configuration value is a single threshold configuration value, and the DDR cache threshold configuration value is a multi-level threshold configuration value;
the port switching judgment module generates a multi-level port preemption request, and specifically comprises the following procedures: comparing the port OCB resource occupation count of each port with the OCB cache threshold configuration value of each port, and generating a port occupation request of the lowest level for the port exceeding the OCB cache threshold configuration value; and comparing the port DDR resource occupation counts of the rest ports with the multi-level DDR cache threshold configuration values of the respective ports, and if the port DDR resource occupation counts are greater than the Nth-level DDR cache threshold configuration values, generating an Nth-level port occupation request for the ports, wherein N is a natural number.
On the basis of the technical scheme, when the decision arbitration module carries out decision arbitration, a mode of grouping absolute priority is adopted: dividing the port preemption requests of the same level of each port into a group, carrying out arbitration selection between the groups according to an absolute priority mode, configuring the priority between the ports in the same group according to a designated strategy, and carrying out arbitration selection in the group according to the absolute priority mode; the selected port will get one of a switch grant, a hold grant and a block grant as an arbitration result.
On the basis of the technical scheme, the device further comprises a port input buffer module, which is used for: and requesting the port switching judgment module to process the data frames which are input by the port cache after the port caches the data frames with the specified number.
On the basis of the technical scheme, when the data frame is input and sent out by each port, the OCB read-write control module and the DDR read-write control module respectively update the OCB resource occupation count and the DDR resource occupation count of each port.
The invention also provides a method for switching the storage of the data frame, which comprises the following steps:
when each port needs to send out a data frame from the port, generating a multi-level port preemption request according to the port DDR resource occupation count, the port OCB resource occupation count and the port cache threshold configuration value;
performing judgment arbitration on the multi-level port preemption request to obtain an arbitration result;
and sending the data frame of each port to a corresponding DDR buffer or OCB buffer or blocking according to the arbitration result.
On the basis of the above technical solution, the configuration value of the buffer threshold of the port includes: the OCB caches the threshold configuration value and DDR caches the threshold configuration value; the OCB cache threshold configuration value is a single threshold configuration value, and the DDR cache threshold configuration value is a multi-level threshold configuration value;
generating a multi-level port preemption request according to the port DDR resource occupation count, the port OCB resource occupation count and the port cache threshold configuration value, wherein the specific process comprises the following steps: comparing the port OCB resource occupation count of each port with the OCB cache threshold configuration value of each port, and generating a port occupation request of the lowest level for the port exceeding the OCB cache threshold configuration value; and comparing the port DDR resource occupation counts of the rest ports with the multi-level DDR cache threshold configuration values of the respective ports, and if the port DDR resource occupation counts are greater than the Nth-level DDR cache threshold configuration values, generating an Nth-level port occupation request for the ports, wherein N is a natural number.
On the basis of the technical scheme, when the decision arbitration is carried out on the multi-level port preemption requests, a grouping absolute priority mode is adopted: dividing the port preemption requests of the same level of each port into a group, carrying out arbitration selection between the groups according to an absolute priority mode, configuring the priority between the ports in the same group according to a designated strategy, and carrying out arbitration selection in the group according to the absolute priority mode; the selected port will get one of a switch grant, a hold grant and a block grant as an arbitration result.
On the basis of the above technical solution, before generating a multi-level port preemption request, the method further includes the following operations: and based on the data frames input by the port buffer, when the port buffers the data frames with the specified number, judging that the data frames need to be sent out from the port.
On the basis of the technical scheme, the method further comprises the following operations: and when the data frame is input and sent out, updating the OCB resource occupation count and the DDR resource occupation count of each port in real time.
The invention has the beneficial effects that:
in the invention, multi-level port preemption requests can be generated according to the flow of each port and the configurable cache threshold of each port; judging and arbitrating the multi-level port preemption request generated by each port, and generating one permission of switching, maintaining and blocking as an arbitration result; and sending the data frames of each port into a corresponding DDR cache or OCB cache or blocking according to different arbitration results, thereby realizing the dynamic storage switching of the internal cache and the external cache. The advantages of large bandwidth of an internal cache and large capacity of an external cache are fully utilized, and the integral data storage capacity of the equipment is effectively improved; in addition, an external storage device with high specification is not required, the use cost is low, and the practical application requirement is met.
Drawings
FIG. 1 is a block diagram of an apparatus for switching data frame storage according to an embodiment of the present invention;
fig. 2 is a schematic diagram illustrating that a decision arbitration module divides port preemption requests into groups according to an embodiment of the present invention;
FIG. 3 is a diagram illustrating an embodiment of a decision arbitration process;
FIG. 4 is a flowchart of a method for switching data frame storage according to an embodiment of the present invention;
fig. 5 is a flowchart of a method for switching data frame storage according to another embodiment of the present invention.
Detailed Description
With the continuous increase of data storage bandwidth and capacity requirements of HGU and OLT (Optical Line Terminal) devices, the traditional data caching architecture has been unable to meet new requirements. Although the bandwidth can meet the requirement by simply adopting the internal cache of the chip, the large capacity will inevitably cause the area and the cost of the chip to be overhigh. Although the capacity of the external cache (such as a DDR cache) is adopted alone to meet the requirement, the capacity is limited by the efficiency loss and the overhead of the external cache, and when the bandwidth of the internal cache is the same, a higher-specification external device is often required to implement the external cache, and the adoption of a high-specification external memory device also causes the system cost to be too high.
In the prior art, the purpose of meeting bandwidth and capacity is achieved by adopting a mode of coexistence of an internal cache and an external cache, for example, port data with a large capacity requirement is fixedly written into the external cache and port data with a large bandwidth requirement is written into the internal cache according to different requirements of the ports on the bandwidth and the capacity in equipment, and the mode can achieve the balance of the bandwidth and the capacity in a specific scene. However, when all ports have strict requirements on bandwidth and capacity, the fixed division of the internal cache and the external cache cannot meet the requirements.
Aiming at the problem of how to efficiently utilize the storage bandwidth and capacity under the situation that an internal cache and an external cache coexist, the invention aims to provide a device and a method for data frame storage switching, which can realize the dynamic switching of the internal cache and the external cache so as to improve the storage bandwidth and capacity of equipment, have low use cost and meet the requirements of practical application.
In order to achieve the purpose, the main design idea of the invention is as follows: generating multi-level port preemption requests according to the flow (port DDR resource occupation count and port OCB resource occupation count) of each port and the configurable cache threshold of each port; judging and arbitrating the multi-level port preemption request generated by each port, and generating one permission of switching, maintaining and blocking as an arbitration result; and sending the data frame of each port to a corresponding DDR buffer or OCB buffer or blocking according to different arbitration results. Compared with the prior art, the mode that the internal cache and the external cache are fixedly divided is adopted, the scheme can realize the dynamic storage switching of the internal cache and the external cache, fully utilizes the advantages of large bandwidth of the internal cache and large capacity of the external cache, and effectively improves the integral data storage capacity of the equipment.
In order to make the technical problems, technical solutions and advantages of the present invention more apparent, the technical solutions of the present invention will be described in detail with reference to the accompanying drawings and specific embodiments.
However, it should be noted that: the examples to be described next are only some specific examples, and are not intended to limit the embodiments of the present invention necessarily to the following specific steps, values, conditions, data, orders, and the like. Those skilled in the art can, upon reading this specification, utilize the concepts of the present invention to construct more embodiments than those specifically described herein.
Example one
Referring to fig. 1, the present embodiment provides a device for switching data frame storage, including a port switching decision module, a decision arbitration module, a DDR read-write control module, and an OCB read-write control module.
Wherein, the port switching decision module is used for: when each port needs to send out a data frame from the port, generating a multi-level port preemption request according to a port DDR resource occupation count sent by a DDR read-write control module, a port OCB resource occupation count sent by an OCB read-write control module and a cache threshold configuration value of the port; and sending the data frame of each port to the corresponding DDR read-write control module or OCB read-write control module or blocking according to the arbitration result fed back by the judgment arbitration module.
In this embodiment, the port DDR resource occupancy count and the port OCB resource occupancy count are equivalently measured as the port traffic, that is, the port DDR resource occupancy count is expressed according to the port DDR traffic, and the port OCB resource occupancy count is expressed according to the port OCB traffic. In addition, the buffer threshold configuration value of the port is a configurable preset value, and comprises an OCB buffer threshold configuration value of the port and a DDR buffer threshold configuration value of the port. The OCB cache threshold configuration value of the port is a single threshold configuration value, and the configuration is carried out according to the flow of each port in proportion so as to ensure the requirement of basic bandwidth of each port; the DDR buffer threshold configuration value of the port is a multi-level threshold configuration value, so that a multi-level port preemption request can be generated.
A decision arbitration module to: and performing judgment arbitration on the multi-level port preemption request generated by the port switching judgment module, and feeding back an arbitration result to the port switching judgment module. Specifically, in the present embodiment, the decision arbitration module generates one of the three kinds of grants of switching, holding and blocking as the arbitration result. The port switching judgment module sends each port data frame to the corresponding DDR read-write control module or OCB read-write control module or blocks according to the arbitration result fed back by the judgment arbitration module, and the method comprises the following processing conditions:
1) port write-in DDR cache
If the arbitration result of the switching permission is obtained, the port data frame is sent to an OCB read-write control module, namely, the port data frame is switched and written into an OCB cache;
if the arbitration result of the permission keeping is obtained, the port data frame is sent to a DDR read-write control module, namely, the port data frame is kept written into a DDR cache;
if the arbitration result of the blocking permission is obtained, the data frame of the port is subjected to blocking processing, namely data back pressure is carried out;
2) port original write OCB cache
Sending the port data frame to a DDR read-write control module when the arbitration result of the switching permission is obtained, namely switching and writing the port data frame into a DDR cache;
if the arbitration result of the permission is obtained, the port data frame is sent to the OCB read-write control module, namely, the port data frame is kept written into the OCB cache;
and if the arbitration result of the blocking permission is obtained, blocking processing is carried out on the port data frame, namely data back pressure is carried out.
The DDR read-write control module is used for: counting the DDR resource occupation count of each port and sending the DDR resource occupation count to a port switching judgment module; and controlling data writing and reading of the DDR cache. In practical application, as a preferred embodiment, the DDR read-write control module may also be used to pre-buffer a data frame to which DDR needs to be written, so as to improve interface efficiency of DDR.
OCB read-write control module, is used for: counting the OCB resource occupation count of each port and sending the OCB resource occupation count to a port switching judgment module; and controlling the data writing and reading of the OCB buffer. Similar to the DDR read-write control module, in practical application, as an optimal implementation manner, the OCB read-write control module may also be used to pre-buffer a data frame to be written into the OCB, so as to improve the interface efficiency of the OCB.
As can be seen from the above description, in this embodiment, the port switching determining module may generate a multi-level port preemption request according to the flow (port DDR resource occupancy count, port OCB resource occupancy count) of each port and the configurable buffer threshold of each port; the judgment arbitration module judges and arbitrates the multi-level port preemption request generated by each port and generates one permission of switching, maintaining and blocking as an arbitration result; the port switching judgment module can send each port data frame to the corresponding DDR read-write control module or OCB read-write control module or block according to the arbitration result fed back by the judgment arbitration module, so that the dynamic storage switching of the OCB cache and the DDR cache is realized, and the storage bandwidth and the capacity of the equipment are improved. In addition, the scheme does not need to adopt a high-specification external storage device, is low in use cost and meets the requirement of practical application.
Further, as an optional implementation manner, as shown in fig. 1, the apparatus further includes a port input buffer module. The port input buffer module is used for: based on the data frames input by the port cache, after the port caches the specified number of data frames, the port switching judgment module is requested to process (namely, the data frames need to be written into the cache).
Further, as an optional implementation manner, the port switching determining module generates a multi-level port preemption request, and specifically includes the following procedures:
step 1, comparing the port OCB resource occupation count of each port with the OCB cache threshold configuration value of each port, and generating a port preemption request of the lowest level for the port exceeding the OCB cache threshold configuration value;
and 2, comparing the port DDR resource occupation counts of the rest ports with the multi-level DDR cache threshold configuration values of the respective ports, and if the port DDR resource occupation counts are larger than the Nth-level DDR cache threshold configuration values, generating an Nth-level port occupation request for the ports, wherein N is a natural number.
For example, assume that there are four ports, port 0, port 1, port 2, and port 3; port 0 is originally written into the OCB cache, and port 1, port 2 and port 3 are originally written into the DDR cache. Wherein, port 0: the OCB cache threshold is 10, the 0-level DDR cache threshold is 0, the 1-level DDR cache threshold is 20, the 2-level DDR cache threshold is 30, and the 3-level DDR cache threshold is 40; port 1: the OCB cache threshold is 20, the 0-level DDR cache threshold is 0, the 1-level DDR cache threshold is 30, the 2-level DDR cache threshold is 40, and the 3-level DDR cache threshold is 50; port 2: the OCB cache threshold is 30, the 0-level DDR cache threshold is 0, the 1-level DDR cache threshold is 40, the 2-level DDR cache threshold is 50, and the 3-level DDR cache threshold is 60; port 3: the buffer threshold of the OCB is 40, the buffer threshold of the 0-level DDR is 0, the buffer threshold of the 1-level DDR is 50, the buffer threshold of the 2-level DDR is 60, and the buffer threshold of the 3-level DDR is 70.
Suppose that at a certain time, the OCB resource occupancy count and the DDR resource occupancy count of each port are as follows:
port 0: the OCB resource occupation count is 12, and the DDR resource occupation count is 15;
port 1: the OCB resource occupation count is 18, and the DDR resource occupation count is 25;
port 2: the OCB resource occupation count is 28, and the DDR resource occupation count is 65;
port 3: the OCB resource occupancy count is 38 and the DDR resource occupancy count is 75.
The specific flow of generating a multi-level port preemption request may then be as follows:
firstly, comparing the OCB resource occupation counts of the four ports with the OCB cache threshold configuration value of each port, wherein the OCB resource occupation count of the port 0 exceeds the OCB cache threshold configuration value (12 is more than 10), and generating a port preemption request of the lowest level for the port 0, namely a port preemption request of the level 0.
Then, comparing the DDR resource occupation counts of the rest ports 1, 2 and 3 with the multi-level DDR cache threshold configuration values of the respective ports respectively, wherein the DDR resource occupation count of the port 1 is greater than the 0-level DDR cache threshold (25 is greater than 0), and generating a 0-level port preemption request for the port 1; if the DDR resource occupation count of the port 2 is greater than the 3-level DDR cache threshold (65 is greater than 60), generating a 3-level port preemption request for the port 2; if the DDR resource occupancy count for port 3 is greater than its 3-level DDR cache threshold (75 > 70), a level 3 port preemption request is generated for port 3.
In addition, in practical applications, when data is input and sent out to each port, the OCB read-write control module and the DDR read-write control module need to maintain statistical information based on the OCB cache and the DDR cache for each port, that is, the OCB resource occupancy count and the DDR resource occupancy count of each port are updated and counted in real time.
Example two
The basic structure of a data frame storage switching apparatus provided in this embodiment is the same as that of the first embodiment, except that, as a preferred implementation, in this embodiment, when performing decision arbitration on a multi-level port preemption request generated by each port, a decision arbitration module uses a packet absolute priority mode: the port preemption requests of the same level of each port are divided into a group, arbitration selection is carried out between the groups according to an absolute priority mode, the priority between the ports in the same group can be flexibly configured, arbitration selection is carried out in the group according to the absolute priority mode, and the selected ports obtain corresponding permission. Specifically, the decision arbitration module performs decision arbitration by using a packet absolute priority mode, and includes the following operations:
the method comprises the following steps that firstly, a judgment arbitration module divides port preemption requests of the same level of each port into a group, and the groups are arranged according to the sequence that the higher the DDR cache threshold configuration value is, the higher the priority of the group is; the priority of each port in the group is configured according to a specified strategy. The designated policy may be flexibly set according to specific requirements, for example, configuring the priority according to the size of the port number or designing the port priority as software configurable, and the like, which is not specifically limited in this embodiment.
Specifically, as shown in fig. 2, assuming that the port switching decision module generates 0, 1, 2 … … or M-level port preemption requests for each port according to the DDR resource occupancy count, the OCB resource occupancy count and the configurable buffering threshold configuration value, the decision arbitration module divides the port preemption requests of the same level of the ports 0, 1, 2 … … N into one group, and the groups of the M levels are arranged in an order of higher DDR buffering threshold configuration value and higher priority of the group (as shown in fig. 2, the higher DDR buffering threshold configuration value is, the higher priority of the group indicates that the DDR resource occupancy needs to be switched to the OCB buffer preferentially, the higher DDR switching priority is, the lower DDR retention priority is, and conversely, the lower DDR buffering threshold configuration value is, the lower priority of the group indicates that the DDR resource occupancy needs to be kept written into the DDR buffer most, the higher the corresponding DDR hold priority, the lower the DDR switch priority). The priority of each port in the same group is configured according to a specified strategy.
For example, also taking the example in the first embodiment as an example, it is assumed that port 0 generates a port preemption request of level 0, port 1 also generates a port preemption request of level 0, port 2 generates a port preemption request of level 3, and port 3 also generates a port preemption request of level 3. Then, port 0 and port 1 are divided into group 0, and port 2 and port 3 are divided into group 3. The priority of the group 3 is higher than that of the group 0 because the groups are arranged in the order of higher priority according to the higher DDR buffer threshold configuration value. In this example, assuming that the policy is configured according to the size of the port number, the higher the port number is, the higher the priority is, the priority of port 1 is higher than that of port 0 in the group 0; in group 3, port 3 has priority over port 2.
Step two, judging whether the port is originally written in a DDR cache or an OCB cache, and if the port is the DDR cache, switching to step three; and if the OCB is cached, the step four is carried out. It can be understood that, as a preferred implementation manner, in this embodiment, each port data frame may have a priority for an on-chip cache (OCB) channel initially, that is, the port data frame is initially written into an OCB cache preferentially, and then the flow of step four is entered during initial decision arbitration; however, other initial writing manners may be adopted in practical application, and this embodiment is not particularly limited.
Step three, firstly, arbitrating that the port preemption request is switched from the DDR cache to the OCB cache, preferentially selecting a group with the highest priority and non-empty members in the group (the group with the highest priority needs to be preferentially switched to the OCB cache due to the high DDR cache threshold configuration value, which indicates that the DDR resource is occupied), arbitrating the interior of the selected group from high to low according to the configured priority, and obtaining the switching permission from the DDR cache to the OCB cache by the selected port;
for example, also taking the example in the above step as an example, assume that the current packet is divided into port 0 and port 1 in group 0, and port 2 and port 3 in group 3; when a port which can be written into the OCB cache is selected, inter-group arbitration is firstly carried out, as the priority of the group 3 is higher than that of the group 0, the group 3 is selected (the group with high priority indicates that the DDR resource is occupied and needs to be preferentially switched to the OCB cache because the DDR cache threshold configuration value is high); then carrying out group arbitration, carrying out group arbitration according to the priority of the ports, wherein the priority of the port 3 in the 3 rd group is higher than that of the port 2, so that the port 3 obtains the final OCB write permission;
secondly, arbitrating the port preemption request for keeping writing into the DDR cache, preferentially selecting a group with a lowest priority and no members in the group (the group with the low priority indicates that the DDR resource occupies least and needs to be kept writing into the DDR cache due to a low DDR cache threshold configuration value), arbitrating the interior of the selected group from high to low according to the configured priority, and obtaining permission of keeping writing into the DDR cache by the selected port;
for example, also taking the example in the above step as an example, assume that the current grouping is port 0 and port 1 are divided into group 0, and port 2 is divided into group 3 (port 3 is excluded because it was selected in the previous step); when the port which can be written into the DDR cache is selected, inter-group arbitration is firstly carried out, as the priority of the group 0 is lower than that of the group 3, the group 0 is selected (the group with low priority indicates that the occupation of DDR resources is least and needs to be kept and written into the DDR cache because the threshold configuration value of the DDR cache is low); then performing in-group arbitration, wherein the arbitration in the group is performed according to the priority of the port, and the priority of the port 1 in the 0 th group is higher than that of the port 0, so that the port 1 obtains the final DDR write permission;
finally, other non-selected ports will get blocking permission, and their data frames will be blocked (back-pressed) in the port input buffer.
Step four, judging whether the OCB resource occupation count of the port exceeds an OCB cache threshold configuration value, if not, the port obtains permission of keeping writing in an OCB cache; if the port is selected, the switch permission from the OCB cache to the DDR cache is obtained. Specifically, if the OCB resource occupancy count of the port exceeds the OCB cache threshold configuration value, it is determined whether the port is in a group whose members in the group are not empty and whose priority is the lowest, and the priority of the port is the highest priority in the group, and if so, a switching permission from the OCB cache to the DDR cache is obtained; otherwise, blocking permission will be obtained, and its data frames will be blocked (back-pressed) in the port input buffer.
For a more clear description of the specific operation of the decision arbitration, the arbitration flow of the second to fourth steps can be seen in fig. 3.
In addition, it can be understood that, (1) when the port has insufficient OCB buffer capacity due to traffic burst or congestion, the port needs to switch to DDR buffer write to prevent packet loss smoothly and excessively; and because the bandwidth is insufficient when the DDR cache is singly used, the OCB cache needs to be switched back after enough residual space exists in the OCB cache. (2) DDR cache writing needs to wait for response, and in order to ensure that packets in the same port are not out of order when being switched from the DDR cache to the OCB cache, switching needs to be ensured after data response of writing DDR is completed; if the switching is performed frequently, the bandwidth is lost due to frequent waiting for the DDR response, so the switching frequency needs to be controlled according to the DDR buffer threshold configuration value. (3) The higher the resource occupation of the port DDR cache is, the longer the time for the port to keep writing in the DDR cache is (i.e. the lower the frequency of switching between the port OCB cache and the DDR cache), the more difficult the bandwidth requirement of the port is guaranteed, and the port needs to be preferentially switched to the OCB cache. On the contrary, if the DDR cache resource occupation of the port is low, the priority of keeping the port continuously written into the DDR cache is needed.
In this embodiment, an arbitration mode of packet absolute priority is adopted, which can simultaneously meet the requirements of the three situations, thereby achieving the purpose of port bandwidth and capacity equalization processing.
EXAMPLE III
Referring to fig. 4, based on the same inventive concept, an embodiment of the present invention further provides a method for switching data frame storage, where the method includes the following steps:
and S1, when each port needs to send out the data frame from the port, generating a multi-level port preemption request according to the port DDR resource occupation count, the port OCB resource occupation count and the port cache threshold configuration value. In this embodiment, the port DDR resource occupancy count and the port OCB resource occupancy count are equivalently measured as the port traffic, that is, the port DDR resource occupancy count is expressed according to the port DDR traffic, and the port OCB resource occupancy count is expressed according to the port OCB traffic. In addition, the buffer threshold configuration value of the port is a configurable preset value, and comprises an OCB buffer threshold configuration value of the port and a DDR buffer threshold configuration value of the port. The OCB cache threshold configuration value of the port is a single threshold configuration value, and the configuration is carried out according to the flow of each port in proportion so as to ensure the requirement of basic bandwidth of each port; the DDR buffer threshold configuration value of the port is a multi-level threshold configuration value, so that a multi-level port preemption request can be generated.
And S2, performing judgment and arbitration on the generated multi-level port preemption requests to obtain an arbitration result.
And S3, sending the data frame of each port to the corresponding DDR buffer or OCB buffer or blocking according to the obtained arbitration result.
Further, as an alternative embodiment, as shown in fig. 5, before step S1, the method further includes step S0: and based on the data frames input by the port buffer, when the port buffers the data frames with the specified number, judging that the data frames need to be sent out from the port.
Further, as an optional implementation manner, step S1 specifically includes the following steps:
s101, comparing the port OCB resource occupation count of each port with the OCB cache threshold configuration value of each port, and generating a port preemption request of the lowest level for the port exceeding the OCB cache threshold configuration value;
s102, comparing the port DDR resource occupation counts of the rest ports with the multi-level DDR cache threshold configuration values of the respective ports, and if the port DDR resource occupation counts are larger than the Nth-level DDR cache threshold configuration values, generating an Nth-level port preemption request for the ports.
Still further, as an alternative implementation, as shown in fig. 5, after step S3, the method further includes step S4: and when the data frame is input and sent out, updating the OCB resource occupation count and the DDR resource occupation count of each port in real time.
As can be seen from the above operation, in this embodiment, a multi-level port preemption request can be generated according to the flow of each port and the configurable cache threshold of each port; the decision arbitration is carried out on the multi-level port preemption requests generated by each port, and different arbitration results can be generated; and sending the data frames of each port into a corresponding DDR cache or OCB cache or blocking according to different arbitration results, thereby realizing the dynamic storage switching of the internal cache and the external cache. The advantages of large bandwidth of an internal cache and large capacity of an external cache are fully utilized, and the integral data storage capacity of the equipment is effectively improved; in addition, an external storage device with high specification is not required, the use cost is low, and the practical application requirement is met.
Example four
The basic steps of the method for switching data frame storage provided in this embodiment are the same as those of the embodiment, and the difference is that, as a preferred implementation, in step S2 of this embodiment, when performing decision arbitration on multi-level port preemption requests, a method of grouping absolute priorities is adopted: dividing the port preemption requests of the same level of each port into a group, carrying out arbitration selection between the groups according to an absolute priority mode, configuring the priority between the ports in the same group according to a designated strategy, and carrying out arbitration selection in the group according to the absolute priority mode; the selected port will get one of a switch grant, a hold grant and a block grant as an arbitration result. For a specific flow of decision arbitration by using the packet absolute priority mode, reference may be made to the specific description in the third embodiment.
In addition, it should be noted that, since the method of this embodiment is similar to the apparatus of the first and second embodiments in the principle of solving the problem, the specific implementation of the method can refer to the specific implementation of the apparatus, and repeated details are not repeated.
Note that: the above-described embodiments are merely examples and are not intended to be limiting, and those skilled in the art can combine and combine some steps and devices from the above-described separately embodiments to achieve the effects of the present invention according to the concept of the present invention, and such combined and combined embodiments are also included in the present invention, and such combined and combined embodiments are not described herein separately.
Advantages, effects, and the like, which are mentioned in the embodiments of the present invention, are only examples and are not limiting, and they cannot be considered as necessarily possessed by the various embodiments of the present invention. Furthermore, the foregoing specific details disclosed herein are merely for purposes of example and for purposes of clarity of understanding, and are not intended to limit the embodiments of the invention to the particular details which may be employed to practice the embodiments of the invention.
The block diagrams of devices, apparatuses, systems involved in the embodiments of the present invention are only given as illustrative examples, and are not intended to require or imply that the connections, arrangements, configurations, etc. must be made in the manner shown in the block diagrams. These devices, apparatuses, devices, systems may be connected, arranged, configured in any manner, as will be appreciated by those skilled in the art. Words such as "including," "comprising," "having," and the like are open-ended words that mean "including, but not limited to," and are used interchangeably therewith. As used in connection with embodiments of the present invention, the terms "or" and "refer to the term" and/or "and are used interchangeably herein unless the context clearly dictates otherwise. The word "such as" is used in connection with embodiments of the present invention to mean, and is used interchangeably with, the word "such as but not limited to".
The flow charts of steps in the embodiments of the present invention and the above description of the methods are merely illustrative examples and are not intended to require or imply that the steps of the various embodiments must be performed in the order presented. As will be appreciated by those skilled in the art, the order of the steps in the above embodiments may be performed in any order. Words such as "thereafter," "then," "next," etc. are not intended to limit the order of the steps; these words are only used to guide the reader through the description of these methods. Furthermore, any reference to an element in the singular, for example, using the articles "a," "an," or "the" is not to be construed as limiting the element to the singular.
In addition, the steps and devices in the embodiments of the present invention are not limited to be implemented in a certain embodiment, and in fact, some steps and devices in the embodiments of the present invention may be combined according to the concept of the present invention to conceive new embodiments, and these new embodiments are also included in the scope of the present invention.
The respective operations in the embodiments of the present invention may be performed by any appropriate means capable of performing the corresponding functions. The means may comprise various hardware and/or software components and/or modules including, but not limited to, hardware circuitry or a processor.
The method of an embodiment of the invention includes one or more acts for implementing the method described above. The methods and/or acts may be interchanged with one another without departing from the scope of the claims. In other words, unless a specific order of actions is specified, the order and/or use of specific actions may be modified without departing from the scope of the claims.
The functions in the embodiments of the present invention may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored as one or more instructions on a tangible computer-readable medium. A storage media may be any available tangible media that can be accessed by a computer. By way of example, and not limitation, such computer-readable media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other tangible medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer. As used herein, disk (disk) and Disc (Disc) include Compact Disc (CD), laser Disc, optical Disc, DVD (Digital Versatile Disc), floppy disk and blu-ray Disc where disks reproduce data magnetically, while discs reproduce data optically with lasers.
Accordingly, a computer program product may perform the operations presented herein. For example, such a computer program product may be a computer-readable tangible medium having instructions stored (and/or encoded) thereon that are executable by one or more processors to perform the operations described herein. The computer program product may include packaged material.
Other examples and implementations are within the scope and spirit of the embodiments of the invention and the following claims. For example, due to the nature of software, the functions described above may be implemented using software executed by a processor, hardware, firmware, hard-wired, or any combination of these. Features implementing functions may also be physically located at various locations, including being distributed such that portions of functions are implemented at different physical locations.
Various changes, substitutions and alterations to the techniques described herein may be made by those skilled in the art without departing from the techniques of the teachings as defined by the appended claims. Moreover, the scope of the claims of the present disclosure is not limited to the particular aspects of the process, machine, manufacture, composition of matter, means, methods and acts described above. Processes, machines, manufacture, compositions of matter, means, methods, or acts, presently existing or later to be developed that perform substantially the same function or achieve substantially the same result as the corresponding aspects described herein may be utilized. Accordingly, the appended claims are intended to include within their scope such processes, machines, manufacture, compositions of matter, means, methods, or acts.
The previous description of the disclosed aspects is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these aspects will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other aspects without departing from the scope of the invention. Thus, the present invention is not intended to be limited to the aspects shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
The foregoing description has been presented for purposes of illustration and description. Furthermore, the description is not intended to limit embodiments of the invention to the form disclosed herein. While a number of example aspects and embodiments have been discussed above, those of skill in the art will recognize certain variations, modifications, alterations, additions and sub-combinations thereof. And those not described in detail in this specification are within the skill of the art.
Claims (10)
1. An apparatus for switching between data frame storage, comprising: the device comprises a port switching judgment module, a judgment arbitration module, a DDR read-write control module and a chip internal cache OCB read-write control module;
the port switching decision module is configured to: generating a multi-level port preemption request according to the port DDR resource occupation count, the port OCB resource occupation count and the port cache threshold configuration value; sending each port data frame to a corresponding DDR read-write control module or OCB read-write control module or blocking according to an arbitration result fed back by the judgment arbitration module;
the decision arbitration module is configured to: performing decision arbitration on the multi-level port preemption request generated by the port switching decision module, and feeding an arbitration result back to the port switching decision module;
the DDR read-write control module is used for: counting the DDR resource occupation count of each port; controlling data writing and reading of the DDR cache;
the OCB read-write control module is used for: counting the OCB resource occupation count of each port and sending the OCB resource occupation count to a port switching judgment module; and controlling the data writing and reading of the OCB buffer.
2. The apparatus for switching data frame storage according to claim 1, wherein the buffer threshold configuration value of the port comprises: the OCB caches the threshold configuration value and DDR caches the threshold configuration value; the OCB cache threshold configuration value is a single threshold configuration value, and the DDR cache threshold configuration value is a multi-level threshold configuration value;
the port switching judgment module generates a multi-level port preemption request, and specifically comprises the following procedures:
comparing the port OCB resource occupation count of each port with the OCB cache threshold configuration value of each port, and generating a port occupation request of the lowest level for the port exceeding the OCB cache threshold configuration value;
and comparing the port DDR resource occupation counts of the rest ports with the multi-level DDR cache threshold configuration values of the respective ports, and if the port DDR resource occupation counts are greater than the Nth-level DDR cache threshold configuration values, generating an Nth-level port occupation request for the ports, wherein N is a natural number.
3. The apparatus for switching data frame storage according to claim 1, wherein the decision arbitration module, when performing decision arbitration, adopts a packet absolute priority mode: dividing the port preemption requests of the same level of each port into a group, carrying out arbitration selection between the groups according to an absolute priority mode, configuring the priority between the ports in the same group according to a designated strategy, and carrying out arbitration selection in the group according to the absolute priority mode; the selected port will get one of a switch grant, a hold grant and a block grant as an arbitration result.
4. The apparatus for switching storage of data frames according to any of claims 1 to 3, further comprising a port input buffer module for: and requesting the port switching judgment module to process the data frames which are input by the port cache after the port caches the data frames with the specified number.
5. An apparatus for switching storage of a data frame according to any one of claims 1 to 3, wherein: when the data frame is input and sent out by each port, the OCB read-write control module and the DDR read-write control module respectively update the OCB resource occupation count and the DDR resource occupation count of each port.
6. A method of data frame storage switching, the method comprising the steps of:
when each port needs to send out a data frame from the port, generating a multi-level port preemption request according to the port DDR resource occupation count, the port chip internal cache OCB resource occupation count and the port cache threshold configuration value;
performing judgment arbitration on the multi-level port preemption request to obtain an arbitration result;
and sending the data frame of each port to a corresponding DDR buffer or OCB buffer or blocking according to the arbitration result.
7. The method of data frame storage switching according to claim 6, wherein the buffer threshold configuration value of the port comprises: the OCB caches the threshold configuration value and DDR caches the threshold configuration value; the OCB cache threshold configuration value is a single threshold configuration value, and the DDR cache threshold configuration value is a multi-level threshold configuration value;
generating a multi-level port preemption request according to the port DDR resource occupation count, the port OCB resource occupation count and the port cache threshold configuration value, wherein the specific process comprises the following steps:
comparing the port OCB resource occupation count of each port with the OCB cache threshold configuration value of each port, and generating a port occupation request of the lowest level for the port exceeding the OCB cache threshold configuration value;
and comparing the port DDR resource occupation counts of the rest ports with the multi-level DDR cache threshold configuration values of the respective ports, and if the port DDR resource occupation counts are greater than the Nth-level DDR cache threshold configuration values, generating an Nth-level port occupation request for the ports, wherein N is a natural number.
8. The method of claim 6, wherein when performing decision arbitration for said multi-level port preemption requests, a packet absolute priority approach is used: dividing the port preemption requests of the same level of each port into a group, carrying out arbitration selection between the groups according to an absolute priority mode, configuring the priority between the ports in the same group according to a designated strategy, and carrying out arbitration selection in the group according to the absolute priority mode; the selected port will get one of a switch grant, a hold grant and a block grant as an arbitration result.
9. A method of data frame store switching according to any one of claims 6 to 8, further comprising, prior to generating a multi-level port preemption request: and based on the data frames input by the port buffer, when the port buffers the data frames with the specified number, judging that the data frames need to be sent out from the port.
10. A method of data frame storage switching according to any of claims 6 to 8, characterised in that the method further comprises the operations of:
and when the data frame is input and sent out, updating the OCB resource occupation count and the DDR resource occupation count of each port in real time.
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