CN111241022B

CN111241022B - GPIO state query method, device and storage medium

Info

Publication number: CN111241022B
Application number: CN202010059923.XA
Authority: CN
Inventors: 俞斌
Original assignee: Guangdong Boer Technology Co ltd
Current assignee: Guangdong Boer Technology Co ltd
Priority date: 2020-01-19
Filing date: 2020-01-19
Publication date: 2023-12-29
Anticipated expiration: 2040-01-19
Also published as: CN111241022A

Abstract

The embodiment of the application provides a storage medium and an application to electronic equipment. The electronic device comprises a GPIO circuit and a sample resistor which are connected in series, wherein the GPIO circuit comprises a plurality of special GPIO pins, and each special GPIO pin is connected with a pull-down resistor and has different resistance values. When the special GPIO pin is connected with a low level, the connected pull-down resistor is connected with the GPIO circuit in parallel; when the special GPIO pin is connected with a high level, the connected pull-down resistor is not connected into the GPIO circuit. When the GPIO state is inquired, the total resistance value of the pull-down resistor connected to the GPIO circuit can be determined according to the first input voltage of the sample resistor, the second input voltage of the GPIO circuit and the resistance value of the sample resistor, and the current working state of each special GPIO pin is determined based on the total resistance value and the resistance value of each pull-down resistor. The working state of the GPIO pin can be effectively detected, and the utilization rate of the GPIO interface in the electronic equipment is improved.

Description

GPIO state query method, device and storage medium

Technical Field

The present disclosure relates to the field of electronic technologies, and in particular, to a GPIO status query method, device, and storage medium.

Background

GPIO (General-purpose input/output) with PINs for the user to use freely by program control, and PIN PINs can be used as General input (GPI) or General output (GPO) or General input and output (GPIO) according to practical considerations. Because the number of GPIOs is often limited, but the functions of the mobile terminal are increasingly more and more, peripheral chips are required for GPIOs expansion, and the cost is higher.

Disclosure of Invention

The embodiment of the application provides a GPIO state query method, a GPIO state query device and a storage medium, which can effectively detect the working state of a GPIO pin and improve the utilization rate of a GPIO interface in electronic equipment.

In a first aspect, an embodiment of the present application provides a GPIO status query method, which is applied to an electronic device, where the electronic device includes a GPIO circuit and a sample resistor, the GPIO circuit is connected in series with the sample resistor, and when the electronic device is powered on, an electrical signal is transmitted to the GPIO circuit after passing through the sample resistor; the GPIO circuit comprises a plurality of special GPIO pins, wherein each special GPIO pin is connected with a pull-down resistor, and the resistance value of each special GPIO pin is different; when the special GPIO pin is connected with a low level, the connected pull-down resistor is connected into the GPIO circuit in parallel; when the special GPIO pin is connected to a high level, the connected pull-down resistor is not connected to the GPIO circuit; the method comprises the following steps:

acquiring a first input voltage of the sample resistor and a second input voltage of the GPIO circuit;

determining the total resistance value of a pull-down resistor connected to the GPIO circuit according to the first input voltage, the second input voltage and the resistance value of the sample resistor;

and determining the current working state of each special GPIO pin based on the total resistance value and the resistance value of each pull-down resistor.

In an embodiment, the determining the total resistance value of the pull-down resistor connected to the GPIO circuit according to the first input voltage, the second input voltage and the resistance value of the sample resistor includes:

calculating the voltage difference between two ends of the sample resistor according to an input voltage and a second input voltage;

calculating a ratio between a second input voltage and the voltage difference;

and calculating the total resistance value of the pull-down resistor connected to the GPIO circuit according to the ratio and the resistance value of the sample resistor.

In an embodiment, the determining the current operation state of each dedicated GPIO pin based on the total resistance value and the resistance value of each pull-down resistor includes:

obtaining the total resistance value of the GPIO circuit when the pull-down resistors are combined in different access states, and obtaining a plurality of sample total resistance values;

determining a target sample resistance total value matched with the resistance total value from a plurality of sample resistance total values;

determining the connection state of each pull-down resistor corresponding to the total value of the target sample resistor;

and determining the current working state of each special GPIO pin based on the access state of each pull-down resistor.

In an embodiment, the electronic device further includes a processor, and the processor is electrically connected to the signal input terminal of the GPIO circuit through its peripheral GPIO pin;

acquiring a second input voltage of the GPIO circuit, comprising:

and acquiring the voltage at the peripheral GPIO pin as a second input voltage of the GPIO circuit.

In an embodiment, after determining the current working state of each dedicated GPIO pin based on the total resistance value and the resistance value of each pull-down resistor, the method further includes:

acquiring an upper limit voltage value and a lower limit voltage value corresponding to the second input voltage;

when the second input voltage is detected to exceed the upper limit voltage value or be lower than the lower limit voltage value, the operation of determining the working state of each special GPIO pin is continuously carried out, and the upper limit voltage value and/or the current lower limit voltage value are updated based on the voltage value of the current second input voltage.

In a second aspect, an embodiment of the present application provides a GPIO status query method, which is applied to an electronic device, where the electronic device includes a GPIO circuit and a sample resistor, the GPIO circuit is connected in series with the sample resistor, and when the electronic device is powered on, an electrical signal is transmitted to the GPIO circuit after passing through the sample resistor; the GPIO circuit comprises a plurality of special GPIO pins, wherein each special GPIO pin is connected with a pull-down resistor, and the resistance value of each special GPIO pin is different; when the special GPIO pin is connected with a low level, the connected pull-down resistor is connected into the GPIO circuit in parallel; when the special GPIO pin is connected to a high level, the connected pull-down resistor is not connected to the GPIO circuit; the device comprises:

a first acquisition unit, configured to acquire a first input voltage of the sample resistor and a second input voltage of the GPIO circuit;

the information determining unit is used for determining the total resistance value of the pull-down resistor connected to the GPIO circuit according to the first input voltage, the second input voltage and the resistance value of the sample resistor;

and the state determining unit is used for determining the current working state of each special GPIO pin based on the total resistance value and the resistance value of each pull-down resistor.

In an embodiment, the information determining unit is configured to:

calculating a ratio between a second input voltage and the voltage difference;

In an embodiment, the state determining unit is configured to:

In an embodiment, the GPIO status query device further includes:

the second acquisition unit is used for acquiring an upper limit voltage value and a lower limit voltage value corresponding to the second input voltage after determining the current working state of each special GPIO pin based on the total resistance value and the resistance value of each pull-down resistor;

and the processing unit is used for continuously executing the operation of determining the working state of each special GPIO pin when the second input voltage is detected to exceed the upper limit voltage value or to be lower than the lower limit voltage value, and updating the upper limit voltage value and/or the current lower limit voltage value based on the voltage value of the current second input voltage.

In a third aspect, embodiments of the present application provide a storage medium having stored thereon a computer program to be executed by a controller to implement the steps of the GPIO status query method as set forth in the preceding claims.

In this application implementation, electronic equipment includes GPIO circuit and sample resistance of establishing ties, and GPIO circuit includes a plurality of special GPIO pins, and pull-down resistance and resistance value are different for each special GPIO pin connection. When the special GPIO pin is connected with a low level, the connected pull-down resistor is connected with the GPIO circuit in parallel; when the special GPIO pin is connected with a high level, the connected pull-down resistor is not connected into the GPIO circuit. When the GPIO state is inquired, the total resistance value of the pull-down resistor connected to the GPIO circuit can be determined according to the first input voltage of the sample resistor, the second input voltage of the GPIO circuit and the resistance value of the sample resistor, and the current working state of each special GPIO pin is determined based on the total resistance value and the resistance value of each pull-down resistor. The working state of the GPIO pin can be effectively detected, and the utilization rate of the GPIO interface in the electronic equipment is improved.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings that are required to be used in the description of the embodiments will be briefly described below. It is obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained from these drawings without inventive effort for a person skilled in the art.

Fig. 1 is a schematic structural diagram of an electronic device according to an embodiment of the present application.

Fig. 2 is a block diagram of an electronic device according to an embodiment of the present application.

Fig. 3 is a schematic diagram of a first structure of a GPIO circuit according to an embodiment of the present application.

Fig. 4 is a flow chart of a GPIO status query method according to an embodiment of the present application.

Fig. 5 is another schematic structural diagram of an electronic device according to an embodiment of the present application.

Fig. 6 is a schematic structural diagram of a central processing unit according to an embodiment of the present application.

Fig. 7 is a schematic structural diagram of a GPIO status query device according to an embodiment of the present application.

Fig. 8 is another schematic structural diagram of a GPIO status query device according to an embodiment of the present application.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It will be apparent that the described embodiments are only some, but not all, of the embodiments of the present application. All other embodiments, which can be made by those skilled in the art based on the embodiments herein without making any inventive effort, are intended to be within the scope of the present application.

In the description of the present application, the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more of the described features. In the description of the present application, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.

In the description of the present application, it should be noted that the terms "mounted," "connected," and "connected" are to be construed broadly, unless otherwise specifically defined and limited. The specific meaning of the terms in this application will be understood by those of ordinary skill in the art as the case may be.

The embodiment of the application provides a GPIO state query method, a GPIO state query device and a storage medium. Each of which will be described in detail below. The charging circuit can be arranged in electronic equipment, and the electronic equipment can be a smart phone, a tablet personal computer and the like.

Referring to fig. 1, fig. 1 is a schematic structural diagram of an electronic device according to an embodiment of the present application. The electronic device 10 may include a housing 11, a display 12, a circuit board 13, and a battery 14. Note that the electronic device 10 is not limited to the above.

Wherein the housing 11 may form an outer contour of the electronic device 10. In some embodiments, housing 11 may be a metal housing, such as a metal of magnesium alloy, stainless steel, or the like. It should be noted that the material of the housing 11 in the embodiment of the present application is not limited thereto, and other manners may be adopted, for example: the housing 11 may be a plastic housing, a ceramic housing, a glass housing, or the like.

Wherein the display screen 12 is mounted in the housing 11. The display screen 12 is electrically connected to the circuit board 13 to form a display surface of the electronic device 10. In some embodiments, the display surface of the electronic device 10 may be provided with a non-display area, such as: the top and/or bottom of the electronic device 10 may form a non-display area, i.e., the electronic device 10 forms a non-display area on the upper portion and/or the lower portion of the display 12, and the electronic device 10 may mount a camera, a receiver, or the like on the non-display area. It should be noted that the display surface of the electronic device 10 may not be provided with a non-display area, that is, the display 12 may be a full screen. The display screen may be laid over the entire display surface of the electronic device 10 so that the display screen may be displayed full-screen on the display surface of the electronic device 10.

The display 12 may have a regular shape, such as a cuboid structure or a rounded rectangular structure, or the display 12 may have an irregular shape.

The display 12 may be one or a combination of several of a liquid crystal display, an organic light emitting diode display, an electronic ink display, a plasma display, and a display using other display technologies. The display 12 may include an array of touch sensors (i.e., the display 12 may be a touch-sensitive display). The touch sensor may be a capacitive touch sensor formed of an array of transparent touch sensor electrodes, such as Indium Tin Oxide (ITO) electrodes, or may be a touch sensor formed using other touch technologies, such as acoustic wave touch, pressure sensitive touch, resistive touch, optical touch, etc., as embodiments of the present application are not limited.

It should be noted that, in some embodiments, a cover plate may be disposed on the display screen 12, and the cover plate may cover the display screen 12 to protect the display screen 12. The cover may be a transparent glass cover so that the display 12 displays through the cover. In some embodiments, the cover plate may be a glass cover plate made of a material such as sapphire.

In some embodiments, after the display screen 12 is mounted on the housing 11, a receiving space is formed between the housing 11 and the display screen 12, and the receiving space may receive components of the electronic apparatus 10, such as the circuit board 13, the battery, and the like.

The circuit board 13 is mounted in the housing 11, the circuit board 13 may be a motherboard of the electronic device 10, and one, two or more of a motor, a microphone, a speaker, an earphone interface, a universal serial bus interface, a camera, a distance sensor, an ambient light sensor, a receiver, and a processor may be integrated on the circuit board 13.

In some embodiments, the circuit board 13 may be secured within the housing 11. Specifically, the circuit board 13 may be screwed to the housing 11 by a screw, or may be snap-fitted to the housing 11 by a snap-fit manner. It should be noted that the manner in which the circuit board 13 is specifically fixed to the housing 11 in the embodiment of the present application is not limited thereto, but may be fixed by other means, such as a snap and screw together.

Wherein a battery 14 is mounted in the housing 11, the battery 11 being electrically connected to the circuit board 13 for providing power to the electronic device 10. The housing 11 may serve as a battery cover for the battery 14. The case 11 covers the battery 14 to protect the battery 14, reducing damage to the battery 14 due to collision, drop, etc. of the electronic device 10.

In some embodiments, battery 11 may be a nickel cadmium battery, a lithium ion battery, or other type of battery. The number of batteries may be one or more. The battery may be square, bar or other shapes, and in practical application, the shape may be set according to the internal structure of the electronic device itself, which is not limited in this application.

Referring to fig. 2, fig. 2 is a block diagram of an electronic device according to an embodiment of the present application. The electronic device 10 may include a storage and processing circuit 131, and the storage and processing circuit 131 may be integrated on the circuit board 13. The storage and processing circuit 131 may include memory, such as hard disk drive memory, non-volatile memory (e.g., flash memory or other electronically programmable read-only memory used to form solid state drives, etc.), volatile memory (e.g., static or dynamic random access memory, etc.), and the like, as embodiments of the present application are not limited. Processing circuitry in storage and processing circuitry 131 may be used to control operation of electronic device 10. The processing circuitry may be implemented based on one or more microprocessors, microcontrollers, digital signal processors, baseband processors, power management units, audio codec chips, application specific integrated circuits, display driver integrated circuits, and the like.

The storage and processing circuitry 131 may be used to run software in the electronic device 10, such as internet browsing applications, voice over internet protocol (Voice over Internet Protocol, VOIP) telephone call applications, email applications, media playing applications, operating system functions, and the like.

The electronic device 10 may include an input-output circuit 132, and the input-output circuit 132 may be disposed on the circuit board 13. The input-output circuit 132 is operable to enable the electronic device 10 to input and output data, i.e., to allow the electronic device 10 to receive data from an external device and also to allow the electronic device 10 to output data from the electronic device 10 to an external device. The input-output circuit 132 may further include a sensor 1321. The sensors 1321 may include ambient light sensors, light and capacitance based proximity sensors, touch sensors (e.g., light based touch sensors and/or capacitive touch sensors, where the touch sensors may be part of a touch display or may be used independently as a touch sensor structure), acceleration sensors, temperature sensors, and other sensors, etc.

The electronic device 10 may include an audio component 1322, and the audio component 1322 may be disposed on the circuit board 13. The audio component 1323 may be used to provide audio input and output functionality for the electronic device 10. The audio components 1322 in the electronic device 10 may include speakers, microphones, buzzers, tone generators, and other components for generating and detecting sound.

Electronic device 10 may include communication circuitry 1323 and communication circuitry 1223 may be disposed on circuit board 13. Communication circuitry 1323 may be used to provide electronic device 10 with the ability to communicate with external devices. Communication circuitry 1323 may include analog and digital input-output interface circuitry, and wireless communication circuitry based on radio frequency signals and/or optical signals.

The electronic device 10 may include power management circuitry and other input-output units 1324. The input-output unit 1324 may include buttons, levers, click wheels, scroll wheels, touch pads, keypads, keyboards, cameras, light emitting diodes, and other status indicators, etc.

A user may control the operation of the electronic device 10 by inputting commands through the input-output circuit 132, and may use output data of the input-output circuit 132 to effect receipt of status information and other outputs from the electronic device 10.

The electronic device 10 may include a GPIO circuit 100. The GPIO circuit 100 may be used for detecting the operation state of its GPIO PIN, where the PIN may be used by a user freely through program control, and the PIN may be used as General Purpose Input (GPI) or General Purpose Output (GPO) or General Purpose Input and Output (GPIO) in consideration of reality.

In some embodiments, referring to fig. 3, the electronic device 10 may further include a sample resistor, the GPIO circuit being connected in series with the sample resistor, and when the electronic device is powered on, an electrical signal will be transmitted to the GPIO circuit through the sample resistor; the GPIO circuit comprises a plurality of special GPIO pins, wherein each special GPIO pin is connected with a pull-down resistor (not shown) and then connected with a ground end GND, and the resistance value of each special GPIO pin is different; when the special GPIO pin is connected with a low level, the connected pull-down resistor is connected into the GPIO circuit in parallel; when the special GPIO pin is connected with a high level, the pull-down resistor connected with the special GPIO pin is not connected with the GPIO circuit.

Specifically, a special resistor (i.e. a pull-down resistor) is configured for each special GPIO, when the special GPIO is set, the special resistor is connected into the circuit in parallel, and when the special GPIO is set, one special resistor is not connected into the circuit; in addition, the resistance values of the special resistors of each special GPIO are different, and the parallel calculation results of the special resistor of each special GPIO and the parallel calculation results of the special resistors are different. That is, N mutually unequal dedicated resistors configured by N dedicated GPIOs are set as R1, R2, R3, … …, RN-1 and RN; the following values are required to be different from each other.

Referring to fig. 4, fig. 4 is a flowchart of a GPIO status query method according to an embodiment of the present application. The GPIO state query method specifically comprises the following steps:

s201, acquiring a first input voltage of a sample resistor and a second input voltage of a GPIO circuit.

With continued reference to fig. 3, in some embodiments, the processor 131 may be electrically connected to the signal input of the GPIO circuit through its peripheral GPIO pin. When the second input voltage of the GPIO circuit is obtained, the voltage at the peripheral GPIO pin may be obtained as the second input voltage of the GPIO circuit.

S202, determining the total resistance value of a pull-down resistor connected to the GPIO circuit according to the first input voltage, the second input voltage and the resistance value of the sample resistor.

In some embodiments, the step of determining the total resistance value of the pull-down resistor connected to the GPIO circuit according to the first input voltage, the second input voltage and the resistance value of the sample resistor may specifically include:

calculating a ratio between a second input voltage and the voltage difference;

S203, determining the current working state of each special GPIO pin based on the total resistance value and the resistance value of each pull-down resistor.

In some embodiments, when determining the current operating state of each dedicated GPIO pin based on the total resistance value and the resistance value of each pull-down resistor, the method specifically may include the following steps:

In this embodiment, in order to reduce the power consumption of the state query, a condition may be set to detect the GPIO state. That is, in some embodiments, after determining the current operating state of each dedicated GPIO pin based on the total resistance value and the resistance value of each pull-down resistor, the following procedure may be further included:

As can be seen from the above, in the GPIO state query method provided in this embodiment, when the GPIO state is queried, the total resistance value of the pull-down resistor connected to the GPIO circuit can be determined according to the first input voltage of the sample resistor, the second input voltage of the GPIO circuit, and the resistance value of the sample resistor, and the current working state of each dedicated GPIO pin can be determined based on the total resistance value and the resistance values of the pull-down resistors. The working state of the GPIO pin can be effectively detected, and the utilization rate of the GPIO interface in the electronic equipment is improved.

The method for querying the state in the scheme will be further described below by taking the electronic device as an example of a mobile terminal. As shown in fig. 5, another schematic structural diagram of the electronic device includes: GPIO circuit, central processing unit, the GPIO pin of central processing unit is connected to this GPIO circuit.

The circuit is provided with three special GPIOs, and the special resistances connected to the three special GPIOs are respectively as follows: the other ends of the dedicated resistor R1, the dedicated resistor R2 and the dedicated resistor R3 are connected to the ground GND. Therefore, based on the above specific resistance values, it is determined whether three specific GPIOs corresponding to each resistance value of the circuit are set to zero or not, and the following table 1 is referred to as the resistance value Rsch accessed in the GPIO circuit when each specific resistance is in different operation states:

TABLE 1

Resistance value Rsch	Three dedicated GPIO states
		R1 is 2kohm	Setting the special GPIO1 to zero, setting the special GPIO2 to one, setting the special GPIO3 to one
R2 is 3kohm	Setting one for special GPIO1, setting zero for special GPIO2, setting one for special GPIO3
		R3 is 5kohm	Setting one for special GPIO1, one for special GPIO2 and zero for special GPIO3
R1// R2 is 1.2kohm	Setting the special GPIO1 to zero, setting the special GPIO2 to zero, setting the special GPIO3 to one
		R ₁ //R ₃ I.e. 1.429k ohm	Setting the special GPIO1 to zero, setting the special GPIO2 to one, setting the special GPIO3 to zero
R ₂ //R ₃ I.e. 1.875k ohm	Setting one special GPIO1, setting zero special GPIO2 and setting zero special GPIO3
		R ₁ //R ₂ //R ₃ I.e. 0.968k ohm	Setting zero for special GPIO1, setting zero for special GPIO2 and setting zero for special GPIO3
Infinity of infinity	Special GPIO1 and special GPIO2 and special GPIO3 respectively

In view of the convenience of detection in actual detection, the present embodiment adopts the voltage Vgpio on the detection GPIO pin instead of detecting the resistance value Rsch of the circuit, and the conversion relationship thereof is as follows:

Vgpio＝Rsch*VDD/(R0+Rsch)；

that is, the state of whether the specific GPIOs corresponding to various Vgpio voltage values are set to zero is stored in the central processing unit 200, and the central processing unit can know whether the specific GPIOs in the circuit are set to zero only according to the voltage on the GPIOs pins.

The central processing unit, as shown in fig. 6, includes: the device comprises a comparator, a voltage acquisition module, a GPIO state acquisition module, a special GPIO table and an interrupt setting module.

A comparator including three input pins INH, INM, INL, an output pin OUT which outputs an interrupt signal when the voltage on the INM pin is equal to or greater than the voltage on the INH pin or equal to or less than the voltage on the INL pin;

the voltage acquisition module is used for acquiring the voltage Vgpio on the GPIO pin;

the GPIO state acquisition module is used for acquiring the state of whether each special GPIO in the circuit is set to zero; the voltage Vgpio on the GPIO pin obtained by the voltage obtaining module and the special GPIO table obtain the state of whether each special GPIO in the circuit is set to zero or not;

a dedicated GPIO table storing a state of whether each dedicated GPIO in the circuit corresponding to each voltage on the GPIO pin is set to zero;

the interrupt setting module is used for setting the voltages on the input pins INH and INL of the comparator; specifically, after the voltage acquisition module obtains the voltage Vgpio on the GPIO pin, the interrupt setting module searches two voltage values V1 and V2 which are unequal to the Vgpio and closest to the Vgpio in the special GPIO table according to the Vgpio; the voltage of INH on the comparator input pin is set to the larger of V1, V2, and the voltage of INL on the comparator input pin is set to the smaller of V1, V2.

Based on the above, taking the mobile terminal as an example, the GPIO status query method includes the following steps:

(11) Detecting that the mobile terminal is started;

(12) The voltage acquisition module acquires a voltage value Vgpio on the GPIO, and the GPIO state acquisition module acquires the state of whether each special GPIO in the circuit is set to zero through the voltage Vgpio on the GPIO pin and the special GPIO table acquired by the voltage acquisition module;

(13) The interrupt setting module searches two voltage values V1 and V2 which are unequal to the Vgpio and closest to the Vgpio in a special GPIO table according to the Vgpio; the voltage of INH on the comparator input pin is set to the larger of V1, V2, and the voltage of INL on the comparator input pin is set to the smaller of V1, V2.

(14) When the comparator outputs an interrupt signal, step (12) will be performed.

Therefore, the working state of the GPIO pin can be effectively detected by the method, and the utilization rate of the GPIO interface in the electronic equipment is improved.

The embodiment of the application also provides a GPIO state query device which can be particularly integrated in electronic equipment with input and output functions such as a smart phone and a tablet personal computer. The electronic equipment comprises a GPIO circuit and a sample resistor, wherein the GPIO circuit is connected with the sample resistor in series, and when the electronic equipment is electrified, an electric signal is transmitted to the GPIO circuit after passing through the sample resistor; the GPIO circuit comprises a plurality of special GPIO pins, each special GPIO pin is connected with a pull-down resistor, and the resistance value of each special GPIO pin is different. When the special GPIO pin is connected with a low level, the connected pull-down resistor is connected with the GPIO circuit in parallel; when the special GPIO pin is connected with a high level, the connected pull-down resistor is not connected into the GPIO circuit. Referring to fig. 7, the GPIO status query device 300 may include a first acquisition unit 301, an information determination unit 302, and a status determination unit 303. The following are provided:

a first acquiring unit 301, configured to acquire a first input voltage of the sample resistor and a second input voltage of the GPIO circuit;

an information determining unit 302, configured to determine a total resistance value of a pull-down resistor connected to the GPIO circuit according to the first input voltage, the second input voltage, and the resistance value of the sample resistor;

the state determining unit 303 is configured to determine a current operation state of each dedicated GPIO pin based on the total resistance value and the resistance value of each pull-down resistor.

In some embodiments, the information determination unit 302 may be configured to:

calculating a ratio between a second input voltage and the voltage difference;

In some embodiments, the state determination unit 303 may be configured to:

Referring to fig. 8, in some embodiments, the GPIO status query device 300 may further comprise:

a second obtaining unit 304, configured to obtain an upper limit voltage value and a lower limit voltage value corresponding to the second input voltage after determining the current working state of each dedicated GPIO pin based on the total resistance value and the resistance value of each pull-down resistor;

the processing unit 305 is configured to, when the second input voltage is detected to exceed the upper limit voltage value or be lower than the lower limit voltage value, continue to perform an operation of determining an operation state of each dedicated GPIO pin, and update the upper limit voltage value and/or the current lower limit voltage value based on the voltage value of the current second input voltage.

The embodiment of the present application further provides a storage medium storing a computer program, where the computer program when executed on a computer causes the computer to execute the GPIO status query method in any one of the embodiments above. For example: acquiring a first input voltage of a sample resistor and a second input voltage of a GPIO circuit; determining the total resistance value of a pull-down resistor connected to the GPIO circuit according to the first input voltage, the second input voltage and the resistance value of the sample resistor; and determining the current working state of each special GPIO pin based on the total resistance value and the resistance value of each pull-down resistor.

In the embodiment of the present application, the storage medium may be a magnetic disk, an optical disk, a Read Only Memory (ROM), a random access Memory (Random Access Memory, RAM), or the like.

In the foregoing embodiments, the descriptions of the embodiments are emphasized, and for parts of one embodiment that are not described in detail, reference may be made to related descriptions of other embodiments.

The method, the device and the storage medium for querying the GPIO state provided by the embodiment of the application are described in detail above. Specific examples are set forth herein to illustrate the principles and embodiments of the present application, with the description of the examples given above only to assist in understanding the present application. Meanwhile, those skilled in the art will have variations in the specific embodiments and application scope in light of the ideas of the present application, and the present description should not be construed as limiting the present application in view of the above.

Claims

1. The GPIO state query method is applied to electronic equipment and is characterized in that the electronic equipment comprises a GPIO circuit and a sample resistor, wherein the GPIO circuit is connected with the sample resistor in series, and when the electronic equipment is electrified, an electric signal is transmitted to the GPIO circuit after passing through the sample resistor; the GPIO circuit comprises a plurality of special GPIO pins, wherein each special GPIO pin is connected with a pull-down resistor, and the resistance value of each special GPIO pin is different; when the special GPIO pin is connected with a low level, the connected pull-down resistor is connected into the GPIO circuit in parallel; when the special GPIO pin is connected to a high level, the connected pull-down resistor is not connected to the GPIO circuit; the method comprises the following steps:

determining the current working state of each special GPIO pin based on the total resistance value and the resistance value of each pull-down resistor;

2. The GPIO state query method of claim 1, wherein determining the total resistance value of the pull-down resistor connected to the GPIO circuit based on the first input voltage, the second input voltage, and the resistance value of the sample resistor comprises:

calculating a ratio between a second input voltage and the voltage difference;

3. The GPIO status query method of claim 1, wherein determining the current operation status of each dedicated GPIO pin based on the total resistance value and the resistance values of the pull-down resistors comprises:

4. The GPIO state query method of claim 1, wherein the electronic device further comprises a processor electrically connected to the signal input of the GPIO circuit through its peripheral GPIO pin;

acquiring a second input voltage of the GPIO circuit, comprising:

5. The GPIO state inquiry device is applied to electronic equipment and is characterized by comprising a GPIO circuit and a sample resistor, wherein the GPIO circuit is connected with the sample resistor in series, and when the electronic equipment is electrified, an electric signal is transmitted to the GPIO circuit after passing through the sample resistor; the GPIO circuit comprises a plurality of special GPIO pins, wherein each special GPIO pin is connected with a pull-down resistor, and the resistance value of each special GPIO pin is different; when the special GPIO pin is connected with a low level, the connected pull-down resistor is connected into the GPIO circuit in parallel; when the special GPIO pin is connected to a high level, the connected pull-down resistor is not connected to the GPIO circuit; the device comprises:

the state determining unit is used for determining the current working state of each special GPIO pin based on the total resistance value and the resistance value of each pull-down resistor;

6. The GPIO status query device of claim 5, wherein the information determining unit is configured to:

calculating a ratio between a second input voltage and the voltage difference;

7. The GPIO status query device of claim 5, wherein the status determination unit is configured to:

8. A computer readable storage medium having stored thereon a computer program, wherein the program is executed by a controller to implement the steps of the GPIO status query method of any one of claims 1-4.