CN110413228B - Mapping table management method and system, electronic equipment and storage medium - Google Patents
Mapping table management method and system, electronic equipment and storage medium Download PDFInfo
- Publication number
- CN110413228B CN110413228B CN201910615861.3A CN201910615861A CN110413228B CN 110413228 B CN110413228 B CN 110413228B CN 201910615861 A CN201910615861 A CN 201910615861A CN 110413228 B CN110413228 B CN 110413228B
- Authority
- CN
- China
- Prior art keywords
- mapping table
- frequency
- target tree
- access frequency
- management method
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0877—Cache access modes
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/061—Improving I/O performance
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0629—Configuration or reconfiguration of storage systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Human Computer Interaction (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Abstract
The application discloses a mapping table management method, a mapping table management system, an electronic device and a computer readable storage medium, wherein the method comprises the following steps: judging whether the SSD system is in a random IO state or not; if yes, caching the high-frequency mapping table to a caching space; the high-frequency mapping table is a mapping table with access frequency meeting a first preset condition. According to the mapping table management method, the high-frequency mapping table is cached to the storage space in the random IO state, a part of the mapping table is cached in the SSD system by using a cache space with a small capacity, and the mapping tables cached in the cache space are determined by identifying the high-frequency mapping table, so that the table item hit rate of the random IO can be improved, and the IO performance is further improved.
Description
Technical Field
The present application relates to the field of computer technologies, and in particular, to a mapping table management method, a mapping table management system, an electronic device, and a computer-readable storage medium.
Background
In current SSD (Solid State Drive, chinese full name) systems, the mapping relationship between host address and physical address is recorded by mapping table. In the IO (Input/Output ) process, if the mapping table of the data requested by the host is just cached in the RAM of the SSD, that is, the table entry hits, the SSD can immediately locate the position where the data is stored in the NAND Flash, so as to take out the data and return the data to the host. However, if the table entry is not hit, the SSD needs to read the table entry from the NAND Flash, and then read the data from the NAND Flash through the table entry. For Random IO, the mapping table cached in the RAM (Chinese full name: random Access Memory, english full name: random Access Memory) and the table entry stored in the NAND Flash have to be frequently swapped in and out, which greatly affects the performance of IO.
In order to improve the table entry hit, a DRAM (Dynamic Random Access Memory, english) for caching the mapping table is added in the SSD (solid state drive), and because the cost of the large-capacity DRAM is high, only part of the mapping table is cached in the DRAM in order to balance the performance and the cost, so that the cost of the SSD can be controlled while the performance is improved. For the IO with continuous addresses (i.e. sequential IO), the mapping table with a high probability of being accessed in the future can be cached in the DRAM according to the continuity of the addresses, so as to improve the performance of the IO. However, for IO with discontinuous addresses (i.e. random IO), table entry pre-reading cannot be performed because mapping tables that may be accessed in the future cannot be predicted.
Therefore, how to improve the table entry hit rate of random IO in DRAM, and further improve IO performance is a technical problem that needs to be solved by those skilled in the art.
Disclosure of Invention
The application aims to provide a mapping table management method, a mapping table management system, an electronic device and a computer readable storage medium, which improve the table entry hit rate of random IO in a DRAM (dynamic random access memory), and further improve the IO performance.
In order to achieve the above object, the present application provides a mapping table management method, including:
judging whether the SSD system is in a random IO state or not;
if yes, caching the high-frequency mapping table to a caching space; the high-frequency mapping table is a mapping table with access frequency meeting a first preset condition.
Wherein, the cache high-frequency mapping table to the cache space includes:
selecting the high-frequency mapping table from a target tree according to a preset standard, and caching the high-frequency mapping table to a cache space; the target tree comprises a hot mapping table, the hot mapping table is a mapping table with access frequency meeting a second preset condition, and the target tree comprises an AVL tree.
Wherein, the selecting the high-frequency mapping table in the target tree according to the preset standard comprises:
and selecting a mapping table with the top n% of the access frequency in the target tree as the high-frequency mapping table.
Wherein, still include:
updating the target tree when it is detected that the SSD system enters a low load state.
Wherein the updating the target tree comprises:
calculating the access frequency of each mapping table according to the historical access record of each mapping table in the SSD system;
and updating the target tree according to the mapping table with the access frequency meeting the second preset condition.
Wherein, the calculating the access frequency of each mapping table according to the historical access record of each mapping table includes:
and calculating the access frequency of each mapping table according to the time point of the last random IO access of each mapping table and the total number of accessed times of the mapping tables.
Wherein the updating the target tree according to the mapping table in which the access frequency satisfies the preset condition includes:
determining a mapping table with the access frequency outside the target tree larger than a preset value as a first mapping table, and determining a mapping table with the access frequency smaller than the preset value in the target tree as a second mapping table; the quantity of the first mapping table is the same as that of the second mapping table;
replacing the second mapping table in the target tree with the first mapping table.
Wherein, still include:
if the current random IO is not in the cache space, deleting the mapping table with the lowest access frequency from the cache space, and caching the mapping table in which the current random IO is in the cache space.
To achieve the above object, the present application provides a mapping table management system, including:
the judging module is used for judging whether the SSD system is in a random IO state or not; if yes, starting a work flow of the cache module;
the cache module is used for caching the high-frequency mapping table to a cache space; the high-frequency mapping table is a mapping table with access frequency meeting a first preset condition.
To achieve the above object, the present application provides an electronic device, comprising:
a memory for storing a computer program;
a processor for implementing the steps of the mapping table management method as described above when executing the computer program.
To achieve the above object, the present application provides a computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements the steps of the mapping table management method as described above.
According to the scheme, the mapping table management method provided by the application comprises the following steps: judging whether the SSD system is in a random IO state or not; if so, caching the high-frequency mapping table to a cache space; the high-frequency mapping table is a mapping table with access frequency meeting a first preset condition.
According to the mapping table management method, the high-frequency mapping table is cached to the storage space in the random IO state, a part of the mapping table is cached in the SSD system through the cache space with small capacity, and the mapping tables cached in the cache space are determined by identifying the high-frequency mapping table, so that the table item hit rate of the random IO can be improved, and the IO performance is further improved. The application also discloses a mapping table management system, an electronic device and a computer readable storage medium, which can also realize the technical effects.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the application.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts. The accompanying drawings, which are included to provide a further understanding of the disclosure and are incorporated in and constitute a part of this specification, illustrate embodiments of the disclosure and together with the description serve to explain the disclosure without limiting the disclosure. In the drawings:
FIG. 1 is a flow diagram illustrating a mapping table management method in accordance with an exemplary embodiment;
FIG. 2 is an architecture diagram of an SSD system as provided herein;
FIG. 3 is a flow diagram illustrating another mapping table management method in accordance with an illustrative embodiment;
FIG. 4 is a flow diagram illustrating yet another mapping table management method in accordance with an illustrative embodiment;
FIG. 5 is a block diagram illustrating a mapping table management system in accordance with an exemplary embodiment;
FIG. 6 is a block diagram of an electronic device shown in accordance with an example embodiment.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In the prior art, because a high-frequency mapping table in a random IO process cannot be identified, the table entry hit rate of the random IO is low, and the IO performance is low. Therefore, in the application, the mapping table accessed by high frequency in the random IO process is recorded through the target tree, and table entry pre-reading is performed according to the target tree in the random IO process, so that the function of caching the mapping table accessed by high frequency is realized, the possibility of swapping out the table entry with high access frequency is reduced, the table entry hit rate of random IO is increased, and the IO performance is improved.
The embodiment of the application discloses a mapping table management method, which improves the table entry hit rate of random IO in a DRAM, and further improves the IO performance.
Referring to fig. 1, a flowchart of a mapping table management method according to an exemplary embodiment is shown, as shown in fig. 1, including:
s101: judging whether the SSD system is in a random IO state or not; if yes, entering S102; if yes, entering S103;
in this step, IO states of the system, including sequential IO states and random IO states, are first detected. The sequential IO is an IO with consecutive addresses, and in this state, the process proceeds to S103. The random IO is an IO with discontinuous addresses, and in this state, S102 is entered.
S102: caching the high-frequency mapping table to a cache space; the high-frequency mapping table is a mapping table with access frequency meeting a first preset condition.
In this step, a high-frequency mapping table in a random IO state is determined and loaded into a cache space in advance. The table entry in the mapping table records the mapping relationship between the host address and the storage location (i.e., physical address) of the data in the NAND. The high-frequency mapping table is a mapping table which is frequently accessed in a time period, namely the mapping table with the access frequency meeting a first preset condition. The first preset condition here may be that the access frequency is greater than the first preset value, or that the access frequency is located in the first n1% of all mapping tables. The buffer space here may be the DRAM described in the background art, although those skilled in the art may select other memories according to the actual situation.
Preferably, the step may include: selecting the high-frequency mapping table from a target tree according to a preset standard, and caching the high-frequency mapping table to a cache space; the target tree comprises a hot mapping table, and the hot mapping table is a mapping table with access frequency meeting a second preset condition.
In specific implementation, as shown in fig. 2, an IO request at a host end first passes through a cache space, and if the IO request hits in the cache space, that is, the cache space includes a mapping table hit by the IO request, a physical address in NAND Flash is determined according to the mapping table in the cache space, so as to respond to the IO request. And a decision tree model is introduced, so that the access frequency of the table entry by the random IO in a time period can be discriminated, namely the target tree comprises a hot mapping table of which the access frequency meets a second preset condition. The second preset condition here may be that the access frequency is greater than the second preset value, or may be that the access frequency is located in the top n2% of all mapping tables, which is not specifically limited herein. It is understood that the first preset value is greater than or equal to the second preset value, and n1 is less than or equal to n2, that is, the requirement for access frequency of the high frequency mapping table is higher than that of the thermal mapping table.
The mapping table accessed by high frequency in the random IO process is recorded through the target tree, and table entry pre-reading is carried out according to the target tree in the random IO process, so that the function of caching the high frequency access mapping table is realized, the possibility of swapping out table entries with high access frequency is reduced, and the table entry hit rate of random IO is increased. The target number here may be an AVL tree (chinese full name: binary search tree), but other types of tree structures may be selected, and is not limited in detail here. As for the way of recording the high-frequency mapping table in the target tree, the access frequency of the mapping table recorded from the root node to the leaf node in the tree structure may be from high to low, or the mapping table whose access frequency satisfies the preset condition may be randomly recorded in each node of the target tree, which is not specifically limited herein.
When the high-frequency mapping table is selected from the target tree, all the hot mapping tables recorded in the target tree can be selected as the high-frequency mapping tables and loaded into the cache space. When the cache space is limited, the mapping tables in the target tree in a preset proportion can be cached into the cache space, for example, pre-reading is performed according to 1/2, 1/4 and 1/8 of the target tree, that is, only one sub-tree of the target tree is selected for mapping table pre-reading. Preferably, the cache may be performed according to the access frequency of the mapping table in the target tree from high to low, and the mapping table n% before the access frequency in the target tree is selected as the high-frequency mapping table.
It will be appreciated that there is by default a step of building the target tree, i.e. building the target tree from the hot map table, before the step of selecting the high frequency map table in the target tree. The process of building the target tree and updating the target tree is similar and will be described in detail in the following embodiments. When it is detected that the SSD system enters a low load state, the target tree is updated. Specifically, the system side can be judged to enter the low load state according to the bandwidth, the average time delay and the like of the SSD system.
S103: the mapping table is cached according to the continuity of the addresses.
In the sequential IO state, a mapping table to a cache space, which is accessed according to the continuity cache large probability of the IO address, is stored.
According to the mapping table management method provided by the embodiment of the application, the high-frequency mapping table is cached to the storage space in the random IO state, part of the mapping table is cached in the SSD system by using a cache space with a smaller capacity, and the mapping tables cached in the cache space are determined by identifying the high-frequency mapping table, so that the table item hit rate of the random IO can be improved, and the IO performance is further improved.
This embodiment will describe the update process of the target tree. Specifically, the method comprises the following steps:
referring to fig. 3, a flowchart of another mapping table management method according to an exemplary embodiment is shown, as shown in fig. 3, including:
s201: calculating the access frequency of each mapping table according to the historical access record of each mapping table in the SSD system;
here, the history access record of the mapping table describes the accessed condition of the mapping table in a period of time, and the access frequency of each mapping table can be calculated according to the history access record. Specifically, the access frequency of each mapping table may be calculated according to the number of times each mapping table is accessed within the preset time, that is, a ratio of the number of times each mapping table is accessed to the time length of the preset time is used as the access frequency.
As a preferred embodiment, the access frequency of each mapping table may be calculated according to the time point of the last random IO access of each mapping table and the total number of times of accessing the mapping table. Specifically, since the high frequency mapping table is a mapping table frequently accessed within a time period, two dimensions of time and access times are considered for identifying the hot mapping table. A time weight may be assigned to the access time, and by adjusting the time weight, the effect of the access time on the access frequency value may be adjusted.
The access frequency calculation formula may specifically be:
f＝T·W+C；
wherein f is the access frequency, T is the time point of the last random IO access, W is the weight of the influence of the access time on the access frequency, and C is the total number of accesses.
When the entry hit rate of random IO of the SSD system is low, the entry hit rate can be improved by increasing W.
S202: and updating the target tree according to the mapping table with the access frequency meeting the second preset condition.
In the process of random IO, the access frequency of the mapping table is dynamically changed, and when the access frequency reaches a condition (namely a second preset condition) for adding into the target tree, the node with the lower access frequency in the target tree is deleted, and meanwhile, a new node is added into the target tree, namely the target tree is updated.
Preferably, the step may include: determining a mapping table with the access frequency outside the target tree larger than a preset value as a first mapping table, and determining a mapping table with the access frequency smaller than the preset value in the target tree as a second mapping table; the number of the first mapping table is the same as that of the second mapping table; replacing the second mapping table in the target tree with the first mapping table. It is understood that the first mapping table is a mapping table outside the target tree to be swapped into the target tree, and the second mapping table is a mapping table in the target tree to be swapped out. The preset value here can be set according to a second preset condition, if the second preset value is that the access frequency is greater than the second preset value, the preset value here is the same as the second preset value described above, and if the second preset value is that the access frequency is located at the first n2% of all mapping tables, the access frequency of the mapping table with the access frequency located at the n2% in all mapping tables is determined and set as the preset value here, so as to ensure that the number of the first mapping tables of the target tree to be swapped in is the same as the number of the second mapping tables of the target tree to be swapped out, thereby ensuring that the number of the nodes in the target tree is fixed.
It is understood that after the above process, each node in the target tree may be readjusted, and the access frequency of the mapping table recorded from the root node to the leaf node is adjusted from high to low according to the tree structure of the target tree. If the target tree is an AVL tree, the AVL tree can be rebalanced, so that the depth difference between the left sub-tree and the right sub-tree of the AVL tree is reduced, the searching speed is increased, and the speed of selecting a high-frequency mapping table in the AVL tree is increased.
In this embodiment, the access frequency is calculated according to a historical access record of the mapping table, the historical access record describes an accessed condition of the mapping table in a period of time, and the access frequency calculated according to the historical access record may represent, to some extent, a probability that the mapping table will be accessed in the future. Therefore, the target tree is updated, so that the target tree accurately contains the hot mapping table in the SSD system in real time.
The embodiment of the application discloses a mapping table management method, and compared with the first embodiment, the embodiment further describes and optimizes the technical scheme. Specifically, the method comprises the following steps:
referring to fig. 4, a flowchart of another mapping table management method according to an exemplary embodiment is shown, as shown in fig. 4, including:
s301: judging whether the SSD system is in a random IO state or not; if yes, entering S302; if yes, entering S304;
s302: caching the high-frequency mapping table to a cache space; the high-frequency mapping table is a mapping table with access frequency meeting a first preset condition;
s303: and if the current random IO is not hit in the cache space, deleting the mapping table with the lowest access frequency from the cache space, and caching the mapping table hit by the current random IO into the cache space.
In specific implementation, if the current random IO does not hit the mapping table in the cache space, the mapping table with the lowest access frequency may be selected and swapped out from the cache space, so that the mapping table with the higher access frequency is ensured to reside in the cache space, and the table entry hit rate in the random IO process is increased. Here, the access frequency may be an access frequency calculated when the target tree was updated last time so as not to occupy excessive resources of the system. Of course, in order to make the access frequency more accurate, the current access frequency of each mapping table in the cache space may also be recalculated, and those skilled in the art may flexibly select the access frequency according to actual situations.
S304: the mapping table is cached according to the continuity of the addresses.
In this embodiment, when the current random IO misses the cache space, a method for updating the mapping table loaded in the cache space is provided, that is, the mapping table with the lowest access frequency is deleted, and the mapping table hit by the current random IO is loaded into the cache space. The mapping table resident cache space with high access frequency can be ensured, and the table item hit rate in the random IO process is improved.
In the following, a mapping table management system provided in an embodiment of the present application is introduced, and a mapping table management system described below and a mapping table management method described above may be referred to each other.
Referring to fig. 5, a block diagram of a mapping table management system is shown according to an exemplary embodiment, as shown in fig. 5, including:
a judging module 501, configured to judge whether the SSD system is in a random IO state; if yes, starting the working process of the cache module;
the cache module 502 is configured to cache the high-frequency mapping table to a cache space; the high-frequency mapping table is a mapping table with access frequency meeting a first preset condition.
According to the mapping table management system, the high-frequency mapping table is cached to the storage space in the random IO state, a part of the mapping table is cached in the SSD system through the cache space with small capacity, and the mapping tables cached in the cache space are determined by identifying the high-frequency mapping table, so that the table item hit rate of random IO can be improved, and the IO performance is further improved.
On the basis of the foregoing embodiment, as a preferred implementation manner, the cache module 502 is specifically a module that selects the high-frequency mapping table from the target tree according to a preset standard and caches the high-frequency mapping table to a cache space; the target tree comprises a hot mapping table, the hot mapping table is a mapping table with access frequency meeting a second preset condition, and the target tree comprises an AVL tree.
On the basis of the foregoing embodiment, as a preferred implementation manner, the cache module 502 includes:
the selecting unit is used for selecting a mapping table which is n% of the top access frequency in the target tree as the high-frequency mapping table;
and the cache unit is used for caching the high-frequency mapping table to a cache space.
On the basis of the above embodiment, as a preferred implementation, the method further includes:
and the updating module is used for updating the target tree when the SSD system is detected to enter a low-load state.
On the basis of the foregoing embodiment, as a preferred implementation, the update module includes:
the calculating unit is used for calculating the access frequency of each mapping table according to the historical access record of each mapping table in the SSD system;
and the updating unit is used for updating the target tree according to the mapping table with the access frequency meeting the second preset condition.
On the basis of the foregoing embodiment, as a preferred implementation manner, the calculating unit is specifically a unit that calculates the access frequency of each mapping table according to a time point of a last random IO access of each mapping table and the total number of times of accesses to the mapping table.
On the basis of the foregoing embodiment, as a preferred implementation, the updating unit includes:
a determining subunit, configured to determine, as a first mapping table, a mapping table outside the target tree where the access frequency is greater than a preset value, and determine, as a second mapping table, a mapping table in the target tree where the access frequency is less than the preset value; the quantity of the first mapping table is the same as that of the second mapping table;
a replacing subunit, configured to replace the second mapping table in the target tree with the first mapping table.
On the basis of the above embodiment, as a preferred implementation, the method further includes:
and the cache space updating module is used for deleting the mapping table with the lowest access frequency from the cache space and caching the mapping table with the current random IO hit into the cache space if the current random IO is not hit into the cache space.
With regard to the system in the above embodiment, the specific manner in which each module performs the operation has been described in detail in the embodiment related to the method, and will not be elaborated here.
The present application further provides an electronic device, and referring to fig. 6, a structure diagram of an electronic device 600 provided in an embodiment of the present application may include a processor 11 and a memory 12, as shown in fig. 6. The electronic device 600 may further include one or more of a multimedia component 13, an input/output (I/O) interface 14, and a communication component 15.
The processor 11 is configured to control the overall operation of the electronic device 600, so as to complete all or part of the steps in the mapping table management method. The memory 12 is used to store various types of data to support operation at the electronic device 600, such as instructions for any application or method operating on the electronic device 600 and application-related data, such as contact data, transmitted and received messages, pictures, audio, video, and so forth. The Memory 12 may be implemented by any type of volatile or non-volatile Memory device or combination thereof, such as Static Random Access Memory (SRAM), electrically Erasable Programmable Read-Only Memory (EEPROM), erasable Programmable Read-Only Memory (EPROM), programmable Read-Only Memory (PROM), read-Only Memory (ROM), magnetic Memory, flash Memory, magnetic disk or optical disk. The multimedia component 13 may include a screen and an audio component. Wherein the screen may be, for example, a touch screen and the audio component is used for outputting and/or inputting audio signals. For example, the audio component may include a microphone for receiving external audio signals. The received audio signal may further be stored in the memory 12 or transmitted via the communication component 15. The audio assembly also includes at least one speaker for outputting audio signals. The I/O interface 14 provides an interface between the processor 11 and other interface modules, such as a keyboard, mouse, buttons, etc. These buttons may be virtual buttons or physical buttons. The communication module 15 is used for wired or wireless communication between the electronic device 600 and other devices. Wireless Communication, such as Wi-Fi, bluetooth, near Field Communication (NFC), 2G, 3G or 4G, or a combination of one or more of them, so that the corresponding Communication component 15 may include: wi-Fi module, bluetooth module, NFC module.
In an exemplary embodiment, the electronic Device 600 may be implemented by one or more Application Specific Integrated Circuits (ASICs), digital Signal Processors (DSPs), digital Signal Processing Devices (DSPDs), programmable Logic Devices (PLDs), field Programmable Gate Arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components for performing the mapping table management method described above.
In another exemplary embodiment, a computer readable storage medium including program instructions which, when executed by a processor, implement the steps of the mapping table management method described above is also provided. For example, the computer readable storage medium may be the memory 12 described above comprising program instructions executable by the processor 11 of the electronic device 600 to perform the mapping table management method described above.
The embodiments are described in a progressive mode in the specification, the emphasis of each embodiment is on the difference from the other embodiments, and the same and similar parts among the embodiments can be referred to each other. For the system disclosed by the embodiment, the description is relatively simple because the system corresponds to the method disclosed by the embodiment, and the relevant points can be referred to the description of the method part. It should be noted that, for those skilled in the art, it is possible to make several improvements and modifications to the present application without departing from the principle of the present application, and such improvements and modifications also fall within the scope of the claims of the present application.
It is further noted that, in the present specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrases "comprising a," "8230," "8230," or "comprising" does not exclude the presence of additional like elements in a process, method, article, or apparatus that comprises the element.
Claims (10)
1. A mapping table management method, comprising:
judging whether the SSD system is in a random IO state or not;
if so, caching the high-frequency mapping table to a cache space; the high-frequency mapping table is a mapping table with access frequency meeting a first preset condition;
wherein, the cache high frequency mapping table to the cache space includes:
selecting the high-frequency mapping table from a target tree according to a preset standard, and caching the high-frequency mapping table to a cache space; the target tree comprises a hot mapping table, the hot mapping table is a mapping table with access frequency meeting a second preset condition, and the target tree comprises an AVL tree.
2. The mapping table management method according to claim 1, wherein the selecting the high frequency mapping table in the target tree according to a preset standard comprises:
and selecting a mapping table n% before the access frequency in the target tree as the high-frequency mapping table.
3. The mapping table management method according to claim 1, further comprising:
updating the target tree when it is detected that the SSD system enters a low load state.
4. The mapping table management method according to claim 3, wherein the updating the target tree includes:
calculating the access frequency of each mapping table according to the historical access record of each mapping table in the SSD system;
and updating the target tree according to the mapping table with the access frequency meeting the second preset condition.
5. The mapping table management method according to claim 4, wherein the calculating an access frequency of each mapping table according to a historical access record of each mapping table includes:
and calculating the access frequency of each mapping table according to the time point of the last random IO access of each mapping table and the total number of accessed times of the mapping tables.
6. The mapping table management method according to claim 4, wherein the updating the target tree according to the mapping table whose access frequency satisfies the preset condition includes:
determining a mapping table with the access frequency outside the target tree larger than a preset value as a first mapping table, and determining a mapping table with the access frequency smaller than the preset value in the target tree as a second mapping table; the number of the first mapping table is the same as that of the second mapping table;
replacing the second mapping table in the target tree with the first mapping table.
7. The mapping table management method according to any one of claims 1 to 6, further comprising:
if the current random IO is not in the cache space, deleting the mapping table with the lowest access frequency from the cache space, and caching the mapping table in which the current random IO is in the cache space.
8. A mapping table management system, comprising:
the judging module is used for judging whether the SSD system is in a random IO state or not; if yes, starting a work flow of the cache module;
the cache module is used for caching the high-frequency mapping table to a cache space; the high-frequency mapping table is a mapping table with access frequency meeting a first preset condition;
the cache module is specifically a module for selecting the high-frequency mapping table from the target tree according to a preset standard and caching the high-frequency mapping table to a cache space; the target tree comprises a hot mapping table, the hot mapping table is a mapping table with access frequency meeting a second preset condition, and the target tree comprises an AVL tree.
9. An electronic device, comprising:
a memory for storing a computer program;
a processor for implementing the steps of the mapping table management method according to any of claims 1 to 7 when executing the computer program.
10. A computer-readable storage medium, characterized in that a computer program is stored thereon, which computer program, when being executed by a processor, carries out the steps of the mapping table management method according to any one of claims 1 to 7.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910615861.3A CN110413228B (en) | 2019-07-09 | 2019-07-09 | Mapping table management method and system, electronic equipment and storage medium |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910615861.3A CN110413228B (en) | 2019-07-09 | 2019-07-09 | Mapping table management method and system, electronic equipment and storage medium |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN110413228A CN110413228A (en) | 2019-11-05 |
| CN110413228B true CN110413228B (en) | 2022-10-14 |
Family
ID=68360777
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910615861.3A Active CN110413228B (en) | 2019-07-09 | 2019-07-09 | Mapping table management method and system, electronic equipment and storage medium |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110413228B (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111984552A (en) * | 2020-08-21 | 2020-11-24 | 苏州浪潮智能科技有限公司 | Cache management method and device, electronic equipment and storage medium |
| CN112882663B (en) * | 2021-03-25 | 2022-10-14 | 湖南国科微电子股份有限公司 | Random writing method, electronic equipment and storage medium |
| CN114707478B (en) * | 2022-06-06 | 2022-09-02 | 飞腾信息技术有限公司 | Mapping table generation method, device, equipment and storage medium |
Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103186350A (en) * | 2011-12-31 | 2013-07-03 | 北京快网科技有限公司 | Hybrid storage system and hot spot data block migration method |
| US8510499B1 (en) * | 2010-08-30 | 2013-08-13 | Symantec Corporation | Solid state drive caching using memory structures to determine a storage space replacement candidate |
| CN103777905A (en) * | 2014-02-14 | 2014-05-07 | 华中科技大学 | Software-defined fusion storage method for solid-state disc |
| CN106569959A (en) * | 2016-10-28 | 2017-04-19 | 郑州云海信息技术有限公司 | Cache replacing method and system based on SSD |
| CN107003942A (en) * | 2014-10-27 | 2017-08-01 | 桑迪士克科技有限责任公司 | To for strengthening the performance of storage device and the processing of persistent unmapped order |
| CN108021511A (en) * | 2017-11-22 | 2018-05-11 | 深圳忆联信息系统有限公司 | A kind of method and SSD of SSD performance boosts |
| CN109522243A (en) * | 2018-10-22 | 2019-03-26 | 郑州云海信息技术有限公司 | Metadata cache management method, device and storage medium in a kind of full flash memory storage |
| CN109739780A (en) * | 2018-11-20 | 2019-05-10 | 北京航空航天大学 | Dynamic secondary based on the mapping of page grade caches flash translation layer (FTL) address mapping method |
| CN109783019A (en) * | 2018-12-28 | 2019-05-21 | 上海威固信息技术股份有限公司 | A kind of data intelligence memory management method and device |
| CN109815232A (en) * | 2018-12-27 | 2019-05-28 | 厦门市美亚柏科信息股份有限公司 | A kind of method and system of retrieval, the data processing of the data rank using binary search tree |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102580820B1 (en) * | 2016-03-10 | 2023-09-20 | 에스케이하이닉스 주식회사 | Data storage device and operating method thereof |
| US10108342B2 (en) * | 2016-06-22 | 2018-10-23 | Storart Technology Co. Ltd. | Method for reducing use of DRAM in SSD and the SSD using the same |
-
2019
- 2019-07-09 CN CN201910615861.3A patent/CN110413228B/en active Active
Patent Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8510499B1 (en) * | 2010-08-30 | 2013-08-13 | Symantec Corporation | Solid state drive caching using memory structures to determine a storage space replacement candidate |
| CN103186350A (en) * | 2011-12-31 | 2013-07-03 | 北京快网科技有限公司 | Hybrid storage system and hot spot data block migration method |
| CN103777905A (en) * | 2014-02-14 | 2014-05-07 | 华中科技大学 | Software-defined fusion storage method for solid-state disc |
| CN107003942A (en) * | 2014-10-27 | 2017-08-01 | 桑迪士克科技有限责任公司 | To for strengthening the performance of storage device and the processing of persistent unmapped order |
| CN106569959A (en) * | 2016-10-28 | 2017-04-19 | 郑州云海信息技术有限公司 | Cache replacing method and system based on SSD |
| CN108021511A (en) * | 2017-11-22 | 2018-05-11 | 深圳忆联信息系统有限公司 | A kind of method and SSD of SSD performance boosts |
| CN109522243A (en) * | 2018-10-22 | 2019-03-26 | 郑州云海信息技术有限公司 | Metadata cache management method, device and storage medium in a kind of full flash memory storage |
| CN109739780A (en) * | 2018-11-20 | 2019-05-10 | 北京航空航天大学 | Dynamic secondary based on the mapping of page grade caches flash translation layer (FTL) address mapping method |
| CN109815232A (en) * | 2018-12-27 | 2019-05-28 | 厦门市美亚柏科信息股份有限公司 | A kind of method and system of retrieval, the data processing of the data rank using binary search tree |
| CN109783019A (en) * | 2018-12-28 | 2019-05-21 | 上海威固信息技术股份有限公司 | A kind of data intelligence memory management method and device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN110413228A (en) | 2019-11-05 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US10380035B2 (en) | Using an access increment number to control a duration during which tracks remain in cache | |
| CN110413228B (en) | Mapping table management method and system, electronic equipment and storage medium | |
| KR102043886B1 (en) | Profiling Cache Substitution | |
| US9817765B2 (en) | Dynamic hierarchical memory cache awareness within a storage system | |
| US9645922B2 (en) | Garbage collection in SSD drives | |
| US20170300426A1 (en) | Read cache management method and apparatus based on solid state drive | |
| CN110502452B (en) | Method and device for accessing mixed cache in electronic equipment | |
| CN110737399B (en) | Method, apparatus and computer program product for managing a storage system | |
| CN107430551B (en) | Data caching method, storage control device and storage equipment | |
| US20240061789A1 (en) | Methods, apparatuses, and electronic devices for evicting memory block in cache | |
| US9965397B2 (en) | Fast read in write-back cached memory | |
| CN110018998A (en) | A kind of file management method, system and electronic equipment and storage medium | |
| CN111984552A (en) | Cache management method and device, electronic equipment and storage medium | |
| CN107025182B (en) | Non-volatile memory accelerator and access acceleration method | |
| US11593268B2 (en) | Method, electronic device and computer program product for managing cache | |
| JP2015001909A (en) | Information processor, control circuit, control program, and control method | |
| CN109002400B (en) | Content-aware computer cache management system and method | |
| CN112631504A (en) | Method and device for realizing local cache by using off-heap memory | |
| CN115934002B (en) | Solid state disk access method, solid state disk, storage system and cloud server | |
| US20190114082A1 (en) | Coordination Of Compaction In A Distributed Storage System | |
| CN113435601A (en) | Data prefetching method and device and storage device | |
| KR102033462B1 (en) | Method for garbage collection of flash memory and storage device using the same | |
| WO2021008301A1 (en) | Method and apparatus for accessing hybrid cache in electronic device | |
| KR20170000516A (en) | Method of performing garbage collection in DRAM-Flash hybrid memory using object's character through dynamic profiler and system thereof | |
| CN111309641B (en) | Method, system, device and medium for pre-reading in storage system |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |