CN103777905A - Software-defined fusion storage method for solid-state disc - Google Patents
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Abstract
The invention discloses a software-defined fusion storage method for a solid-state disc. An HFSL (host fusion storage layer) is added on a host, physical block characteristics of the solid-state disc and statistical information during usage are obtained directly, complex IO (input/output) scheduling and management of the solid-state disc are conducted in combination with upper-layer data access characteristics, and an address mapping method with variable allocation granularities is used for realizing persistent high performance of the solid-state disc. According to the method, performance optimization of an NAND flash and storage management fusing a PCM (phase change memory) and the NAND flash are realized on the host, and the outstanding performance of the PCM is used for making up performance defects of the NAND flash, so that the read/write performance of the solid-state disc is improved, and the service life of the solid-state disc is prolonged.
Description
Technical field
The invention belongs to computer data field of storage, the solid-state disk that is specifically related to a kind of software definition merges storage means.
Background technology
In the last few years, the solid-state disk develop rapidly based on NAND FLASH, had replaced traditional mechanical hard disk gradually.NAND FLASH chip making technology improves constantly, and from the 25nm processing procedures of 2008 10nm processing procedure till now, performance improves constantly.But the wearing and tearing number of times of NAND FLASH is limited, small letter poor performance, does not support the defects such as original place modification still to limit its performance.
The existing solid-state disk based on NAND FLASH, is all the shortcoming of utilizing the firmware program shielding NAND FLASH in solid-state disk substantially, provides the block device interface of look-alike disk for host side.Host side is regarded a black box as solid-state disk completely, directly uses regardless of its physical characteristics.Although this is the simplest, be also the method for the fastest replacement traditional mechanical hard disk, there is serious shortcoming in this.For example, will not be suitable for solid-state disk in host side for the IO dispatching algorithm of mechanical disk design, will not be suitable for solid-state disk for the file system of mechanical disk design yet; Because the read-write operation unit of NAND FLASH is the minimum 2KB of Page() unit, tradition sends in solid-state disk take disk sector size (512B) as the request of unit, cause needing merging and the distribution of extra processing request in solid-state disk, reduced storage speed; Host side cannot be obtained physical characteristics, wear condition, the use information of solid-state disk, cannot in the distribution of the management of file, address space, carry out performance optimization.In addition, because the controller of solid-state disk need carry out shortcoming shielding and performance optimization to NAND FLASH, taken the limited resource of a large amount of embedded systems, this does not calculate very much, and because not knowing that the feature of host side data makes performance boost limited.Therefore need to rethink the node store structure design of the solid-state disk based on NAND FLASH, expose more physical characteristics and use information to main frame, make main frame completely solid-state disk not regarded as to black box again, and regard a gray box as.
Fusion-io company has proposed a kind of VSL(Visual Storage Layer) layer, equally solid-state disk is regarded as to gray box, FTL(Flash Translation Layer flash translation layer (FTL)) be placed under host side driver and realize, obtain very large performance and improved.But VSL is the combination of driver and FTL, in fact the IO request that arrives driver layer has not possessed so much data attribute, in driver, can not effectively do and optimize for the physical characteristics of solid-state disk, and file system layer remains the statistical information such as physical characteristics and wear condition that cannot obtain solid-state disk, has limited the performance boost of solid-state disk.
At present except above-mentioned high performance NAND FLASH storage chip, the development of novel non-volatile memory chip is also very fast, particularly PCM(Phase Change Memory, phase transition storage), company of Micron Technology has produced the PCM storage chip of 1GB size now.PCM has a lot of advantages with respect to NAND FLASH, the most special outstanding be exactly that PCM supports the read-write operation take byte as unit, it is fast that the relative NAND FLASH of read or write speed wants, PCM does not need to wipe before writing simultaneously, and has the number of times that more can wear and tear.At present PCM is also in conceptual phase, is substantially all method with emulation substituting or mixing use with internal memory using PCM as internal memory about the research of PCM.Particularly, in solid-state disk, the buffer memory of much studying using PCM as NAND FLASH uses, but this performance advantage that can not give full play to PCM makes up the performance shortcomings of NAND FLASH.
Summary of the invention
Given this, the object of the invention is to realize in host side the storage administration that performance optimization to NAND FLASH and PCM and NAND FLASH are merged, improve the overall performance of solid-state disk; Meanwhile, utilize performance that PCM is outstanding to make up the performance shortcomings of NAND FLASH, improve solid-state disk readwrite performance and serviceable life.
The solid-state disk that the present invention proposes a kind of software definition merges storage means, wherein, merges phase transition storage (PCM) in the solid-state disk based on NAND FLASH, said method comprising the steps of:
(1) when start in, is read PCM address mapping table and FLASH address mapping table to host memory from solid-state disk PCM fixed area, in host memory, open up the buffer area of one section of solid-state disk simultaneously, when main frame has the request Q (lsn that accesses solid-state disk, size, op, data) time, first obtain Q.lsn and Q.size, whether the data that judge request Q access according to Q.lsn and Q.size are in buffer area, wherein, lsn is logical address, size is request size, op is read-write mark, data is the addresses of data in host memory, be data destination address or the source address of host side,
If hit, for read request, data are copied from buffer area to data address, for write request, data address date is copied in buffer area, proceed to step (8); If recklessly, for read request, proceed to step (2), for write request, if buffer area is full, directly the data at data address place are copied in buffer area, proceed to step (8), replace renewal operation otherwise carry out buffer area, proceed to step (3);
(2) obtain Q.lsn and the Q.size of read request, search PCM and FLASH address mapping table is carried out address translation, proceed to step (6), wherein, for the read request of access PCM, produce and write the read operation request sequence of granule size (as 512B) as unit take PCM optimum; For the read request of access FLASH, produce the read operation request sequence with FLASH physical page size;
(3) establishing the request of replacing out from buffer area is q, judges the size of q.size, if q.size<NAND PAGE is SIZE, proceeds to step (4), otherwise proceeds to step (5);
(4) according to access times and the access time of request q.lsn, judge the cold and hot property of q.lsn visit data: if dsc data distributes the less physical address of PCM wearing and tearing number of times to q.lsn; Otherwise distribute the more physical address of PCM wearing and tearing number of times to q.lsn; Produce and write the write request sequence of granule size (as 512B) as unit take PCM optimum, and proceed to step (6);
(5) according to access times and the access time of request q.lsn, judge the cold and hot property of q.lsn visit data: if dsc data distributes the less physical address of FLASH wearing and tearing number of times to q.lsn; Otherwise distribute the more physical address of FLASH wearing and tearing number of times to q.lsn; Produce the write request sequence with FLASH page size unit, and proceed to step (6);
(6) obtain the request sequence producing in (2), (4), (5), add respectively described request sequence to cycle request rear of queue in solid-state disk respective channel according to the physical address in request, in the time that timer arrives, sending to solid-state disk processing when the request on prepass;
(7) detect whether there has been interruption, if interruption detected, represent to ask to finish dealing with, proceed to step (8);
(8) returned to request Q.
The present invention also proposes a kind of main frame and merges accumulation layer (HFSL) system, and for the request of file system access solid-state disk is managed, described solid-state disk is based on NAND FLASH and merged phase transition storage (PCM), and described system comprises:
Address mapping management module maintains PCM address mapping table and NAND FLASH address mapping table in host memory, adopt the variable address mapping method of partition size the address assignment of PCM and NAND FLASH to the write request in described request;
IO dispatching management module, for described request being distributed to each physical channel of solid-state disk, described physical channel comprises multiple passages of PCM and NAND FLASH, wherein, for each physical channel of solid-state disk maintains a cycle request queue;
Buffer queue management module, manages the buffer area of the solid-state disk of opening up in host memory, in the time that the request of file system access solid-state disk arrives, judges whether the data of this request hit, if just hit, the data in buffer area is returned to file system; Otherwise, just give address mapping management resume module request, address mapping management module is carried out address translation to request and is obtained actual physical address, and then IO dispatching management module is suspended to request the cycle request queue afterbody of respective channel.
With respect to prior art, the present invention has following beneficial effect:
(1) solid-state disk is no longer transparent for main frame, and main frame can obtain physical characteristics and the data distributed intelligence of solid-state disk, does performance optimization for it;
(2) the fusion storage means of employing PCM and NAND FLASH, PCM is as NAND FLASH storer at the same level, in PCM, deposit small letter data, and the metadata information such as address mapping table, or need the dsc data etc. of fast access, frequent access, improve the little write performance of solid-state disk, also improved the toggle speed of solid-state disk simultaneously.PCM, as the higher level's buffer memory of NAND FLASH in solid-state disk, promotes solid-state disk performance simultaneously.Solid-state disk with respect to tradition using DRAM as buffer memory, the fusion storage of PCM and NAND FLASH can also guarantee the consistance of data, improves the reliability of solid-state disk;
(3) drive and realized one deck fusion storage middle layer---HFSL between file system in host side, HFSL can obtain physical characteristics and the data distributed intelligence of PCM and NAND FLASH, and merge the physical characteristics of storage for PCM and NAND FLASH, address mapping, IO scheduling strategy, garbage reclamation in HFSL, are realized, the efficient storage administration such as abrasion equilibrium, has improved the overall performance of solid-state disk;
(4) PCM and NAND FLASH merge in the solid-state disk of storage, the simple operations such as only need to complete simple reading and writing, wipe and need to not realize the operating strategy algorithms such as complicated IO scheduling in firmware, can simplify like this control and management of solid-state disk self, be convenient to solid-state disk hardware architecture speed-to-market, can be absorbed in the basic operation of controlling parallel processing PCM and NAND FLASH by pooling of resources, improve the read or write speed of solid-state disk.
Accompanying drawing explanation
Fig. 1 is the system architecture schematic diagram of the embodiment of the present invention;
Fig. 2 is the method flow schematic diagram of the embodiment of the present invention.
Embodiment
Below in conjunction with accompanying drawing, the embodiment of the present invention is further described.
In general, the present invention is mainly based on 2 points: the one, realize and merge accumulation layer---HFSL(Host Fusion Storage Layer in host side), realize solid-state disk IO scheduling flexibly and operating strategy and performance optimization, simplify solid-state disk architecture; The 2nd, in the solid-state disk based on NAND FLASH, merge PCM storage, wherein, PCM both can be used as the storer at the same level of NAND FLASH for depositing the metadata information of solid-state disk, also can be for depositing small letter data or accessing dsc data etc. frequently, PCM can also be served as higher level's buffer memory use of NAND FLASH simultaneously, promotes solid-state disk performance.
Further, the present invention is based on following principle: between host driver and file system, realize HFSL middle layer, the request of host access solid-state disk need to be through the processing of HFSL, simple operations sends to solid-state disk to convert reading and writing to, wipe etc.; The simple request such as only process reading and writing in solid-state disk inside, wipe, scheduling and management algorithm that the distribution again that does not need to carry out too much address translation, garbage reclamation, abrasion equilibrium, IO request and combination etc. are complicated.Merge the physical characteristics of storage for PCM and NANDFLASH, in HFSL, designed the address mapping and the IO dispatching algorithm that merge management.In addition, HFSL also has the complicated IO scheduling feature such as cache management basic in similar conventional solid-state dish, garbage reclamation, abrasion equilibrium.
Fig. 1 is the system architecture schematic diagram of the embodiment of the present invention.Wherein, main frame fusion accumulation layer (HFSL) comprises three modules: address mapping management module, IO dispatching management module and buffer area administration module.
The function of address mapping management module be mainly reasonably the address assignment of PCM and NAND FLASH to write request.Wherein, because read request has had the physical address of solid-state disk, thus without distribution, and write request is only known the logical address of solid-state disk, concrete physical address need to be distributed by address mapping module.PCM address mapping table and NAND FLASH address mapping table leave the fixed area in the PCM of solid-state disk in, and address mapping management module maintains address above mentioned mapping table in host memory.When start from PCM fixed area reading address mapping table to host memory, when shutdown, the address map entry of having revised in address mapping table in internal memory is write back in solid-state disk PCM fixed area.Except a part of address physical space is for depositing the metadata information (it is transparent to main frame that they merge accumulation layer in host side) of address above mentioned mapping table and access, all the other physical addresss of PCM and NAND FLASH address unified addressing.In a particular embodiment, adopt the variable address mapping method of partition size to carry out address assignment: NAND FLASH address field adopts the address mapping of coarseness, shine upon unit as address take the physical page size of NAND FLASH; PCM address field adopts take PCM optimum and writes the fine-grained address mapping of granule size as unit, shines upon unit as address take the unit (as 512B) that is less than page.
In the time carrying out address mapping, mainly consider the factor aspect three:
(1) in the time receiving the request of file system access solid-state disk, whether the size that judges request access data is less than threshold value, if be less than threshold value, this request is little write request, otherwise this request is large write request, for little write request, distribute the physical address of PCM, distribute the physical address of NAND FLASH for large write request;
(2) the wearing and tearing number of times of statistics PCM and NADN FLASH, in the time carrying out address assignment, judges the cold and hot property of data, if cold data are just assigned to the more physical block address of wearing and tearing number of times, otherwise is just assigned to the less physical block address of wearing and tearing number of times;
(3) in the time carrying out address assignment, distribute in the mode of band, continuous logical address is assigned on the different physical channels of solid-state disk.
In addition, can also in the mapping management module of address, incorporate abrasion equilibrium and garbage reclamation operation.
The major function of IO dispatching management module is each physical channel that request is distributed to solid-state disk.Physical channel comprises multiple PCM passages and multiple NAND FLASH passage.IO dispatching management module is that each physical channel of solid-state disk maintains a cycle request queue.Request, through after address mapping, is all to write the request sequence of granule size (as 512B) as unit take PCM optimum for the request of PCM, is all the request sequence take the physical page size of NAND FLASH as unit for the request of NAND FLASH.For IO dispatching management module, calculate channel number according to physical address, and request is added to corresponding PCM and NAND FLASH channel cycle queue afterbody.In IO dispatching management module, timer is set, in the time that timer arrives, the request in cycle request queue is sent to solid-state disk.When detecting that solid-state disk has had the time of interruption, will inquire about the completion status of asking in cycle request queue, if completed, just delete this request from cycle request queue.
Buffer queue management module manages for the solid-state disk buffer area that host memory is opened up.Because PCM, in a particular embodiment, can design and only write buffer area, be i.e. those data of often being write of a buffer memory than very fast with the read rate of NAND FLASH.In the time that the request of file system access solid-state disk arrives, can search balanced binary tree or other method judges that whether the data of this request hit, and return to file system if just hit the data in buffer memory according to logical address.If do not find data in buffer area, just give address mapping module processing request, address mapping module is carried out address translation to request and is obtained actual physical address, and then IO dispatching management module is suspended to request round-robin queue's afterbody of respective channel.Wherein, can adopt balanced binary tree to manage data cached.In addition, in a particular embodiment, district is different from conventional solid-state dish inner buffer, and HFSL buffer zone adopts the management of 512B granule size, rather than traditional physical page size with NAND FLASH is managed.Meanwhile, because host memory aboundresources can arrange buffer area capacity greatly as far as possible, can more writing data by buffer memory.
Fig. 2 is the method flow diagram of the embodiment of the present invention.When start, main frame merges accumulation layer (HFSL) and reads PCM address mapping table and FLASH address mapping table to host memory from solid-state disk PCM fixed area, opens up the buffer area of one section of solid-state disk simultaneously in host memory.
Suppose the request Q (lsn, size, op, data) of host access solid-state disk, lsn is logical address, and size is request size, and op is read-write mark, being for example that 0 expression is write, is that 1 expression is read, and data is that the address of data in host memory is data destination address or the source address of host side.For request Q, concrete processing procedure is as follows:
(1) in the time receiving the request Q of host access solid-state disk, first obtain Q.lsn and Q.size, whether the data that judge request Q access according to Q.lsn and Q.size are in buffer area.If hit, for read request, data are copied from buffer area to data address, for write request, data address date is copied in buffer area, proceed to step (8).If recklessly, for read request, proceed to step (2), for write request, if buffer area is full, directly the data at data address place are copied in buffer memory, proceed to step (8), replace renewal operation otherwise carry out buffer area, proceed to step (3).Wherein, can utilize and search balanced binary tree or other method judges whether the data of this request hit.
(2) obtain Q.lsn and the Q.size of read request, search PCM and FLASH address mapping table is carried out address translation.Produce and write the read operation request sequence of granule size (as 512B) as unit take PCM optimum for the read request of access PCM; Read request for access FLASH produces the read operation request sequence with FLASH physical page size, proceeds to step (6).
(3) establishing the request of replacing out from buffer area is q, judges the size of q.size, if q.size<NAND PAGE is SIZE, proceeds to step (4), otherwise proceeds to step (5).
(4), according to access times frequency and the access time recency of request q.lsn, judge the cold and hot property of q.lsn visit data.If dsc data distributes the less physical address of PCM wearing and tearing number of times to q.lsn; Otherwise distribute the more physical address of PCM wearing and tearing number of times to q.lsn.Produce and write the write request sequence of granule size (as 512B) as unit take PCM optimum, proceed to step (6).Wherein, if PCM does not have enough physical spaces, the data Replica in PCM in NANDFLASH, and revise corresponding address map entry.
(5), according to access times frequency and the access time recency of request q.lsn, judge the cold and hot property of q.lsn visit data.If dsc data distributes the less physical address of FLASH wearing and tearing number of times to q.lsn; Otherwise distribute the more physical address of FLASH wearing and tearing number of times to q.lsn.Produce the write request sequence with FLASH page size unit, proceed to step (6).
(6) obtain the request sequence producing in (2), (4), (5), add respectively the cycle request rear of queue in solid-state disk respective channel to according to the physical address in request.In the time that timer arrives, sending to solid-state disk processing when the request on prepass.
(7) detect whether there has been interruption, if interruption detected, represent to ask to finish dealing with, proceed to step (8).
(8) returned to request Q.
Finally, the address map entry of having revised in PCM address mapping table in the data in buffer area and internal memory and FLASH address mapping table is write back in the respective regions of solid-state disk when shutdown.
As can be seen here, in the method that the present invention proposes, PCM and NAND FLASH merge storage, PCM not only can be for NAND FLASH storer at the same level, deposit the small letter data of access solid-state disk and the metadata information of solid-state disk, or access frequently dsc data etc., the higher level's buffer memory that can also serve as NAND FLASH in solid-state disk uses, thereby promotes solid-state disk overall performance.Simultaneously, merge the physical characteristics of accumulation layer HFSL for PCM and NAND FLASH in host side, carry out data layout and performance optimization in conjunction with request of data feature, simplify the control and management of solid-state disk self, be convenient to solid-state disk hardware architecture speed-to-market, realize flexible, efficient, reliable memory that PCM and NAND FLASH merge.
The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, all any modifications of doing within the spirit and principles in the present invention, be equal to and replace and improvement etc., within all should being included in protection scope of the present invention.
Claims (10)
1. the solid-state disk of software definition merges a storage means, wherein, merges phase transition storage (PCM) in the solid-state disk based on NAND FLASH, said method comprising the steps of:
(1) when start in, is read PCM address mapping table and FLASH address mapping table to host memory from solid-state disk PCM fixed area, in host memory, open up the buffer area of one section of solid-state disk simultaneously, when main frame has the request Q (lsn that accesses solid-state disk, size, op, data) time, first obtain Q.lsn and Q.size, whether the data that judge request Q access according to Q.lsn and Q.size are in buffer area, wherein, lsn is logical address, size is request size, op is read-write mark, data is the addresses of data in host memory, be data destination address or the source address of host side,
If hit, for read request, data are copied from buffer area to data address, for write request, data address date is copied in buffer area, proceed to step (8); If recklessly, for read request, proceed to step (2), for write request, if buffer area is full, directly the data at data address place are copied in buffer area, proceed to step (8), replace renewal operation otherwise carry out buffer area, proceed to step (3);
(2) obtain Q.lsn and the Q.size of read request, search PCM and FLASH address mapping table is carried out address translation, proceed to step (6), wherein, for the read request of access PCM, produce and write the read operation request sequence of granule size (as 512B) as unit take PCM optimum; For the read request of access FLASH, produce the read operation request sequence with FLASH physical page size;
(3) establishing the request of replacing out from buffer area is q, judges the size of q.size, if q.size<NAND PAGE is SIZE, proceeds to step (4), otherwise proceeds to step (5);
(4) according to access times and the access time of request q.lsn, judge the cold and hot property of q.lsn visit data: if dsc data distributes the less physical address of PCM wearing and tearing number of times to q.lsn; Otherwise distribute the more physical address of PCM wearing and tearing number of times to q.lsn; Produce and write the write request sequence of granule size (as 512B) as unit take PCM optimum, and proceed to step (6);
(5) according to access times and the access time of request q.lsn, judge the cold and hot property of q.lsn visit data: if dsc data distributes the less physical address of FLASH wearing and tearing number of times to q.lsn; Otherwise distribute the more physical address of FLASH wearing and tearing number of times to q.lsn; Produce the write request sequence with FLASH page size unit, and proceed to step (6);
(6) obtain the request sequence producing in (2), (4), (5), add respectively described request sequence to cycle request rear of queue in solid-state disk respective channel according to the physical address in request, in the time that timer arrives, sending to solid-state disk processing when the request on prepass;
(7) detect whether there has been interruption, if interruption detected, represent to ask to finish dealing with, proceed to step (8);
(8) returned to request Q.
2. method according to claim 1, in step (4), if PCM does not have enough physical spaces, the data Replica in PCM in NAND FLASH, and revise corresponding address map entry.
3. according to the method described in claim 1 to 2, also comprise afterwards in step (8): when shutdown, the address map entry of having revised in PCM address mapping table in the data in buffer area and internal memory and FLASH address mapping table is write back in the respective regions of solid-state disk.
4. main frame merges accumulation layer (HFSL) system, and for the request of file system access solid-state disk is managed, described solid-state disk is based on NAND FLASH and merged phase transition storage (PCM), and described system comprises:
Address mapping management module maintains PCM address mapping table and NAND FLASH address mapping table in host memory, adopt the variable address mapping method of partition size the address assignment of PCM and NAND FLASH to the write request in described request;
IO dispatching management module, for described request being distributed to each physical channel of solid-state disk, described physical channel comprises multiple passages of PCM and NAND FLASH, wherein, for each physical channel of solid-state disk maintains a cycle request queue;
Buffer queue management module, manages the buffer area of the solid-state disk of opening up in host memory, in the time that the request of file system access solid-state disk arrives, judges whether the data of this request hit, if just hit, the data in buffer area is returned to file system; Otherwise, just give address mapping management resume module request, address mapping management module is carried out address translation to request and is obtained actual physical address, and then IO dispatching management module is suspended to request the cycle request queue afterbody of respective channel.
5. system according to claim 4, wherein, described address mapping management module reads PCM address mapping table and NAND FLASH address mapping table in when start to host memory from solid-state disk PCM fixed area, when shutdown, the address map entry of having revised in address mapping table in internal memory write back in the respective regions of solid-state disk PCM.
6. system according to claim 4, wherein, in the time receiving the request of file system access solid-state disk, described address mapping management module judges whether the size of request access data is less than threshold value, if be less than threshold value, this request is little write request, otherwise this request is large write request, distribute the physical address of PCM for small letter request, distribute the physical address of NAND FLASH for large write request.
7. system according to claim 4, wherein, the wearing and tearing number of times of described address mapping management module statistics PCM and NADN FLASH, in the time carrying out address assignment, judge the cold and hot property of data, if cold data are just assigned to the more physical block address of wearing and tearing number of times, otherwise be just assigned to the less physical block address of wearing and tearing number of times.
8. system according to claim 4, wherein, when described address mapping management module is carried out address assignment, distributes in the mode of band, continuous logical address is assigned on the different physical channels of solid-state disk.
9. system according to claim 4, wherein, for IO dispatching management module, calculates channel number according to physical address, and request is added to corresponding PCM and NAND FLASH channel cycle queue afterbody.
10. system according to claim 4, wherein, arranges timer in described IO dispatching management module, in the time that timer arrives, the request in cycle request queue is sent to solid-state disk; When detecting that solid-state disk has had the time of interruption, the completion status of asking in the queue of inquiry cycle request, if completed, just deletes this request from cycle request queue.
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