CN109933292A - Memory command processing method, terminal and storage medium - Google Patents

Memory command processing method, terminal and storage medium Download PDF

Info

Publication number
CN109933292A
CN109933292A CN201910217114.4A CN201910217114A CN109933292A CN 109933292 A CN109933292 A CN 109933292A CN 201910217114 A CN201910217114 A CN 201910217114A CN 109933292 A CN109933292 A CN 109933292A
Authority
CN
China
Prior art keywords
emmc
order
memory
processor
temporal information
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201910217114.4A
Other languages
Chinese (zh)
Other versions
CN109933292B (en
Inventor
俞斌
杨维琴
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenzhen Wenmai International Media Co ltd
Original Assignee
Huizhou TCL Mobile Communication Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Huizhou TCL Mobile Communication Co Ltd filed Critical Huizhou TCL Mobile Communication Co Ltd
Priority to CN201910217114.4A priority Critical patent/CN109933292B/en
Publication of CN109933292A publication Critical patent/CN109933292A/en
Application granted granted Critical
Publication of CN109933292B publication Critical patent/CN109933292B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • Debugging And Monitoring (AREA)

Abstract

The present invention provides a kind of memory command processing method, terminal and storage medium, the memory command processing method is applied to terminal, it include processor and EMMC memory in terminal, this method comprises: the processor sends EMMC order to the EMMC memory, it include the corresponding temporal information of EMMC order in the EMMC order;The EMMC memory is handled the EMMC order according to the temporal information.When terminal begins to expand the memory capacity of terminal with EMMC, by testing to EMMC order, to obtain the corresponding temporal information of each EMMC order, sequence is executed to arrange each EMMC order, avoid the influence due to multiple orders while between order caused by receiving, it prevents order from executing failure, improves terminal check efficiency.

Description

Memory command processing method, terminal and storage medium
Technical field
The present invention relates to field of mobile terminals more particularly to a kind of memory command processing methods, terminal and storage medium.
Background technique
In order to expand the memory capacity of terminal, terminal generally uses EMMC (embedded multi-media at present card);For EMMC primarily directed to the embedded memory of the mobile electronic equipments such as mobile phone, tablet computer, one of EMMC is bright Aobvious advantage is in its Highgrade integration, so that mass storage the space occupied in the terminal is reduced, so that manufacturer terminal drops The weight of low cost and product.Since terminal uses EMMC as its memory, most of storage operation of terminal is It is directed toward EMMC's.The operation of EMMC be it is authoritative, i.e. any one EMMC operation has relevant command sequence, when will be into The corresponding command sequence of the operation is first sent when row certain EMMC operation;For example, it is desired to read the ID number of EMMC, need first by master control Device processed sends the corresponding command sequence of ID number for reading EMMC to EMMC, and then EMMC can feed back to its ID number according to the order Master controller.Under normal circumstances, there is no problem for aforesaid operations;But it considers present terminal system complex, and all adopts With multithreading operation, when having multiple threads while needing to carry out EMMC operation, it is possible that the intersection between command sequence, Command sequence is caused to send failure.For example, there are two operate while being directed toward EMMC, such as the corresponding command sequence of first operation Include order: order 1, order 2, order 8, order 4;The corresponding command sequence of second operation includes order: order 2, order 2, order 8, order 7;At this time if two orders intersect when sending, two orders can execute failure, final main Controller needs to retransmit two orders and causes EMMC operating efficiency low.
Summary of the invention
The present invention provides a kind of memory command processing method, terminal and storage medium, prevents EMMC order from executing failure, Improve terminal check efficiency.
To solve the above-mentioned problems, a kind of memory command processing method of the present patent application is applied to terminal, the terminal In include processor and EMMC memory, which comprises
The processor sends EMMC order to the EMMC memory, includes that EMMC order corresponds in the EMMC order Temporal information;
The EMMC memory is handled the EMMC order according to the temporal information.
Further, the processor sends EMMC order to the EMMC memory, comprising:
The processor generates the first EMMC order, and the first EMMC order includes first time information;
The processor generates the 2nd EMMC order, and the 2nd EMMC order includes the second temporal information;
The processor sends the first EMMC order and the 2nd EMMC order to the EMMC memory.
Further, the processor sends the first EMMC order and the 2nd EMMC to the EMMC memory Order, comprising:
If the first EMMC order is to be individually performed order, the processor is individually performed described order and is sent to institute State EMMC memory;
If the EMMC order of the first EMMC order including multiple forward-backward correlations, the processor is by the multiple front and back Associated EMMC order is transmitted to the EMMC memory.
Further, the processor sends the first EMMC order and the 2nd EMMC to the EMMC memory Order, comprising:
If the 2nd EMMC order is to be individually performed order, the processor is individually performed described order and is sent to institute State EMMC memory;
If the EMMC order of the 2nd EMMC order including multiple forward-backward correlations, the processor is by the multiple front and back Associated EMMC order is transmitted to the EMMC memory.
Further, the EMMC memory handle to the EMMC order according to the temporal information includes:
Judge the sequencing of the first time information and second temporal information;
If the first time information first carries out described first earlier than second temporal information, the EMMC memory EMMC order;
If the first time information is later than second temporal information, the EMMC memory first carries out described second EMMC order.
Further, the sequencing for judging the first time information and second temporal information includes:
If the first EMMC order and the 2nd EMMC order are that order is individually performed, the first EMMC order and are judged The sequencing of temporal information in two EMMC orders.
Further, the 2nd EMMC order includes the EMMC order of multiple forward-backward correlations, the method also includes:
The processor to the EMMC memory send the first EMMC order and the 2nd EMMC order it Before, the processor is separately added into the EMMC order of the multiple forward-backward correlation in the EMMC order of the multiple forward-backward correlation Corresponding temporal information;
If the first time information is later than second temporal information, the EMMC memory first carries out described 2nd EMMC order, comprising:
If the first time information is later than second temporal information, the EMMC memory first carries out described second EMMC order, when executing the 2nd EMMC order, according in the 2nd EMMC order, the multiple forward-backward correlation order The sequencing of corresponding temporal information executes.
Further, the EMMC order includes command header, order main body and order tail, and the order main body includes current The corresponding temporal information of EMMC order.
The application also provides a kind of terminal, and the terminal includes processor, and the EMMC being connected to the processor is deposited Reservoir, the processor sends EMMC order to the EMMC memory, when the EMMC order includes that EMMC order is corresponding Between information;The EMMC memory is handled the EMMC order according to the temporal information.
The application also provides a kind of storage medium, is stored with computer program in the storage medium, the computer program The step in the as above any one memory command processing method is realized when being executed by processor.
The invention has the benefit that the present invention provides a kind of memory command processing method, terminal and storage medium, when When terminal is begun to expand the memory capacity of terminal with EMMC, by testing to EMMC order, to obtain each EMMC The corresponding temporal information of order is avoided and is ordered simultaneously due to multiple so that arrange each EMMC order executes sequence Influence between order caused by receiving prevents EMMC order from executing failure, improves terminal check efficiency.
Detailed description of the invention
It, below will be to embodiment or the prior art in order to illustrate more clearly of embodiment or technical solution in the prior art Attached drawing needed in description is briefly described, it should be apparent that, the accompanying drawings in the following description is only some of invention Embodiment for those of ordinary skill in the art without creative efforts, can also be attached according to these Figure obtains other attached drawings.
Fig. 1 is one embodiment flow diagram of memory command processing method provided by the invention;
Fig. 2 is that processor provided by the invention shows to the embodiment process that the EMMC memory sends EMMC order It is intended to;
Fig. 3 is that EMMC memory shows according to the embodiment process that the temporal information handles the EMMC order It is intended to;
Fig. 4 is the structural schematic diagram of terminal involved in one embodiment of the invention.
Specific embodiment
The explanation of following embodiment is referred to the additional illustration, the particular implementation that can be used to implement to illustrate the present invention Example.The direction term that the present invention is previously mentioned, such as [on], [under], [preceding], [rear], [left side], [right side], [interior], [outer], [side] Deng being only the direction with reference to annexed drawings.Therefore, the direction term used be to illustrate and understand the present invention, rather than to The limitation present invention.The similar unit of structure is with being given the same reference numerals in the figure.
Attached drawing and explanation are considered inherently illustrative, rather than restrictive.The similar list of structure in the figure Member is with being given the same reference numerals.In addition, in order to understand and be convenient for description, the size and thickness of each component shown in the accompanying drawings It is all arbitrarily shown, but the invention is not restricted to this.
In the accompanying drawings, for clarity, the thickness in layer, film, panel, region etc. is exaggerated.In the accompanying drawings, in order to understand Conveniently and convenient for description, the thickness of some layer and region is exaggerated.It should be noted that ought such as layer, film, region or substrate When component is referred to as " " another component "upper".The component can directly on another component, or there may also be Intermediate module.
In addition, in the description, unless explicitly described as opposite, otherwise word " comprising " will be understood as meaning to wrap The component is included, but is not excluded for any other component.Furthermore in the description, " ... on " mean to be located on target element Side or lower section, and be not intended to must be positioned on the top based on gravity direction.
Further to illustrate the present invention to reach the taken technical means and efficacy of predetermined invention, below in conjunction with attached drawing And preferred embodiment, it is specific real to a kind of memory command processing method proposed according to the present invention, terminal and storage medium Mode, structure, feature and its effect are applied, detailed description are as follows.
The present invention is directed to multiple threads under the prior art simultaneously when needing to carry out EMMC operation, it may appear that command sequence it Between intersection, the problem of causing command sequence to send failure, propose a kind of memory command processing method, this method is applied to eventually End, which includes processor and EMMC memory.
As shown in Figure 1, being one embodiment flow diagram of memory command processing method provided by the invention, this method packet It includes:
S1, the processor send EMMC order to the EMMC memory, include EMMC order in the EMMC order Corresponding temporal information.
In some embodiments of the invention, which can order for the generation time of the EMMC order, the EMMC The sending time etc. of order.
S2, the EMMC memory are handled the EMMC order according to the temporal information.
Memory command processing method provided by the invention, when terminal uses EMMC to expand the memory capacity beginning of terminal When, by testing to EMMC order, so that the corresponding temporal information of each EMMC order is obtained, to arrange each EMMC order executes sequence, avoids the influence due to multiple orders while between order caused by receiving, prevents order from holding Row failure, improves terminal check efficiency.
In some embodiments of the invention, as shown in Fig. 2, being processor provided by the invention to the EMMC memory Send an embodiment flow diagram of EMMC order, comprising:
S201, the processor generate the first EMMC order, and the first EMMC order includes first time information.
S202, the processor generate the 2nd EMMC order, and the 2nd EMMC order includes the second temporal information.
S203, the processor send the first EMMC order and the 2nd EMMC life to the EMMC memory It enables.
In some embodiments of the invention, the first time information and the second temporal information can order for the first EMMC The generation temporal information or transmission time information of order and the generation temporal information or transmission time information of the 2nd EMMC order.
It should be noted that the EMMC order that the processor is sent includes command header, EMMC life in the embodiment of the present invention Main body and order tail are enabled, i.e., the described EMMC command format is as follows:
Command header EMMC order main body Order tail
Wherein, it for EMMC order main body, needs to do the following processing: separator is added in the EMMC order main body, In the EMMC order, using the command portion before the separator in the EMMC order main body as practical pending order, Using the command portion after the separator as the temporal information currently got.
Specifically, separator and temporal information is added to any one EMMC order are as follows:
EMMCMD GAP1 EMMCMD1
Wherein, GAP1 and EMMCMD1 is newly-increased data, and GAP1 is used to separate EMMCMD and EMMCMD1, as separator, GAP1 is burst of data, such as GAP1 is 0xabcdeabeafd2f;
Wherein, EMMCMD is the EMMC order for needing to send, and EMMCMD1 is the temporal information currently got.
In some embodiments of the invention, such as at the time 10934 seconds there is an EMMC order to be sent ERASE is then that 0xabcdeabeafd2f obtains EMMCMD GAP1 EMMCMD1 and is with GAP1 0xEAA5E0xabcdeabeafd2f0x10934, wherein 0x EAA5E is ERASE, and 0x10934 is the direct conversion of time, when Other transition forms can also be so used in other embodiments of the invention.
In some other embodiments of the invention, the processor sends the first EMMC to the EMMC memory Order and the 2nd EMMC order, comprising:
If the first EMMC order is to be individually performed order, the processor is individually performed described order and is sent to institute State EMMC memory;
If the EMMC order of the first EMMC order including multiple forward-backward correlations, the processor is by the multiple front and back Associated EMMC order is transmitted to the EMMC memory.
Specifically, after the processor generates EMMC order, and the processor enters EMMC command verification process, this When, the processor detects EMMC order to be sent at this time, that is, reads the EMMC order itself pending, examine to it It surveys, the content of the detection i.e. order is individually performed order or needs to have forward-backward correlation with other orders and need to execute together Order.If the EMMC order is the order being individually performed, the processor is added in the EMMC order and currently obtains The temporal information got records the temporal information currently got, and the EMMC order is sent to the processor;If institute Stating EMMC order has forward-backward correlation and needs to execute together, then current acquisition is added in the processor in the EMMC order The temporal information arrived records the temporal information currently got, and multiple EMMC orders of the forward-backward correlation is transmitted To the processor.
Specifically, current processor generates the first EMMC order and the 2nd EMMC order, the terminal order the first EMMC It enables and the 2nd EMMC order is detected, if the first EMMC order is that order is individually performed, the processor will be described First EMMC order is sent directly to the EMMC memory, and the time letter currently got is added in the first EMMC order Breath, and the temporal information is recorded, it is first time information.If the 2nd EMMC order is the order of forward-backward correlation, institute It states processor to transmit the multiple EMMC order to the EMMC memory, and adds in the EMMC order transmitted Enter the temporal information currently got, and record the temporal information, is the second temporal information.
As shown in figure 3, being ordered according to the temporal information the EMMC for EMMC memory described in step S2 in the present invention The embodiment flow diagram handled is enabled, EMMC memory described in the step S2 is according to the temporal information to described EMMC order carries out processing
S301, the sequencing for judging the first time information and second temporal information.
If S302, the first time information first carry out institute earlier than second temporal information, the EMMC memory State the first EMMC order.
If S303, the first time information are later than second temporal information, the EMMC memory first carries out institute State the 2nd EMMC order.
Specifically, in some embodiments of the invention, judge described in the step S301 first time information and The sequencing of second temporal information may include:
If the first EMMC order and the 2nd EMMC order are that order is individually performed, the first EMMC order and second are judged The sequencing of temporal information in EMMC order;
If the first time information first carries out described first earlier than second temporal information, the EMMC memory EMMC order;
If the first time information is later than second temporal information, the EMMC memory first carries out described second EMMC order.
In some embodiments of the invention, if the 2nd EMMC order includes the EMMC order of multiple forward-backward correlations, Then the EMMC memory, which is handled the EMMC order according to the temporal information, to include:
The processor to the EMMC memory send the first EMMC order and the 2nd EMMC order it Before, the processor is separately added into the EMMC order of the multiple forward-backward correlation in the EMMC order of the multiple forward-backward correlation Corresponding temporal information;
If the first time information is later than second temporal information, the EMMC memory first carries out described 2nd EMMC order, comprising:
If the first time information is later than second temporal information, the EMMC memory first carries out described second EMMC order, when executing the 2nd EMMC order, according in the 2nd EMMC order, the multiple forward-backward correlation order The sequencing of corresponding temporal information executes.
Specifically, judging whether there is recorded temporal information earlier than this for the EMMC order that this is executed The corresponding EMMC order of corresponding the recorded temporal information of EMMC order does not execute this EMMC order then if it exists, and goes Execute other EMMC orders;Current EMMC order is then executed if it does not exist.
Specifically, if currently there is following EMMC order pending:
0xEAA5E0xabcdeabeafd2f0x10934
0xEAA5F0xabcdeabeafd2f0x10931
0xEAA3E0xabcdeabeafd2f0x10930
If this EMMC order executed is 0xEAA5E0xabcdeabeafd2f0x10934, judge whether there is The corresponding EMMC order of the temporal information recorded recorded temporal information corresponding earlier than this EMMC order, It there will naturally be 0xEAA5F0xabcdeabeafd2f0x10931,0xEAA3E0xabcdeabeafd2f0x10930 is not executed first then This EMMC order, and go to execute other EMMC orders;Other EMMC orders have two at this time: 0xEAA5F0xabcdeabeafd2f0x10931,0xEAA3E0xabcdeabeafd2f0x10930;0x10930 is smaller at this time, First carry out 0xEAA3E0xabcdeabeafd2f0x10930.
The present invention also provides a kind of terminal, the terminal includes processor, and the EMMC being connected to the processor is deposited The terminal of reservoir, the embodiment of the present invention can be mobile phone either tablet computer, wherein the terminal of the present embodiment includes processing Device, and the EMMC memory being connected to the processor.
The EMMC memory is stored with computer program, realizes when which is operated by processor as described above The step of memory command processing method;
The central processing unit is used for using the program command in the memory, to operate above-mentioned memory command processing side The step of method.
Terminal provided by the invention, the terminal include processor, and the EMMC memory being connected to the processor, When terminal begins to expand the memory capacity of terminal with EMMC, by testing to EMMC order, to obtain each The corresponding temporal information of EMMC order avoids so that arrange each EMMC order executes sequence due to multiple orders Influence between order caused by receiving simultaneously prevents order from executing failure, improves terminal check efficiency.
The embodiment of the present invention also provides a kind of terminal.As shown in figure 4, it illustrates terminals involved in the embodiment of the present invention Structural schematic diagram, specifically:
The terminal may include one or processor 401, one or more calculating of more than one processing core The components such as EMMC memory 402, power supply 403 and the input unit 404 of machine readable storage medium storing program for executing.Those skilled in the art can manage Solution, the restriction of the not structure paired terminal of terminal structure shown in Fig. 4, may include than illustrating more or fewer components, or Person combines certain components or different component layouts.Wherein:
Processor 401 is the control centre of the terminal, using the various pieces of various interfaces and the entire terminal of connection, By running or execute the software program and/or module that are stored in EMMC memory 402, and calls and be stored in EMMC storage Data in device 402 execute the various functions and processing data of terminal, to carry out integral monitoring to terminal.Optionally, it handles Device 401 may include one or more processing cores;Preferably, processor 401 can integrate application processor and modulation /demodulation processing Device, wherein the main processing operation system of application processor, user interface and application program etc., modem processor is mainly located Reason wireless communication.It is understood that above-mentioned modem processor can not also be integrated into processor 401.
EMMC memory 402 can be used for storing software program and module, and processor 401 is stored in EMMC by operation and deposits The software program and module of reservoir 402, thereby executing various function application and data processing.EMMC memory 402 can be led It to include storing program area and storage data area, wherein storing program area can be needed for storage program area, at least one function Application program (such as sound-playing function, image player function etc.) etc.;Storage data area, which can be stored, uses institute according to terminal The data etc. of creation.In addition, EMMC memory 402 may include high-speed random access memory, it can also include non-volatile Memory, for example, at least a disk memory, flush memory device or other volatile solid-state parts.Correspondingly, EMMC Memory 402 can also include Memory Controller, to provide access of the processor 401 to EMMC memory 402.
Terminal further includes the power supply 403 powered to all parts, it is preferred that power supply 403 can pass through power-supply management system It is logically contiguous with processor 401, to realize the functions such as management charging, electric discharge and power managed by power-supply management system. Power supply 403 can also include one or more direct current or AC power source, recharging system, power failure detection circuit, The random components such as power adapter or inverter, power supply status indicator.
The terminal may also include input unit 404, which can be used for receiving the number or character letter of input Breath, and generation keyboard related with user setting and function control, mouse, operating stick, optics or trackball signal are defeated Enter.
Although being not shown, terminal can also be including display unit etc., and details are not described herein.Specifically in the present embodiment, eventually Processor 401 in end can be corresponding executable by the process of one or more application program according to following order File is loaded into EMMC memory 402, and the application program being stored in EMMC memory 402 is run by processor 401, As follows to realize various functions: the processor sends EMMC order to the EMMC memory, wraps in the EMMC order Include the corresponding temporal information of EMMC order;The EMMC memory according to the temporal information to the EMMC order at Reason.
The specific implementation of above each operation can be found in the embodiment of front, and details are not described herein.
The present invention also provides a kind of storage mediums, wherein the storage medium is stored with computer program, the computer journey The step of memory command processing method is realized when sequence is operated by processor.
Above-mentioned purpose according to the present invention proposes a kind of terminal, including above-mentioned memory command processing method.This implementation The working principle for the terminal that example provides, specific structure consistent with the embodiment working principle of aforementioned memory command handling method Relationship and working principle are referring to aforementioned memory command handling method embodiment, and details are not described herein again.
In conclusion although the present invention has been disclosed above in the preferred embodiment, but above preferred embodiment is not to limit The system present invention, those skilled in the art can make various changes and profit without departing from the spirit and scope of the present invention Decorations, therefore protection scope of the present invention subjects to the scope of the claims.

Claims (10)

1. a kind of memory command processing method, which is characterized in that be applied to terminal, include processor and EMMC in the terminal Memory, which comprises
The processor sends EMMC order to the EMMC memory, when including that EMMC order is corresponding in the EMMC order Between information;
The EMMC memory is handled the EMMC order according to the temporal information.
2. memory command processing method according to claim 1, which is characterized in that the processor is deposited to the EMMC Reservoir sends EMMC order, comprising:
The processor generates the first EMMC order, and the first EMMC order includes first time information;
The processor generates the 2nd EMMC order, and the 2nd EMMC order includes the second temporal information;
The processor sends the first EMMC order and the 2nd EMMC order to the EMMC memory.
3. memory command processing method according to claim 2, which is characterized in that the processor is deposited to the EMMC Reservoir sends the first EMMC order and the 2nd EMMC order, comprising:
If the first EMMC order is to be individually performed order, the processor by it is described be individually performed order be sent to it is described EMMC memory;
If the EMMC order of the first EMMC order including multiple forward-backward correlations, the processor is by the multiple forward-backward correlation EMMC order transmit to the EMMC memory.
4. memory command processing method according to claim 2, which is characterized in that the processor is deposited to the EMMC Reservoir sends the first EMMC order and the 2nd EMMC order, comprising:
If the 2nd EMMC order is to be individually performed order, the processor by it is described be individually performed order be sent to it is described EMMC memory;
If the EMMC order of the 2nd EMMC order including multiple forward-backward correlations, the processor is by the multiple forward-backward correlation EMMC order transmit to the EMMC memory.
5. memory command processing method according to claim 2, which is characterized in that the EMMC memory is according to Temporal information carries out processing to the EMMC order
Judge the sequencing of the first time information and second temporal information;
If the first time information first carries out the first EMMC earlier than second temporal information, the EMMC memory Order;
If the first time information is later than second temporal information, the EMMC memory first carries out the 2nd EMMC Order.
6. memory command processing method according to claim 5, which is characterized in that the judgement first time letter Breath and the sequencing of second temporal information include:
If the first EMMC order and the 2nd EMMC order are that order is individually performed, the first EMMC order and second are judged The sequencing of temporal information in EMMC order.
7. memory command processing method according to claim 6, which is characterized in that the 2nd EMMC order includes more The EMMC order of a forward-backward correlation, the method also includes:
Before the processor sends the first EMMC order and the 2nd EMMC order to the EMMC memory, institute It states processor and is separately added into the EMMC order of the multiple forward-backward correlation in the EMMC order of the multiple forward-backward correlation respectively Corresponding temporal information;
If the first time information is later than second temporal information, the EMMC memory first carries out described second EMMC order, comprising:
If the first time information is later than second temporal information, the EMMC memory first carries out the 2nd EMMC life It enables, when executing the 2nd EMMC order, according in the 2nd EMMC order, the multiple forward-backward correlation order is respectively right The sequencing for the temporal information answered executes.
8. memory command processing method according to claim 1, which is characterized in that the EMMC order includes order Head, order main body and order tail, the order main body include the corresponding temporal information of current EMMC order.
9. a kind of terminal, which is characterized in that including processor, and the EMMC memory being connected to the processor, the place It manages device and sends EMMC order to the EMMC memory, the EMMC order includes the corresponding temporal information of EMMC order;It is described EMMC memory is handled the EMMC order according to the temporal information.
10. a kind of storage medium, which is characterized in that be stored with computer program in the storage medium, the computer program quilt The step in any one of the claim 1-8 memory command processing method is realized when processor executes.
CN201910217114.4A 2019-03-21 2019-03-21 Memory command processing method, terminal and storage medium Active CN109933292B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201910217114.4A CN109933292B (en) 2019-03-21 2019-03-21 Memory command processing method, terminal and storage medium

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201910217114.4A CN109933292B (en) 2019-03-21 2019-03-21 Memory command processing method, terminal and storage medium

Publications (2)

Publication Number Publication Date
CN109933292A true CN109933292A (en) 2019-06-25
CN109933292B CN109933292B (en) 2023-06-09

Family

ID=66987927

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201910217114.4A Active CN109933292B (en) 2019-03-21 2019-03-21 Memory command processing method, terminal and storage medium

Country Status (1)

Country Link
CN (1) CN109933292B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111414137A (en) * 2020-03-19 2020-07-14 Tcl移动通信科技(宁波)有限公司 Memory control method and system, storage medium and terminal device

Citations (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120072735A1 (en) * 2010-09-17 2012-03-22 Kabushiki Kaisha Toshiba Storage device, protection method, and electronic device
US20120079352A1 (en) * 2010-09-24 2012-03-29 Texas Memory Systems, Inc. High-speed memory system
US20120260026A1 (en) * 2007-04-25 2012-10-11 Cornwell Michael J Merging command sequences for memory operations
US20140089530A1 (en) * 2012-09-21 2014-03-27 International Business Machines Corporation Optimizing parallel build of application
US20140297778A1 (en) * 2013-03-28 2014-10-02 Fujitsu Limited Execution control method, storage medium, and execution control apparatus
US20150058529A1 (en) * 2013-08-21 2015-02-26 Sandisk Technologies Inc. Systems and methods of processing access requests at a data storage device
US20150205534A1 (en) * 2014-01-17 2015-07-23 Kabushiki Kaisha Toshiba Controller, solid-state drive and control method
US9152553B1 (en) * 2011-12-15 2015-10-06 Marvell International Ltd. Generic command descriptor for controlling memory devices
US20160085445A1 (en) * 2014-09-18 2016-03-24 Ju Pyung LEE Method operating raid system and data storage systems using write command log
US20160371034A1 (en) * 2015-06-22 2016-12-22 Samsung Electronics Co., Ltd. Data storage device and data processing system having the same
US20170293430A1 (en) * 2016-04-06 2017-10-12 SK Hynix Inc. Data processing system and operating method of data processing system
US20170300269A1 (en) * 2016-04-14 2017-10-19 SK Hynix Inc. Memory system and operating method thereof
US20180293006A1 (en) * 2017-04-11 2018-10-11 SK Hynix Inc. Controller including multi processor and operation method thereof
US20180307547A1 (en) * 2017-04-24 2018-10-25 SK Hynix Inc. Controller inclduing multi processor and operation method thereof
US20180364942A1 (en) * 2017-06-20 2018-12-20 Reduxion Systems Ltd. System and method for optimizing multiple packaging operations in a storage system

Patent Citations (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120260026A1 (en) * 2007-04-25 2012-10-11 Cornwell Michael J Merging command sequences for memory operations
US20120072735A1 (en) * 2010-09-17 2012-03-22 Kabushiki Kaisha Toshiba Storage device, protection method, and electronic device
US20120079352A1 (en) * 2010-09-24 2012-03-29 Texas Memory Systems, Inc. High-speed memory system
US9152553B1 (en) * 2011-12-15 2015-10-06 Marvell International Ltd. Generic command descriptor for controlling memory devices
US20140089530A1 (en) * 2012-09-21 2014-03-27 International Business Machines Corporation Optimizing parallel build of application
US20140297778A1 (en) * 2013-03-28 2014-10-02 Fujitsu Limited Execution control method, storage medium, and execution control apparatus
US20150058529A1 (en) * 2013-08-21 2015-02-26 Sandisk Technologies Inc. Systems and methods of processing access requests at a data storage device
US20150205534A1 (en) * 2014-01-17 2015-07-23 Kabushiki Kaisha Toshiba Controller, solid-state drive and control method
US20160085445A1 (en) * 2014-09-18 2016-03-24 Ju Pyung LEE Method operating raid system and data storage systems using write command log
US20160371034A1 (en) * 2015-06-22 2016-12-22 Samsung Electronics Co., Ltd. Data storage device and data processing system having the same
US20170293430A1 (en) * 2016-04-06 2017-10-12 SK Hynix Inc. Data processing system and operating method of data processing system
US20170300269A1 (en) * 2016-04-14 2017-10-19 SK Hynix Inc. Memory system and operating method thereof
US20180293006A1 (en) * 2017-04-11 2018-10-11 SK Hynix Inc. Controller including multi processor and operation method thereof
US20180307547A1 (en) * 2017-04-24 2018-10-25 SK Hynix Inc. Controller inclduing multi processor and operation method thereof
US20180364942A1 (en) * 2017-06-20 2018-12-20 Reduxion Systems Ltd. System and method for optimizing multiple packaging operations in a storage system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111414137A (en) * 2020-03-19 2020-07-14 Tcl移动通信科技(宁波)有限公司 Memory control method and system, storage medium and terminal device

Also Published As

Publication number Publication date
CN109933292B (en) 2023-06-09

Similar Documents

Publication Publication Date Title
CN102375788B (en) Method and device for dynamic allocation of power budget for a system having non-volatile memory
CN105144074B (en) It is stored using the block of hybrid memory device
CN107577620A (en) Information processor, information processing method and recording medium
US8421421B2 (en) Storage system including a plurality of battery modules
CN105278937A (en) Method and device for displaying pop-up box messages
JP7438140B2 (en) Energy storage device management system, storage device, and energy storage device management method
CN109783017A (en) It is a kind of to store the processing method of equipment bad block, device and storage equipment
CN102231098A (en) Data processing unit with multi-graphic controller and method for processing data using the same
CN107577621A (en) Information processor, information processing method and recording medium
CN110308400A (en) Under a kind of vehicle after electricity accumulator status monitoring method
CN108241494A (en) Vehicle Electronic Control Unit upgrade method, device, vehicle control electronics and vehicle
CN106569913B (en) The method and device of terminal backup data
KR20130021625A (en) Operating method and portable device supporting the same
CN102842939A (en) Battery management system and battery management method
US20080242369A1 (en) Portable electronic apparatus
US11942608B2 (en) Device battery and unmanned aerial vehicle
CN101819550A (en) Interface testing system for serial connecting small computer system
CN109933292A (en) Memory command processing method, terminal and storage medium
CN106293805A (en) The method and device that program loads
CN108021471A (en) The method of data storage device, data handling system and manufaturing data storage device
CN106055435A (en) Verification of storage media upon deployment
US9132550B2 (en) Apparatus and method for managing robot components
CN103870319A (en) Method and device for information processing and electronic device
CN107102879A (en) Information is sent and firmware upgrade method, device, terminal, equipment and storage medium
CN104484211B (en) The method and device of shared image file

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
TA01 Transfer of patent application right

Effective date of registration: 20230515

Address after: 2202, Dachong Building, No. 2009 Shahe West Road, Dachong Community, Yuehai Street, Nanshan District, Shenzhen, Guangdong Province, 518000

Applicant after: Shenzhen Wenmai International Media Co.,Ltd.

Address before: 516006 Zhongkai hi tech Zone, Huizhou, Guangdong, 86 Chang seven Road West

Applicant before: HUIZHOU TCL MOBILE COMMUNICATION Co.,Ltd.

TA01 Transfer of patent application right
GR01 Patent grant
GR01 Patent grant