CN109918132A - A kind of instruction installation method, device, electronic equipment and storage medium - Google Patents
A kind of instruction installation method, device, electronic equipment and storage medium Download PDFInfo
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Abstract
The embodiment of the invention provides a kind of instruction installation method and devices, the described method includes: according to the comparison result for the buffer size for storing local instruction sequence in the fixed area maximum value and virtual machine of processor, at least one fixed area is distributed from memory address space as buffer area, region jump instruction target jump instruction in virtual machine instruction sequence being compiled as in local instruction sequence, local instruction sequence is installed in the target fixed area of the buffer area, it realizes and the distribution of buffer area is controlled as unit of fixed area, and then it can control the compiling and installation of local instruction sequence, the jump instruction address and jump target addresses for ensuring region jump instruction are located in the same fixed area, avoid formation zone jump instruction bring security risks, realize that automatic compiling formation zone jumps finger It enables, then improves the quality that compiling generates jump instruction, optimize the execution performance of jump instruction on virtual machine.
Description
Technical field
The present invention relates to field of computer technology, more particularly to a kind of instruction installation method, a kind of instruction mounting device,
A kind of electronic equipment and a kind of readable storage medium storing program for executing.
Background technique
Virtual machine (VM, Virtual Machine) mainly by the method for software (or being aided with a small amount of hardware supported) come
A computer is fictionalized, and this virtual computer usually also supports a set of corresponding instruction set, referred to as virtual machine refers to
Enable collection.Virtual machine relies on local physical machine (Host Machine), by its enforcement engine to given virtual machine instructions
Sequence (target program) simulates execution on the local machine.
The enforcement engine of virtual machine can be realized by interpreter.Since interpreter has portable high, realization cost
The features such as low and EMS memory occupation is few, the enforcement engine of most of virtual machines all includes interpreter.Interpreter is referred to a virtual machine
Enable is that unit carries out instruction fetch, instruction dispatch, extract operation number and execution.But simple explanation execution performance is low, therefore virtual
Dynamic compilation system is introduced in machine to improve its performance.
Compiler is the core of dynamic compilation system.Compiler is with one group of continuous virtual machine instruction sequence (basic block, letter
Several or method) it is that unit is integrally compiled into local CPU instructions sequence, referred to as nation method, compiling is directly then executed by hardware
Nation method afterwards.Compiler is carried out in compiling again due to eliminating the processes such as duplicate instruction fetch and instruction dispatch
A large amount of fruitful optimizations, therefore its performance is often 10 times of interpreter or more.Since compiler is in the program runtime
Between carry out on-the-flier compiler, therefore the instant compiler that is otherwise known as (JIT, Just-in-time Compiler).On-the-flier compiler is to determine
Determine the key of virtual machine performance.
Different with the static compilations such as traditional C/C++, on-the-flier compiler behavior occurs to introduce additional during program operation
Compile expense.Studies have shown that when the Annual distribution of program operation has apparent locality characteristic, the i.e. major part of program execution
Between concentrate on fraction code.In order to reduce the overhead generated by on-the-flier compiler, the dynamic of modern virtual machine as far as possible
Compiling system is usually designed and realizes according to " selectivity compiling " (selective compilation) theory.Its core
Thought is: the part (referred to as hot spot) only frequently executed in compiler, is not compiled part and then explains execution.
Corresponding nation method will be generated after method compiling.Then, it is medium will to be copied into code buffer-zone for nation method
It is to be performed.Code buffer-zone is in virtual machine for storing the dedicated memory region of nation method.Nation method copies generation to
The process of bitstream buffer is also known as the installation of nation method.
Through applicants have found that, during on-the-flier compiler, the generation of jump instruction be influence virtual machine performance it is important
Factor.The jump instruction for making full use of hardware supported is to compile the premise for generating efficient jump instruction.In general, hardware is directly supported
Jump instruction can be divided into following three types:
First, PC are opposite to jump (PC-relative branch), the general modfel of such instruction are as follows: branch-
Opcode condition offset, Typical Representative are MIPS (Microprocessor without interlocked
Piped stages, the microprocessor of no inner interlocked pipelining-stage) framework beq/bne instruction and x86 jcc class instruction.
The characteristics of this kind of instruction is that the destination address for just being jumped when condition meets, and being jumped is relative to working as front jumping
Turn the offset of instruction (or next instruction of present jump instruction).For example, beq s0, s1,32 expression are worked as on MIPS machine
And if only if the value of register s0 and register s1 are just jumped when equal, the destination address jumped is next of this instruction
IA adds offset 32.The coding range of the opposite offset offset jumped of different framework PC differs greatly.For example,
X86 machine supports the offset coding of 8,16 and 32 three kinds of length, and MIPS only supports 16 offset to encode length
Degree.The code length of Offset is shorter, and PC is opposite, and the range jumped is also narrower, and the usable range of the instruction is also smaller.
Since the opposite jump class of PC instructs, direct supports conditions judge and execution efficiency is higher, therefore reachable in jump range
Under the premise of, compiler is paid the utmost attention to realize that the conditional jump of program is semantic with respect to jump instruction using PC.And work as jump range
When unreachable, compiler can also be semantic using other types of instruction Equivalent realization conditional jump, but usual Executing Cost is more
It is high.
The region second, PC jumps (PC-region branch), the general modfel of such instruction are as follows: branch-opcode
Position-in-region, this kind of most classic representative of instruction are the j instructions of MIPS framework.The characteristics of this instruction is to jump
Be it is unconditional, but high k of the IA of jump instruction and the destination address jumped have to it is identical.
Since the jump instruction of the region PC is without carrying out branch prediction, therefore its execution efficiency is high.But it is limited to address space
Limitation, such instruction are only applicable to the only a few scene that instruction address space fixes (such as kernel and bootstrap) at present.It is several
The instruction address space of all User space programs is simultaneously not fixed, therefore compiler is hardly produced such instruction, the compiling of the mainstreams such as gcc
The instruction is not supported in device product.
Third, PC are absolutely jumped, the general modfel of such instruction are as follows: jump-opcode target, Typical Representative are
The jr/jalr instruction of MIPS framework and the jmp class of x86 instruct.Jumping for this instruction is also unconditional, and can be jumped to
Arbitrary target address.This kind of instruction can be further subdivided into again jumps to immediate destination address, and jumps to Register destination
Address.Register target address is wherein jumped to, versatility and flexibility with height, using also the most extensive.But due to
Such instruction branch prediction is difficult, therefore its executive overhead usually jump more opposite than PC jumps greatly with the region PC.Therefore if possible, main
The compiler of stream all avoids generating such instruction as far as possible.
In conclusion compiler is preferentially produced PC with respect to jump instruction, followed by PC is absolutely jumped.The address jumped is empty
Between limit, compiler generate the jump instruction of the region PC it is extremely difficult, do not support such instruction in Product-level compiler so far.
But due to the execution efficiency of the region PC jump instruction height, the shortage that compiler is supported causes hardware performance not give full play to, from
And influence the performance of jump instruction.
Summary of the invention
The embodiment of the present invention the technical problem to be solved is that provide a kind of instruction installation method, device, electronic equipment and
Readable storage medium storing program for executing can not compile asking for region jump instruction to solve the limitation for the address space for being limited to jump automatically
Topic.
To solve the above-mentioned problems, the present invention provides a kind of instruction installation methods, comprising:
According to the ratio for the buffer size for storing local instruction sequence in the fixed area maximum value and virtual machine of processor
Compared with as a result, distributing at least one fixed area from memory address space as buffer area；
Region jump instruction target jump instruction in virtual machine instruction sequence being compiled as in local instruction sequence；
The local instruction sequence is installed in the target fixed area of the buffer area, so that the region jumps finger
The jump instruction address of order and jump target addresses are located in the same fixed area.
Optionally, the buffering of local instruction sequence is stored in the fixed area maximum value and virtual machine according to processor
The comparison result of area's size, at least one fixed area is distributed from memory address space as buffer area includes:
If the buffer size is no more than fixed area maximum value, one is arbitrarily selected from the memory address space
A available fixed area is as buffer area.
Optionally, the buffering of local instruction sequence is stored in the fixed area maximum value and virtual machine according to processor
The comparison result of area's size, at least one fixed area is distributed from memory address space as buffer area includes:
If the buffer size is more than fixed area maximum value, selected from the memory address space continuous more
A fixed area is as buffer area.
Optionally, the target jump instruction includes jump instruction between sequence, the mesh by virtual machine instruction sequence
Marking the region jump instruction that jump instruction is compiled as in local instruction sequence includes:
Judge between the sequence the corresponding jump instruction address of jump instruction and jump target addresses whether have be located at it is same
Condition in one fixed area；
If the corresponding jump instruction address of jump instruction and jump target addresses have positioned at same fixation between the sequence
Jump instruction between the sequence is then compiled as region jump instruction by the condition in region.
Optionally, the buffer area includes multiple fixed area, described that the local instruction sequence is installed to described delay
It rushes in the target fixed area in area, so that the jump instruction address of the region jump instruction and jump target addresses are positioned at same
Include: in a fixed area
According to the local space hold size of instruction sequence and the jump instruction address of the region jump instruction
And jump target addresses, space is chosen from multiple fixed area of the buffer area stores the local instruction sequence enough
Target fixed area；
The local instruction sequence is installed in the target fixed area of the buffer area.
Optionally, the method also includes:
If can not select space from multiple fixed area of the buffer area stores the local instruction sequence enough
Target fixed area, then notify the virtual machine to close on-the-flier compiler.
Correspondingly, the present invention also provides a kind of instruction mounting devices, comprising:
Buffer allocation module, for storing local sequence of instructions in the fixed area maximum value and virtual machine according to processor
The comparison result of the buffer size of column distributes at least one fixed area as buffer area from memory address space；
Compiling of instruction module, for the target jump instruction in virtual machine instruction sequence to be compiled as in local instruction sequence
Region jump instruction；
Sequence installs module, for the local instruction sequence to be installed in the target fixed area of the buffer area,
So that the jump instruction address of the region jump instruction and jump target addresses are located in the same fixed area.
Optionally, the Buffer allocation module includes:
First choice submodule, if being no more than fixed area maximum value for the buffer size, from the memory
Arbitrarily select an available fixed area as buffer area in address space.
Optionally, the Buffer allocation module includes:
Second selection submodule, if being more than fixed area maximum value for the buffer size, from the memory
Select continuous multiple fixed area as buffer area in the space of location.
Optionally, the target jump instruction includes jump instruction between sequence, and described instruction collector includes:
Judging submodule, for judging the corresponding jump instruction address of jump instruction and jump target addresses between the sequence
Whether condition positioned at same fixed area in is had；
Submodule is compiled, if for the corresponding jump instruction address of jump instruction between the sequence and jump target addresses tool
The standby condition in same fixed area, then be compiled as region jump instruction for jump instruction between the sequence.
Optionally, the buffer area includes multiple fixed area, and the sequence installation module includes:
Regional choice submodule, for being jumped according to the space hold size and the region of the local instruction sequence
Jump instruction address and the jump target addresses for turning instruction are chosen space from multiple fixed area of the buffer area and are deposited enough
Put the target fixed area of the local instruction sequence；
Submodule is installed, for the local instruction sequence to be installed in the target fixed area of the buffer area.
Optionally, described device further include:
Notification module, if for that can not be selected from multiple fixed area of the buffer area described in space stores enough
The target fixed area of local instruction sequence then notifies the virtual machine to close on-the-flier compiler.
It include memory and one or more than one correspondingly, the present invention also provides a kind of electronic equipment
Program, perhaps more than one program is stored in memory and is configured to by one or more than one processing for one of them
It includes the instruction for performing the following operation that device, which executes the one or more programs:
According to the ratio for the buffer size for storing local instruction sequence in the fixed area maximum value and virtual machine of processor
Compared with as a result, distributing at least one fixed area from memory address space as buffer area；
Region jump instruction target jump instruction in virtual machine instruction sequence being compiled as in local instruction sequence；
The local instruction sequence is installed in the target fixed area of the buffer area, so that the region jumps finger
The jump instruction address of order and jump target addresses are located in the same fixed area.
Optionally, the buffering of local instruction sequence is stored in the fixed area maximum value and virtual machine according to processor
The comparison result of area's size, at least one fixed area is distributed from memory address space as buffer area includes:
If the buffer size is no more than fixed area maximum value, one is arbitrarily selected from the memory address space
A available fixed area is as buffer area.
Optionally, the buffering of local instruction sequence is stored in the fixed area maximum value and virtual machine according to processor
The comparison result of area's size, at least one fixed area is distributed from memory address space as buffer area includes:
If the buffer size is more than fixed area maximum value, selected from the memory address space continuous more
A fixed area is as buffer area.
Optionally, the target jump instruction includes jump instruction between sequence, the mesh by virtual machine instruction sequence
Marking the region jump instruction that jump instruction is compiled as in local instruction sequence includes:
Judge between the sequence the corresponding jump instruction address of jump instruction and jump target addresses whether have be located at it is same
Condition in one fixed area；
If the corresponding jump instruction address of jump instruction and jump target addresses have positioned at same fixation between the sequence
Jump instruction between the sequence is then compiled as region jump instruction by the condition in region.
Optionally, the buffer area includes multiple fixed area, described that the local instruction sequence is installed to described delay
It rushes in the target fixed area in area, so that the jump instruction address of the region jump instruction and jump target addresses are positioned at same
Include: in a fixed area
According to the local space hold size of instruction sequence and the jump instruction address of the region jump instruction
And jump target addresses, space is chosen from multiple fixed area of the buffer area stores the local instruction sequence enough
Target fixed area；
The local instruction sequence is installed in the target fixed area of the buffer area.
Optionally, the method also includes:
If can not select space from multiple fixed area of the buffer area stores the local instruction sequence enough
Target fixed area, then notify the virtual machine to close on-the-flier compiler.
Correspondingly, the present invention also provides a kind of readable storage medium storing program for executing, when the instruction in the storage medium is set by electronics
When standby processor executes, so that electronic equipment is able to carry out above-metioned instruction installation method.
According to an embodiment of the present invention, by storing local instruction in the fixed area maximum value and virtual machine according to processor
The comparison result of the buffer size of sequence distributes at least one fixed area as buffer area from memory address space, incites somebody to action
Target jump instruction in virtual machine instruction sequence is compiled as the region jump instruction in local instruction sequence, by local sequence of instructions
Column are installed in the target fixed area of the buffer area, are realized and are controlled as unit of fixed area to the distribution of buffer area
System, and then can control the compiling and installation of local instruction sequence, it is ensured that the jump instruction address of region jump instruction and jump
Destination address is located in the same fixed area, avoids formation zone jump instruction bring security risks, realizes automatic
Formation zone jump instruction is compiled, the quality that compiling generates jump instruction is then improved, optimizes jump instruction on virtual machine
Execution performance.
Detailed description of the invention
Fig. 1 shows a kind of step flow chart of instruction installation method of the embodiment of the present invention one；
Fig. 2 shows a kind of step flow charts of instruction installation method of the embodiment of the present invention two；
Fig. 3 shows a kind of structural block diagram of instruction mounting device embodiment of the embodiment of the present invention three；
Fig. 4 shows a kind of structural frames of electronic equipment for instructing installation shown according to an exemplary embodiment
Figure.
Specific embodiment
In order to make the foregoing objectives, features and advantages of the present invention clearer and more comprehensible, with reference to the accompanying drawing and specific real
Applying mode, the present invention is described in further detail.
Referring to Fig.1, a kind of step flow chart of instruction installation method of the embodiment of the present invention one is shown, specifically can wrap
Include following steps:
Step 101, according to the buffer area for storing local instruction sequence in the fixed area maximum value and virtual machine of processor
The comparison result of size distributes at least one fixed area as buffer area from memory address space.
In embodiments of the present invention, the instruction sequence executed on virtual machine is denoted as virtual machine instruction sequence, virtual machine instructions
The sequence compilation instruction sequence executable at the processor in physical machine, is denoted as local instruction sequence.Virtual machine is by virtual machine
After instruction sequence on-the-flier compiler is at local instruction sequence, it is medium to be performed that local instruction sequence will be copied into buffer area.One
As this be used to store buffer area of local instruction sequence and be randomly assigned memory address space in virtual machine starting and obtain, be difficult to protect
It is identical for demonstrate,proving the IA of jump instruction and high k of the destination address jumped, it is therefore desirable to the distribution side of buffer area
Formula is controlled.
A series of continuous instruction address spaces, and high k for meeting all instructions address in the region are identical, referred to as
Fixed area.The value that the total length of IA subtracts k is the codified length of fixed area, and codified length is bigger, fixed
Space maximum value in Region Theory is also bigger.Specific k value is determined by the specific implementation of the framework of alignment processing device.For example,
K=36 on 64 frameworks of MIPS, codified length are 28, and fixed area maximum value is 256M.And in 32 framves of MIPS
K=4 on structure, codified length are 28, and fixed area maximum value is 256M.That is, the fixed area of processor is maximum
Value is determined by hardware in advance, and buffer size needed for virtual machine stores local instruction sequence is also pre-determined.
In embodiments of the present invention, at virtual machine allocation buffer, needed for storing local instruction sequence according to virtual machine
Buffer size and processor fixed area maximum value comparison result, determine the control strategy of Buffer allocation.Specifically
It include a variety of situations when realization, for example, appointing from memory address space if buffer size is no more than fixed area maximum value
Meaning select one available fixed area as buffer area, if buffer size more than fixed area maximum value,
Select multiple fixed area as buffer area or any other applicable method of salary distribution, the present invention from memory address space
Embodiment is without limitation.
It is worth noting that buffer size is not necessarily the integral multiple of fixed area maximum value, empty from memory address
Between middle distribution one or more fixed area when, the size that actually distribute can be determined according to buffer size, for example, buffer area
When size is 2.5 times of fixed area maximum value, two complete fixed area are first distributed, then will be in third fixed area
Half region is distributed as a fixed area, finally obtains the buffer area of three fixed area composition, wherein two fixed areas
Domain is equally big, and a fixed area is only the half of complete fixed area.
Step 102, the target jump instruction in virtual machine instruction sequence the region in local instruction sequence is compiled as to jump
Turn instruction.
In embodiments of the present invention, the jump instruction in virtual machine instruction sequence is usually preferentially produced opposite jump instruction,
Secondly generate absolute jump instruction, but it is certain under the conditions of, can not generate opposite jump instruction, and the execution of absolutely jump instruction
Expense is usually all bigger than opposite jump instruction and region jump instruction.Therefore, the target in virtual machine instruction sequence is jumped into finger
Enable the region jump instruction being compiled as in local instruction sequence, wherein target jump instruction refers to complete in virtual machine instruction sequence
Portion or part jump instruction.
It in embodiments of the present invention, can due to being controlled as unit of fixed area the distribution of buffer area
So that more target jump instructions are suitable for formation zone jump instruction.The different of Buffer allocation determine jump instruction compiling
Control strategy, if buffer area only includes a fixed area, in instruction sequence jump between instruction sequence jumping
It is applicable in formation zone jump instruction, if buffer area includes multiple fixed area, jumps applicable formation zone in instruction sequence
Jump instruction, and jumping between instruction sequence needs to carry out additional judgement judges between sequence that jump instruction is corresponding and jumps finger
Enable whether address and jump target addresses have the condition in same fixed area；If the corresponding jump of jump instruction between sequence
Turn IA and jump target addresses have the condition in same fixed area, then jump instruction is applicable in generation between sequence
Otherwise region jump instruction is not suitable for formation zone jump instruction.
Step 103, the local instruction sequence is installed in the target fixed area of the buffer area, so that the area
The jump instruction address of domain jump instruction and jump target addresses are located in the same fixed area.
In embodiments of the present invention, due to including region jump instruction in local instruction sequence, it is therefore desirable to will locally refer to
It enables sequence be installed in the same fixed area of buffer area, i.e. target fixed area, and makes the jump of region jump instruction
Turn IA and jump target addresses are located in the same fixed area.
Specifically, the difference of Buffer allocation determines the control strategy of instruction sequence installation, for example, if buffer area
Comprising a fixed area, then only needing buffer area to there are enough spaces to install local instruction sequence, then region jump instruction
Jump instruction address and jump target addresses will be located at this fixed area in, region jump instruction will not be unsatisfactory for
Execution condition, therefore local instruction sequence can be installed freely under the premise of being no more than buffer area range after meeting installation.If slow
Rushing area includes multiple fixed area, then needs to select an available target fixed area, that is, selecting one has enough spaces
The fixed area for installing local instruction sequence, is then installed to the target fixed area for local instruction sequence.Specifically may be used
With any suitable mounting means, the embodiment of the present invention is without limitation.
According to an embodiment of the present invention, by storing local instruction in the fixed area maximum value and virtual machine according to processor
The comparison result of the buffer size of sequence distributes at least one fixed area as buffer area from memory address space, incites somebody to action
Target jump instruction in virtual machine instruction sequence is compiled as the region jump instruction in local instruction sequence, by local sequence of instructions
Column are installed in the target fixed area of the buffer area, are realized and are controlled as unit of fixed area to the distribution of buffer area
System, and then can control the compiling and installation of local instruction sequence, it is ensured that the jump instruction address of region jump instruction and jump
Destination address is located in the same fixed area, avoids formation zone jump instruction bring security risks, realizes automatic
Formation zone jump instruction is compiled, the quality that compiling generates jump instruction is then improved, optimizes jump instruction on virtual machine
Execution performance.
Referring to Fig. 2, a kind of step flow chart of instruction installation method of the embodiment of the present invention two is shown, specifically can wrap
Include following steps:
Step 201, according to the buffer area for storing local instruction sequence in the fixed area maximum value and virtual machine of processor
The comparison result of size distributes at least one fixed area as buffer area from memory address space.
In embodiments of the present invention, optionally, local according to being stored in the fixed area maximum value and virtual machine of processor
The comparison result of the buffer size of instruction sequence distributes at least one fixed area as buffer area from memory address space
If a kind of implementation may include: the buffer size be no more than fixed area maximum value, from the memory address
Arbitrarily select an available fixed area as buffer area in space.
For example, the fixed area maximum value that MIPS compatible processor is supported is X, and Java Virtual Machine actual motion institute
Needing buffer size is usually Y, due to buffer size be less than fixed area maximum value, therefore by Buffer allocation starting X
Within the scope of memory address space, buffer area is entirely located in the same fixed area at this time, and in buffer area any one area
Domain jump instruction can jump to any position in buffer area.
In embodiments of the present invention, optionally, local according to being stored in the fixed area maximum value and virtual machine of processor
The comparison result of the buffer size of instruction sequence distributes at least one fixed area as buffer area from memory address space
If another implementation may include: the buffer size be more than fixed area maximum value, from the memory address
Select continuous multiple fixed area as buffer area in space.
It selects multiple fixed area as buffer area, preferably selects continuous multiple fixed area, i.e., adjacent fixation
Region can make the locality of program more excellent in this way, and then improve execution efficiency.
Step 202, judge whether the corresponding jump instruction address of jump instruction and jump target addresses have between the sequence
The standby condition in same fixed area.
In embodiments of the present invention, target jump instruction includes jump instruction between sequence, in order to avoid jumping finger between sequence
The situation that jump instruction address and jump target addresses occurs and can not be located in same fixed area is enabled to sentence in compilation process
Whether the corresponding jump instruction address of jump instruction and jump target addresses have in same fixed area between disconnected sequence
Condition, for example, the difference between jump instruction address and jump target addresses is calculated, if difference is less than the size of fixed area,
Then the corresponding jump instruction address of jump instruction and jump target addresses have the condition in same fixed area between sequence,
Or any other applicable condition, the embodiment of the present invention are without limitation.
Step 203, if the corresponding jump instruction address of jump instruction and jump target addresses have and are located between the sequence
Jump instruction between the sequence is then compiled as region jump instruction by the condition in same fixed area.
In embodiments of the present invention, if the corresponding jump instruction address of jump instruction and jump target addresses have between sequence
Condition in same fixed area, i.e., jump instruction have passed through screening between the sequence, can be compiled as region jump instruction,
Thus jump instruction address and jump target addresses can not can be made to be located at a part in advance same solid before the mounting
The jump instruction determined in region is rejected, this part jump instruction of rejecting is generated as other kinds of jump instruction, after avoiding
The continuous trouble recompilated because that can not install, reduces useless expense brought by unnecessary compiling.
Step 204, according to the local space hold size of instruction sequence and jumping for the region jump instruction
IA and jump target addresses, selection space is stored the local enough and is referred to from multiple fixed area of the buffer area
Enable the target fixed area of sequence.
In embodiments of the present invention, when buffer area includes multiple fixed area, the space according to local instruction sequence is needed
Occupy jump instruction address and the jump target addresses of size and region jump instruction, multiple fixed area from buffer area
The middle target fixed area chosen space and store local instruction sequence enough.
Selection target fixed area needs while meeting two conditions, i.e., available space is greater than this in target fixed area
The space hold size of ground instruction sequence and the jump instruction address of region jump instruction and jump target addresses can be simultaneously
In the target fixed area.
Area when practical application, after the installation of local instruction sequence, especially between jump instruction compiling sequence
Domain jump instruction, so that the jump instruction address of region jump instruction and jump target addresses are located in the same fixed area,
N times of the space hold size for requiring available space in fixed area to be more than local instruction sequence can be set, just selected
It is without limitation for target fixed area or any other applicable condition, the embodiment of the present invention.
Step 205, if can not select space from multiple fixed area of the buffer area stores the local enough
The target fixed area of instruction sequence then notifies the virtual machine to close on-the-flier compiler.
In embodiments of the present invention, if can not select space from multiple fixed area of buffer area stores local enough
The target fixed area of instruction sequence, then do not execute step 204, is changed to notice virtual machine buffer insufficient space, closes dynamic
Compilation facility.
Step 206, the local instruction sequence is installed in the target fixed area of the buffer area.
In embodiments of the present invention, the target fixed area according to the sequencing of local instruction sequence generation in buffer area
In continuously install, until the insufficient space of target fixed area.
According to an embodiment of the present invention, by storing local instruction in the fixed area maximum value and virtual machine according to processor
The comparison result of the buffer size of sequence distributes at least one fixed area as buffer area from memory address space, incites somebody to action
Target jump instruction in virtual machine instruction sequence is compiled as the region jump instruction in local instruction sequence, by local sequence of instructions
Column are installed in the target fixed area of the buffer area, are realized and are controlled as unit of fixed area to the distribution of buffer area
System, and then can control the compiling and installation of local instruction sequence, it is ensured that the jump instruction address of region jump instruction and jump
Destination address is located in the same fixed area, avoids formation zone jump instruction bring security risks, realizes automatic
Formation zone jump instruction is compiled, the quality that compiling generates jump instruction is then improved, optimizes jump instruction on virtual machine
Execution performance.
Further, by judging between the sequence whether are the corresponding jump instruction address of jump instruction and jump target addresses
Have the condition being located in same fixed area, a part can not be made into jump instruction address and jump target addresses position in advance
It is rejected in the jump instruction in same fixed area, this part jump instruction of rejecting is generated as other kinds of to jump finger
It enables, avoids the subsequent trouble recompilated because that can not install, reduce useless expense brought by unnecessary compiling.
It should be noted that for simple description, therefore, it is stated as a series of action groups for embodiment of the method
It closes, but those skilled in the art should understand that, embodiment of that present invention are not limited by the describe sequence of actions, because according to
According to the embodiment of the present invention, some steps may be performed in other sequences or simultaneously.Secondly, those skilled in the art also should
Know, the embodiments described in the specification are all preferred embodiments, and the related movement not necessarily present invention is implemented
Necessary to example.
Referring to Fig. 3, a kind of structural block diagram of instruction mounting device embodiment of the embodiment of the present invention three is shown, specifically may be used
To include following module:
Buffer allocation module 301 locally refers to for storage in the fixed area maximum value and virtual machine according to processor
The comparison result for enabling the buffer size of sequence distributes at least one fixed area as buffer area from memory address space；
Compiling of instruction module 302, for the target jump instruction in virtual machine instruction sequence to be compiled as local sequence of instructions
Region jump instruction in column；
Sequence installs module 303, for the local instruction sequence to be installed to the target fixed area of the buffer area
In, so that the jump instruction address of the region jump instruction and jump target addresses are located in the same fixed area.
In embodiments of the present invention, optionally, the Buffer allocation module includes:
First choice submodule, if being no more than fixed area maximum value for the buffer size, from the memory
Arbitrarily select an available fixed area as buffer area in address space.
In embodiments of the present invention, optionally, the Buffer allocation module includes:
Second selection submodule, if being more than fixed area maximum value for the buffer size, from the memory
Select continuous multiple fixed area as buffer area in the space of location.
In embodiments of the present invention, optionally, the target jump instruction includes jump instruction between sequence, and described instruction is compiled
Translating module includes:
Judging submodule, for judging the corresponding jump instruction address of jump instruction and jump target addresses between the sequence
Whether condition positioned at same fixed area in is had；
Submodule is compiled, if for the corresponding jump instruction address of jump instruction between the sequence and jump target addresses tool
The standby condition in same fixed area, then be compiled as region jump instruction for jump instruction between the sequence.
In embodiments of the present invention, optionally, the buffer area includes multiple fixed area, and the sequence installs module packet
It includes:
Regional choice submodule, for being jumped according to the space hold size and the region of the local instruction sequence
Jump instruction address and the jump target addresses for turning instruction are chosen space from multiple fixed area of the buffer area and are deposited enough
Put the target fixed area of the local instruction sequence；
Submodule is installed, for the local instruction sequence to be installed in the target fixed area of the buffer area.
In embodiments of the present invention, optionally, described device further include:
Notification module, if for that can not be selected from multiple fixed area of the buffer area described in space stores enough
The target fixed area of local instruction sequence then notifies the virtual machine to close on-the-flier compiler.
According to an embodiment of the present invention, by storing local instruction in the fixed area maximum value and virtual machine according to processor
The comparison result of the buffer size of sequence distributes at least one fixed area as buffer area from memory address space, incites somebody to action
Target jump instruction in virtual machine instruction sequence is compiled as the region jump instruction in local instruction sequence, by local sequence of instructions
Column are installed in the target fixed area of the buffer area, are realized and are controlled as unit of fixed area to the distribution of buffer area
System, and then can control the compiling and installation of local instruction sequence, it is ensured that the jump instruction address of region jump instruction and jump
Destination address is located in the same fixed area, avoids formation zone jump instruction bring security risks, realizes automatic
Formation zone jump instruction is compiled, the quality that compiling generates jump instruction is then improved, optimizes jump instruction on virtual machine
Execution performance.
For device embodiment, since it is basically similar to the method embodiment, related so being described relatively simple
Place illustrates referring to the part of embodiment of the method.
Fig. 4 is a kind of structural block diagram of electronic equipment 700 for instructing installation shown according to an exemplary embodiment.
For example, electronic equipment 700 can be mobile phone, computer, digital broadcasting terminal, messaging device, game console put down
Panel device, Medical Devices, body-building equipment, personal digital assistant etc..
Referring to Fig. 4, electronic equipment 700 may include following one or more components: processing component 702, memory 704,
Power supply module 706, multimedia component 708, audio component 710, the interface 712 of input/output (I/O), sensor module 714,
And communication component 716.
The integrated operation of the usual controlling electronic devices 700 of processing component 702, such as with display, call, data are logical
Letter, camera operation and record operate associated operation.Processing element 702 may include one or more processors 720 to hold
Row instruction, to perform all or part of the steps of the methods described above.In addition, processing component 702 may include one or more moulds
Block, convenient for the interaction between processing component 702 and other assemblies.For example, processing component 702 may include multi-media module, with
Facilitate the interaction between multimedia component 708 and processing component 702.
Memory 704 is configured as storing various types of data to support the operation in equipment 700.These data are shown
Example includes the instruction of any application or method for operating on electronic equipment 700, contact data, telephone directory number
According to, message, picture, video etc..Memory 704 can by any kind of volatibility or non-volatile memory device or they
Combination realize, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM) is erasable
Programmable read only memory (EPROM), programmable read only memory (PROM), read-only memory (ROM), magnetic memory, quick flashing
Memory, disk or CD.
Electric power assembly 704 provides electric power for the various assemblies of electronic equipment 700.Electric power assembly 704 may include power supply pipe
Reason system, one or more power supplys and other with for electronic equipment 700 generate, manage, and distribute the associated component of electric power.
Multimedia component 708 includes the screen of one output interface of offer between the electronic equipment 700 and user.
In some embodiments, screen may include liquid crystal display (LCD) and touch panel (TP).If screen includes touch surface
Plate, screen may be implemented as touch screen, to receive input signal from the user.Touch panel includes one or more touches
Sensor is to sense the gesture on touch, slide, and touch panel.The touch sensor can not only sense touch or sliding
The boundary of movement, but also detect duration and pressure associated with the touch or slide operation.In some embodiments,
Multimedia component 708 includes a front camera and/or rear camera.When electronic equipment 700 is in operation mode, as clapped
When taking the photograph mode or video mode, front camera and/or rear camera can receive external multi-medium data.It is each preposition
Camera and rear camera can be a fixed optical lens system or have focusing and optical zoom capabilities.
Audio component 710 is configured as output and/or input audio signal.For example, audio component 710 includes a Mike
Wind (MIC), when electronic equipment 700 is in operation mode, when such as call mode, recording mode, and voice recognition mode, microphone
It is configured as receiving external audio signal.The received audio signal can be further stored in memory 704 or via logical
Believe that component 716 is sent.In some embodiments, audio component 710 further includes a loudspeaker, is used for output audio signal.
I/O interface 712 provides interface between processing component 702 and peripheral interface module, and above-mentioned peripheral interface module can
To be keyboard, click wheel, button etc..These buttons may include, but are not limited to: home button, volume button, start button and lock
Determine button.
Sensor module 714 includes one or more sensors, for providing the state of various aspects for electronic equipment 700
Assessment.For example, sensor module 714 can detecte the state that opens/closes of equipment 700, the relative positioning of component, such as institute
The display and keypad that component is electronic equipment 700 are stated, sensor module 714 can also detect electronic equipment 700 or electronics
The position change of 700 1 components of equipment, the existence or non-existence that user contacts with electronic equipment 700,700 orientation of electronic equipment
Or the temperature change of acceleration/deceleration and electronic equipment 700.Sensor module 714 may include proximity sensor, be configured to
It detects the presence of nearby objects without any physical contact.Sensor module 714 can also include optical sensor, such as
CMOS or ccd image sensor, for being used in imaging applications.In some embodiments, which can be with
Including acceleration transducer, gyro sensor, Magnetic Sensor, pressure sensor or temperature sensor.
Communication component 716 is configured to facilitate the communication of wired or wireless way between electronic equipment 700 and other equipment.
Electronic equipment 700 can access the wireless network based on communication standard, such as WiFi, 2G or 3G or their combination.Show at one
In example property embodiment, communication component 714 receives broadcast singal or broadcast from external broadcasting management system via broadcast channel
Relevant information.In one exemplary embodiment, the communication component 714 further includes near-field communication (NFC) module, short to promote
Cheng Tongxin.For example, radio frequency identification (RFID) technology, Infrared Data Association (IrDA) technology, ultra wide band can be based in NFC module
(UWB) technology, bluetooth (BT) technology and other technologies are realized.
In the exemplary embodiment, electronic equipment 700 can be by one or more application specific integrated circuit (ASIC), number
Word signal processor (DSP), digital signal processing appts (DSPD), programmable logic device (PLD), field programmable gate array
(FPGA), controller, microcontroller, microprocessor or other electronic components are realized, for executing the above method.
In the exemplary embodiment, a kind of non-transitorycomputer readable storage medium including instruction, example are additionally provided
It such as include the memory 704 of instruction, above-metioned instruction can be executed by the processor 720 of electronic equipment 700 to complete the above method.Example
Such as, the non-transitorycomputer readable storage medium can be ROM, random access memory (RAM), CD-ROM, tape, soft
Disk and optical data storage devices etc..
A kind of non-transitorycomputer readable storage medium, when the instruction in the storage medium is held by the processor of terminal
When row, enable the terminal to execute a kind of instruction installation method, which comprises
According to the ratio for the buffer size for storing local instruction sequence in the fixed area maximum value and virtual machine of processor
Compared with as a result, distributing at least one fixed area from memory address space as buffer area；
Region jump instruction target jump instruction in virtual machine instruction sequence being compiled as in local instruction sequence；
The local instruction sequence is installed in the target fixed area of the buffer area, so that the region jumps finger
The jump instruction address of order and jump target addresses are located in the same fixed area.
Optionally, the buffering of local instruction sequence is stored in the fixed area maximum value and virtual machine according to processor
The comparison result of area's size, at least one fixed area is distributed from memory address space as buffer area includes:
If the buffer size is no more than fixed area maximum value, one is arbitrarily selected from the memory address space
A available fixed area is as buffer area.
Optionally, the buffering of local instruction sequence is stored in the fixed area maximum value and virtual machine according to processor
The comparison result of area's size, at least one fixed area is distributed from memory address space as buffer area includes:
If the buffer size is more than fixed area maximum value, selected from the memory address space continuous more
A fixed area is as buffer area.
Optionally, the target jump instruction includes jump instruction between sequence, the mesh by virtual machine instruction sequence
Marking the region jump instruction that jump instruction is compiled as in local instruction sequence includes:
Judge between the sequence the corresponding jump instruction address of jump instruction and jump target addresses whether have be located at it is same
Condition in one fixed area；
If the corresponding jump instruction address of jump instruction and jump target addresses have positioned at same fixation between the sequence
Jump instruction between the sequence is then compiled as region jump instruction by the condition in region.
Optionally, the buffer area includes multiple fixed area, described that the local instruction sequence is installed to described delay
It rushes in the target fixed area in area, so that the jump instruction address of the region jump instruction and jump target addresses are positioned at same
Include: in a fixed area
According to the local space hold size of instruction sequence and the jump instruction address of the region jump instruction
And jump target addresses, space is chosen from multiple fixed area of the buffer area stores the local instruction sequence enough
Target fixed area；
The local instruction sequence is installed in the target fixed area of the buffer area.
Optionally, the method also includes:
If can not select space from multiple fixed area of the buffer area stores the local instruction sequence enough
Target fixed area, then notify the virtual machine to close on-the-flier compiler.
All the embodiments in this specification are described in a progressive manner, the highlights of each of the examples are with
The difference of other embodiments, the same or similar parts between the embodiments can be referred to each other.
It should be understood by those skilled in the art that, the embodiment of the embodiment of the present invention can provide as method, apparatus or calculate
Machine program product.Therefore, the embodiment of the present invention can be used complete hardware embodiment, complete software embodiment or combine software and
The form of the embodiment of hardware aspect.Moreover, the embodiment of the present invention can be used one or more wherein include computer can
With in the computer-usable storage medium (including but not limited to magnetic disk storage, CD-ROM, optical memory etc.) of program code
The form of the computer program product of implementation.
The embodiment of the present invention be referring to according to the method for the embodiment of the present invention, terminal device (system) and computer program
The flowchart and/or the block diagram of product describes.It should be understood that flowchart and/or the block diagram can be realized by computer program instructions
In each flow and/or block and flowchart and/or the block diagram in process and/or box combination.It can provide these
Computer program instructions are set to general purpose computer, special purpose computer, Embedded Processor or other programmable data processing terminals
Standby processor is to generate a machine, so that being held by the processor of computer or other programmable data processing terminal devices
Capable instruction generates for realizing in one or more flows of the flowchart and/or one or more blocks of the block diagram
The device of specified function.
These computer program instructions, which may also be stored in, is able to guide computer or other programmable data processing terminal devices
In computer-readable memory operate in a specific manner, so that instruction stored in the computer readable memory generates packet
The manufacture of command device is included, which realizes in one side of one or more flows of the flowchart and/or block diagram
The function of being specified in frame or multiple boxes.
These computer program instructions can also be loaded into computer or other programmable data processing terminal devices, so that
Series of operation steps are executed on computer or other programmable terminal equipments to generate computer implemented processing, thus
The instruction executed on computer or other programmable terminal equipments is provided for realizing in one or more flows of the flowchart
And/or in one or more blocks of the block diagram specify function the step of.
Although the preferred embodiment of the embodiment of the present invention has been described, once a person skilled in the art knows bases
This creative concept, then additional changes and modifications can be made to these embodiments.So the following claims are intended to be interpreted as
Including preferred embodiment and fall into all change and modification of range of embodiment of the invention.
Finally, it is to be noted that, herein, relational terms such as first and second and the like be used merely to by
One entity or operation are distinguished with another entity or operation, without necessarily requiring or implying these entities or operation
Between there are any actual relationship or orders.Moreover, the terms "include", "comprise" or its any other variant meaning
Covering non-exclusive inclusion, so that process, method, article or terminal device including a series of elements not only wrap
Those elements are included, but also including other elements that are not explicitly listed, or further includes for this process, method, article
Or the element that terminal device is intrinsic.In the absence of more restrictions, being wanted by what sentence "including a ..." limited
Element, it is not excluded that there is also other identical elements in process, method, article or the terminal device for including the element.
Above to a kind of instruction installation method provided by the present invention, a kind of instruction mounting device, it is described in detail,
Used herein a specific example illustrates the principle and implementation of the invention, and the explanation of above embodiments is only used
In facilitating the understanding of the method and its core concept of the invention；At the same time, for those skilled in the art, according to the present invention
Thought, there will be changes in the specific implementation manner and application range, in conclusion the content of the present specification should not be construed as
Limitation of the present invention.
Claims (14)
1. a kind of instruction installation method characterized by comprising
According to the comparison knot for the buffer size for storing local instruction sequence in the fixed area maximum value and virtual machine of processor
Fruit distributes at least one fixed area as buffer area from memory address space；
Region jump instruction target jump instruction in virtual machine instruction sequence being compiled as in local instruction sequence；
The local instruction sequence is installed in the target fixed area of the buffer area, so that the region jump instruction
Jump instruction address and jump target addresses are located in the same fixed area.
2. the method according to claim 1, wherein the fixed area maximum value according to processor and virtual
The comparison result that the buffer size of local instruction sequence is stored in machine, distributes at least one fixed area from memory address space
Domain includes: as buffer area
If the buffer size be no more than fixed area maximum value, arbitrarily selected from the memory address space one can
The fixed area used is as buffer area.
3. the method according to claim 1, wherein the fixed area maximum value according to processor and virtual
The comparison result that the buffer size of local instruction sequence is stored in machine, distributes at least one fixed area from memory address space
Domain includes: as buffer area
If the buffer size is more than fixed area maximum value, selected from the memory address space continuous multiple solid
Region is determined as buffer area.
4. according to the method described in claim 3, it is characterized in that, the target jump instruction includes jump instruction between sequence,
The region jump instruction that the target jump instruction by virtual machine instruction sequence is compiled as in local instruction sequence includes:
Judge whether the corresponding jump instruction address of jump instruction and jump target addresses have positioned at same solid between the sequence
Determine the condition in region；
If the corresponding jump instruction address of jump instruction and jump target addresses have positioned at same fixed area between the sequence
Jump instruction between the sequence is then compiled as region jump instruction by interior condition.
5. method according to claim 1-4, which is characterized in that the buffer area includes multiple fixed area,
It is described that the local instruction sequence is installed in the target fixed area of the buffer area, so that the region jump instruction
Jump instruction address and jump target addresses, which are located in the same fixed area, includes:
According to the local space hold size of instruction sequence and jump instruction address and the jump of the region jump instruction
Turn destination address, the target that the local instruction sequence is stored in space enough is chosen from multiple fixed area of the buffer area
Fixed area；
The local instruction sequence is installed in the target fixed area of the buffer area.
6. according to the method described in claim 5, it is characterized in that, the method also includes:
If the mesh that the local instruction sequence is stored in space enough can not be selected from multiple fixed area of the buffer area
Fixed area is marked, then the virtual machine is notified to close on-the-flier compiler.
7. a kind of instruction mounting device characterized by comprising
Buffer allocation module, for storing local instruction sequence in the fixed area maximum value and virtual machine according to processor
The comparison result of buffer size distributes at least one fixed area as buffer area from memory address space；
Compiling of instruction module, the area for being compiled as the target jump instruction in virtual machine instruction sequence in local instruction sequence
Domain jump instruction；
Sequence installs module, for the local instruction sequence to be installed in the target fixed area of the buffer area, so that
The jump instruction address of the region jump instruction and jump target addresses are located in the same fixed area.
8. device according to claim 7, which is characterized in that the Buffer allocation module includes:
First choice submodule, if being no more than fixed area maximum value for the buffer size, from the memory address
Arbitrarily select an available fixed area as buffer area in space.
9. the method according to the description of claim 7 is characterized in that the Buffer allocation module includes:
Second selection submodule, it is empty from the memory address if being more than fixed area maximum value for the buffer size
Between middle select continuous multiple fixed area as buffer area.
10. device according to claim 9, which is characterized in that the target jump instruction includes jump instruction between sequence,
Described instruction collector includes:
Judging submodule, for judging between the sequence whether are the corresponding jump instruction address of jump instruction and jump target addresses
Has the condition being located in same fixed area；
Submodule is compiled, if having position for the corresponding jump instruction address of jump instruction between the sequence and jump target addresses
Jump instruction between the sequence is then compiled as region jump instruction by the condition in same fixed area.
11. according to the described in any item devices of claim 7-10, which is characterized in that the buffer area includes multiple fixed areas
Domain, the sequence installation module include:
Regional choice submodule, for jumping finger according to the space hold size and the region of the local instruction sequence
The jump instruction address of order and jump target addresses choose space from multiple fixed area of the buffer area and store institute enough
State the target fixed area of local instruction sequence；
Submodule is installed, for the local instruction sequence to be installed in the target fixed area of the buffer area.
12. device according to claim 11, which is characterized in that described device further include:
Notification module, if storing the local enough for space can not to be selected from multiple fixed area of the buffer area
The target fixed area of instruction sequence then notifies the virtual machine to close on-the-flier compiler.
13. a kind of electronic equipment, which is characterized in that include memory and one or more than one program, wherein one
A perhaps more than one program is stored in memory and is configured to execute described one by one or more than one processor
A or more than one program includes the instruction for performing the following operation:
According to the comparison knot for the buffer size for storing local instruction sequence in the fixed area maximum value and virtual machine of processor
Fruit distributes at least one fixed area as buffer area from memory address space；
Region jump instruction target jump instruction in virtual machine instruction sequence being compiled as in local instruction sequence；
The local instruction sequence is installed in the target fixed area of the buffer area, so that the region jump instruction
Jump instruction address and jump target addresses are located in the same fixed area.
14. a kind of readable storage medium storing program for executing, which is characterized in that when the instruction in the storage medium is held by the processor of electronic equipment
When row, so that electronic equipment is able to carry out the instruction installation method as described in one or more in claim to a method 1-6.
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