CN109714008B - Simple high-gain amplifying circuit - Google Patents
Simple high-gain amplifying circuit Download PDFInfo
- Publication number
- CN109714008B CN109714008B CN201811507742.8A CN201811507742A CN109714008B CN 109714008 B CN109714008 B CN 109714008B CN 201811507742 A CN201811507742 A CN 201811507742A CN 109714008 B CN109714008 B CN 109714008B
- Authority
- CN
- China
- Prior art keywords
- transistor
- signal
- amplifying unit
- electrode
- channel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
Abstract
The invention discloses a simple high-gain amplifying circuit, which comprises an amplifying unit and a holding unit, wherein the amplifying unit comprises a signal input end capable of receiving a signal to be amplified and a signal output end capable of outputting an amplified signal, the holding unit is connected with the signal input end of the amplifying unit and further outputs a holding signal capable of enabling the voltage of the signal input end of the amplifying unit to be close to the voltage of the signal output end of the amplifying unit, and further the amplifying unit is located in a reverse central point working area during operation.
Description
Technical Field
The invention relates to the field of circuits, in particular to an amplifying circuit.
Background
The amplifying circuit is one of the most widely used electronic circuits, and can amplify an input weak signal (namely, a changing voltage, a changing current and the like) to a required amplitude value and a signal which is consistent with the change rule of an original input signal;
as shown in fig. 1, according to the amplification characteristics of the amplification circuit, in the working region, when the voltage Vin at the input end is close to the voltage Vout at the output end, the amplification circuit has an optimal gain effect, while in other regions, the gain effect is general, and in actual use, a weak signal does not necessarily reach or approach the value of Vin, and due to different supply voltages of the power supplies, and the influence of the weak signal input from the input end, the weak signal is generally deviated, so that the gain effect is not good.
Disclosure of Invention
In order to solve the above-mentioned technical problems, an object of the present invention is to provide an amplifier circuit that forms a high gain by keeping voltages of a signal input terminal and a signal output terminal close to each other, and that has a simple structure, is easy to implement, and has high stability.
The technical scheme adopted by the invention is as follows:
a simple high gain amplification circuit comprising:
the amplifying unit comprises a signal input end capable of receiving a signal to be amplified and a signal output end capable of outputting the amplified signal;
and the holding unit is connected with the signal input end of the amplifying unit to output a holding signal which enables the voltage of the signal input end of the amplifying unit to be close to the voltage of the signal output end of the amplifying unit before the signal to be amplified is input, so that the amplifying unit is in a reversal center working area during operation.
The amplifying unit comprises a transistor MOS4 with a P channel and a transistor MOS5 with an N channel, wherein the grid electrode of the transistor MOS4 is respectively connected with the grid electrode of the transistor MOS5 and the signal input end of the amplifying unit, the source electrode of the transistor MOS4 is connected with an external power supply, the source electrode of the transistor MOS5 is grounded, and the drain electrode of the transistor MOS4 is respectively connected with the drain electrode of the transistor MOS5 and the signal output end of the amplifying unit.
The holding unit comprises a P-channel transistor MOS1 and an N-channel transistor MOS2, wherein the source electrode of the transistor MOS1 is connected with an external power supply, the source electrode of the transistor MOS2 is grounded, and the grid electrode of the transistor MOS1 is respectively connected with the grid electrode of the transistor MOS2, the drain electrode of the transistor MOS1 and the drain electrode of the transistor MOS 2.
Further, the device further comprises a transistor MOS3 with a P channel, wherein the grid electrode of the transistor MOS3 is grounded, the source electrode of the MOS3 of the transistor is connected with the drain electrode of the transistor MOS1, and the drain electrode of the transistor MOS3 is connected with the grid electrode of the transistor MOS 4.
Further, the signal shaping circuit further comprises a Schmitt unit, and the Schmitt unit is connected with the signal output end of the amplifying circuit to shape and resist noise of the amplifying signal.
Further, the device also comprises an inverter U1, wherein the inverter U1 is connected with the Schmitt cell to invert the signal after the shaping and noise reduction.
The Schmitt unit comprises a P-channel transistor MOS6, a P-channel transistor MOS7, an N-channel transistor MOS8, an N-channel transistor MOS9, a P-channel transistor MOS10 and an N-channel transistor MOS11;
the grid electrode of the transistor MOS6, the grid electrode of the transistor MOS7, the grid electrode of the transistor MOS8 and the grid electrode of the transistor MOS9 are connected with the signal output end of the amplifying circuit;
the source electrode of the transistor MOS6 is connected with an external power supply;
the drain electrode of the transistor MOS6 is respectively connected with the source electrode of the transistor MOS7 and the source electrode of the transistor MOS 10;
the drain of the transistor MOS10 is grounded;
the grid electrode of the transistor MOS10 is respectively connected with the drain electrode of the transistor MOS7, the grid electrode of the transistor MOS11, the drain electrode of the transistor MOS8 and the input end of the inverter U1;
the drain of the transistor MOS11 is connected to an external power supply;
the source electrode of the transistor MOS11 is respectively connected with the source electrode of the transistor MOS8 and the drain electrode of the transistor MOS 9;
the source of the transistor MOS9 is grounded.
Further, the amplifier further comprises a capacitor C1, one end of the capacitor C1 is connected with the signal input end of the amplifying unit, and the other end of the capacitor C1 is connected with the external output end of the signal to be amplified.
The holding unit enables the voltage of the signal input end of the amplifying unit to be equal to the voltage of the signal output end before the signal to be amplified is input.
The invention has the beneficial effects that:
the invention relates to an amplifying circuit, which is characterized in that a holding unit is additionally arranged at a signal input end of an amplifying unit and is connected with the signal input end of the amplifying unit, so that a holding signal which can enable the voltage of the signal input end of the amplifying unit to be close to the voltage of the signal output end of the amplifying unit is output, the amplifying unit is located in a working area of a reversal central point when in operation, the amplifying unit has the best gain effect on an externally input weak signal, further, the voltage of the signal input end is closer to the voltage of the signal output end, the gain effect is better, when an external signal to be amplified is input, the amplifying circuit amplifies the signal to be amplified with high gain, and after the amplifying, the holding unit continues to output the holding signal to enable the voltage of offset to be recovered.
Furthermore, the amplifying unit is an inverting amplifying unit composed of a P-channel transistor MOS4 and an N-channel transistor MOS5, at this time, the holding unit of the design can be composed of a P-channel transistor MOS1 and an N-channel transistor MOS2, the structure similar to that of the amplifying unit is formed by the transistor MOS1 and the transistor MOS2, and meanwhile, the voltages at two ends are kept consistent and are output to the signal input end of the amplifying unit in a mode that the grid electrodes and the drain electrodes of the two are connected.
Drawings
The following further describes embodiments of the present invention with reference to the drawings.
Fig. 1 is an amplification characteristic diagram of an amplification circuit.
Fig. 2 is a circuit schematic of the amplification circuit of the present invention.
Detailed Description
As shown in fig. 1 and 2, a simple high-gain amplifier circuit includes:
the amplification unit 1, the amplification unit 1 includes the signal input end that can receive the signal to be amplified and can output the signal output end of the amplified signal;
and the holding unit 2 is connected with the signal input end of the amplifying unit 1 to output a holding signal which enables the voltage of the signal input end of the amplifying unit 1 to be close to the voltage of the signal output end of the amplifying unit 1 before the signal to be amplified is input, so that the amplifying unit 1 is located in a working area and close to an inversion central point during operation.
Here, the holding signal may be output in a current or voltage form, and the parameters are adjusted according to the difference of the amplifying unit 1, so that the amplitude of the voltage input from the signal input terminal of the amplifying unit 1 is close to the amplitude of the voltage output from the signal output terminal, and since the specific value has a larger selection range in the working area, the gain effect is better as the gain multiple is equal to the signal input terminal Vin/signal output terminal Vout, the closer the gain is to the equal point, i.e. the inversion center point.
Still include electric capacity C1, electric capacity C1's one end is connected with the signal input part of amplification unit 1, and electric capacity C1's the other end is connected with the outside output of treating the amplified signal to the filtering direct current part.
The amplification unit 1 includes a plurality of types, and here, taking an inverting amplification unit as an example, the amplification unit 1 includes a P-channel transistor MOS4 and an N-channel transistor MOS5, a gate of the transistor MOS4 is connected to a gate of the transistor MOS5 and a signal input terminal of the amplification unit 1, a source of the transistor MOS4 is connected to an external power supply, a source of the transistor MOS5 is grounded, and a drain of the transistor MOS4 is connected to a drain of the transistor MOS5 and a signal output terminal of the amplification unit 1.
The amplifier comprises an amplifying unit 1, a signal input end, a holding unit 2 and a control unit, wherein the holding unit 2 is additionally arranged at the signal input end of the amplifying unit 1 and is connected with the signal input end of the amplifying unit 1, so that a holding signal which can enable the voltage of the signal input end of the amplifying unit 1 to be close to the voltage of the signal output end of the amplifying unit 1 is output, the amplifying unit 1 is located in a point working area when the amplifying unit 1 operates, the amplifying unit 1 has the best gain effect on a weak signal input from outside, further, the gain effect is better as the voltage of the signal input end is closer to the voltage of the signal output end, when an external signal to be amplified is input, the amplifying circuit 1 carries out high-gain amplification on the signal to be amplified, after amplification, the holding unit 2 continues to output the holding signal so that offset voltage recovery can occur in the amplifying process.
Based on the fact that the amplifying unit 1 is an inverting amplifying unit composed of a P-channel transistor MOS4 and an N-channel transistor MOS5, further, the holding signal output by the holding unit 2 can be adjusted by parameters such that the voltage at the signal input end of the amplifying unit 1 is equal to the voltage at the signal output end before the signal to be amplified is input.
For example, the holding unit 2 includes a P-channel transistor MOS1 and an N-channel transistor MOS2, the source of the transistor MOS1 is connected to an external power supply, the source of the transistor MOS2 is grounded, the gate of the transistor MOS1 is connected to the gate of the transistor MOS2, the drain of the transistor MOS1 and the drain of the transistor MOS2, where the transistor MOS1 and the transistor MOS4 and the transistor MOS2 have similar characteristics to the transistor MOS5, and the transistor MOS1 and the transistor MOS2 form a structure similar to the amplifying unit 1, and the gates and the drains of the two are connected at the same time, when the external power supply supplies power to the holding unit, voltages at the two ends of the gate and the drain of the transistor of the holding unit 2 are consistent and output to the signal input terminal of the amplifying unit 1, so that the holding signal received by the amplifying unit 1 at this time is closer to Vin which enables the amplifying unit 1 to have the best gain effect from theoretical calculation, and this design optimizes the voltage at the signal input terminal of the amplifying unit 1 to be substantially consistent with the voltage at the signal output terminal, and has a simple structure and a better holding effect.
Furthermore, a transistor MOS3 with a P channel is further included, the gate of the transistor MOS3 is grounded, the source of the transistor MOS3 is connected with the drain of the transistor MOS1, the drain of the transistor MOS3 is connected with the gate of the transistor MOS4, and the transistor MOS3 is equivalent to a resistor and ensures the stability of signals.
And the Schmitt unit 3 is also included, and the Schmitt unit 3 is connected with the signal output end of the amplifying circuit 1 to shape and resist noise of the amplified signal.
The device further comprises an inverter U1, wherein the inverter U1 is connected with the Schmitt unit 3 to invert the shape and noise of the signal after shape reduction.
The Schmitt cell 3 comprises a P-channel transistor MOS6, a P-channel transistor MOS7, an N-channel transistor MOS8, an N-channel transistor MOS9, a P-channel transistor MOS10 and an N-channel transistor MOS11;
the grid electrode of the transistor MOS6, the grid electrode of the transistor MOS7, the grid electrode of the transistor MOS8 and the grid electrode of the transistor MOS9 are all connected with the signal output end of the amplifying circuit;
the source electrode of the transistor MOS6 is connected with an external power supply;
the drain electrode of the transistor MOS6 is respectively connected with the source electrode of the transistor MOS7 and the source electrode of the transistor MOS 10;
the drain of the transistor MOS10 is grounded;
the grid electrode of the transistor MOS10 is respectively connected with the drain electrode of the transistor MOS7, the grid electrode of the transistor MOS11, the drain electrode of the transistor MOS8 and the input end of the inverter U1;
the drain of the transistor MOS11 is connected to an external power supply;
the source electrode of the transistor MOS11 is respectively connected with the source electrode of the transistor MOS8 and the drain electrode of the transistor MOS 9;
the source of the transistor MOS9 is grounded.
The amplified signal is shaped by using a Schmitt unit to form a more standard signal, and meanwhile, external noise interference is effectively eliminated and reduced, an inverting amplification unit of the amplification unit, which is composed of a transistor MOS4 with a P channel and a transistor MOS5 with an N channel, firstly amplifies in an inverting way through the inverting amplification unit, then shapes and reduces noise, and finally, the inverting processing of an inverter is carried out, so that the signal is ensured not to be distorted, and the anti-noise performance is higher.
The above description is only a preferred embodiment of the present invention, and the present invention is not limited to the above embodiment, and any technical means that can achieve the object of the present invention by basically the same means is within the scope of the present invention.
Claims (7)
1. A simple high gain amplifier circuit, comprising:
the amplifying unit comprises a signal input end capable of receiving a signal to be amplified and a signal output end capable of outputting the amplified signal;
the holding unit is connected with the signal input end of the amplifying unit to output a holding signal which enables the voltage of the signal input end of the amplifying unit to be close to the voltage of the signal output end of the amplifying unit before the signal to be amplified is input, and therefore the amplifying unit is located in a working area of a reversal central point when in operation; the amplifying unit comprises a transistor MOS4 with a P channel and a transistor MOS5 with an N channel, wherein the grid electrode of the transistor MOS4 is respectively connected with the grid electrode of the transistor MOS5 and the signal input end of the amplifying unit, the source electrode of the transistor MOS4 is connected with an external power supply, the source electrode of the transistor MOS5 is grounded, and the drain electrode of the transistor MOS4 is respectively connected with the drain electrode of the transistor MOS5 and the signal output end of the amplifying unit;
the holding unit comprises a P-channel transistor MOS1 and an N-channel transistor MOS2, wherein the source electrode of the transistor MOS1 is connected with an external power supply, the source electrode of the transistor MOS2 is grounded, and the grid electrode of the transistor MOS1 is respectively connected with the grid electrode of the transistor MOS2, the drain electrode of the transistor MOS1 and the drain electrode of the transistor MOS 2.
2. The simple high-gain amplifier circuit as set forth in claim 1, further comprising:
a P-channel transistor MOS3, the gate of the transistor MOS3 is grounded, the source of the transistor MOS3 is connected to the drain of the transistor MOS1, and the drain of the transistor MOS3 is connected to the gate of the transistor MOS 4.
3. The simple high-gain amplifier circuit as set forth in claim 1, further comprising:
and the Schmitt unit is connected with the signal output end of the amplifying circuit to shape and resist noise of the amplified signal.
4. The simple high-gain amplifier circuit as set forth in claim 3, further comprising:
and the inverter U1, the inverter U1 and the Schmitt unit are connected to perform inverse processing on the signal subjected to shape noise reduction.
5. The simple high-gain amplifier circuit as set forth in claim 4, wherein: the Schmitt unit comprises a P-channel transistor MOS6, a P-channel transistor MOS7, an N-channel transistor MOS8, an N-channel transistor MOS9, a P-channel transistor MOS10 and an N-channel transistor MOS11;
the grid electrode of the transistor MOS6, the grid electrode of the transistor MOS7, the grid electrode of the transistor MOS8 and the grid electrode of the transistor MOS9 are connected with the signal output end of the amplifying circuit;
the source electrode of the transistor MOS6 is connected with an external power supply;
the drain electrode of the transistor MOS6 is respectively connected with the source electrode of the transistor MOS7 and the source electrode of the transistor MOS 10;
the drain of the transistor MOS10 is grounded;
the grid electrode of the transistor MOS10 is respectively connected with the drain electrode of the transistor MOS7, the grid electrode of the transistor MOS11, the drain electrode of the transistor MOS8 and the input end of the inverter U1;
the drain of the transistor MOS11 is connected to an external power supply;
the source electrode of the transistor MOS11 is respectively connected with the source electrode of the transistor MOS8 and the drain electrode of the transistor MOS 9;
the source of the transistor MOS9 is grounded.
6. The simple high-gain amplifier circuit as claimed in claim 1,
further comprising:
and one end of the capacitor C1 is connected with the signal input end of the amplifying unit, and the other end of the capacitor C1 is connected with the external output end of the signal to be amplified.
7. The simple high-gain amplifier circuit as set forth in claim 1, wherein: the holding signal output by the holding unit enables the voltage of the signal input end of the amplifying unit to be equal to the voltage of the signal output end before the signal to be amplified is input.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201811507742.8A CN109714008B (en) | 2018-12-11 | 2018-12-11 | Simple high-gain amplifying circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201811507742.8A CN109714008B (en) | 2018-12-11 | 2018-12-11 | Simple high-gain amplifying circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
CN109714008A CN109714008A (en) | 2019-05-03 |
CN109714008B true CN109714008B (en) | 2023-03-24 |
Family
ID=66256346
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201811507742.8A Active CN109714008B (en) | 2018-12-11 | 2018-12-11 | Simple high-gain amplifying circuit |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN109714008B (en) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106921349A (en) * | 2017-03-02 | 2017-07-04 | 中国电子科技集团公司第二十四研究所 | Amplifier based on inverter structure |
CN107104641A (en) * | 2017-02-20 | 2017-08-29 | 浙江大学 | The nerve signal single-ended amplifier of low-power consumption and low noise is realized simultaneously |
CN107852137A (en) * | 2015-05-18 | 2018-03-27 | 德克萨斯仪器股份有限公司 | Amplifier circuit and method for adaptive amplifier biasing |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3464372B2 (en) * | 1997-11-19 | 2003-11-10 | 日本プレシジョン・サーキッツ株式会社 | Oscillator |
KR100631973B1 (en) * | 2005-03-02 | 2006-10-11 | 삼성전기주식회사 | Variable gain broadband amplifier |
-
2018
- 2018-12-11 CN CN201811507742.8A patent/CN109714008B/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107852137A (en) * | 2015-05-18 | 2018-03-27 | 德克萨斯仪器股份有限公司 | Amplifier circuit and method for adaptive amplifier biasing |
CN107104641A (en) * | 2017-02-20 | 2017-08-29 | 浙江大学 | The nerve signal single-ended amplifier of low-power consumption and low noise is realized simultaneously |
CN106921349A (en) * | 2017-03-02 | 2017-07-04 | 中国电子科技集团公司第二十四研究所 | Amplifier based on inverter structure |
Also Published As
Publication number | Publication date |
---|---|
CN109714008A (en) | 2019-05-03 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP2630728B1 (en) | Switch used in programmable gain amplifilier and programmable gain amplifilier | |
JP2008067143A (en) | Differential amplifier circuit and sample-and-hold circuit | |
JP3731358B2 (en) | High frequency power amplifier circuit | |
CN109274340B (en) | Broadband limiting amplifier circuit | |
JP5239451B2 (en) | Differential single phase converter circuit | |
WO2023078064A1 (en) | Forward bias establishment accelerating circuit for radio frequency switch, and radio frequency switch | |
US6377120B1 (en) | Regulated-cascode amplifier with clamping circuit | |
CN112865763A (en) | Comparator with a comparator circuit | |
TWI416866B (en) | Low noise amplifier having improved linearity | |
CN109714008B (en) | Simple high-gain amplifying circuit | |
KR20030055758A (en) | Variable gain amplifier circuitry in automatic gain control | |
CN210578470U (en) | Comparator with a comparator circuit | |
CN111313871B (en) | Dynamic pre-amplification circuit and dynamic comparator | |
CN109861673B (en) | Current comparator | |
Goyal et al. | Analysis and design of a two stage cmos op-amp with 180nm using miller compensation technique | |
CN111030613B (en) | Radio frequency signal processing circuit and radio frequency front end unit | |
JP2018207205A (en) | High frequency amplifier circuit | |
CN104065352B (en) | Signal generating circuit | |
CN102055421A (en) | Differential to single-end amplifier with gain control | |
US9729117B2 (en) | System and method for leakage current control for programmable gain amplifiers | |
CN210864452U (en) | Direct current offset cancelling circuit | |
CN111103915A (en) | Direct current offset cancelling circuit | |
CN212435654U (en) | Variable gain amplifier suitable for biomedical signal acquisition analog front end | |
CN216216784U (en) | MOS (Metal oxide semiconductor) tube resistor for signal amplification and biasing circuit thereof | |
CN210693996U (en) | Envelope detection circuit |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |