CN111030613B - Radio frequency signal processing circuit and radio frequency front end unit - Google Patents
Radio frequency signal processing circuit and radio frequency front end unit Download PDFInfo
- Publication number
- CN111030613B CN111030613B CN201911163812.7A CN201911163812A CN111030613B CN 111030613 B CN111030613 B CN 111030613B CN 201911163812 A CN201911163812 A CN 201911163812A CN 111030613 B CN111030613 B CN 111030613B
- Authority
- CN
- China
- Prior art keywords
- circuit
- voltage
- transistor
- radio frequency
- pole
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/56—Modifications of input or output impedances, not otherwise provided for
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
Abstract
The embodiment of the application discloses radio frequency signal processing circuit and radio frequency front end unit, radio frequency signal processing circuit includes: the radio frequency power amplifier comprises a voltage conversion circuit, a switching circuit and a radio frequency power amplification circuit; the voltage conversion circuit is used for converting the voltage of an input enable signal into a first positive voltage or a first negative voltage; the switch circuit is controlled to be conducted according to the first positive voltage, or the switch circuit is controlled to be not conducted according to the first negative voltage; wherein the first positive voltage and the first negative voltage are in opposite phase; the switch circuit is used for controlling the radio frequency power amplifying circuit not to be in a working state when the switch circuit is conducted, and controlling the radio frequency power amplifying circuit to be in the working state when the switch circuit is not conducted; the radio frequency power amplifying circuit is used for amplifying the radio frequency signal input to the radio frequency power amplifying circuit and then outputting the amplified radio frequency signal.
Description
Technical Field
The present application relates to the field of radio frequency, and in particular, to a radio frequency signal processing circuit and a radio frequency front end unit.
Background
In a wireless communication system, a radio frequency power amplifying circuit is an important component of a radio frequency front end transmitting path, and meanwhile, in a circuit system, the power consumption of the radio frequency power amplifying circuit has a great influence on the service life of a battery of an electronic device. Therefore, how to reduce the power consumption of the rf power amplifier circuit in the wireless communication system has become a technical problem to be solved.
Disclosure of Invention
The embodiment of the application provides a radio frequency signal and a radio frequency front end circuit, which can reduce the power consumption of a radio frequency power amplifying circuit in a wireless communication system.
In order to achieve the above purpose, the technical solution of the embodiment of the present application is implemented as follows:
in a first aspect, an embodiment of the present application provides a radio frequency signal processing circuit, where the radio frequency signal processing circuit includes: the radio frequency power amplifier comprises a voltage conversion circuit, a switching circuit and a radio frequency power amplification circuit; wherein, the first and the second end of the pipe are connected with each other,
a voltage conversion circuit for converting a voltage of an input enable signal into a first positive voltage or a first negative voltage; the switch circuit is controlled to be conducted according to the first positive voltage, or the switch circuit is controlled to be not conducted according to the first negative voltage; wherein the first positive voltage and the first negative voltage have opposite phases;
the switch circuit is used for controlling the radio frequency power amplifying circuit not to be in a working state when the switch circuit is conducted, and controlling the radio frequency power amplifying circuit to be in the working state when the switch circuit is not conducted;
and the radio frequency power amplifying circuit is used for amplifying the radio frequency signal input to the radio frequency power amplifying circuit and then outputting the amplified radio frequency signal.
In some embodiments, the voltage conversion circuit includes: a level shift circuit and a voltage generation circuit; wherein the content of the first and second substances,
a level shift circuit for converting a voltage of an input enable signal into a second positive voltage or a second negative voltage, wherein the second positive voltage and the second negative voltage have opposite phases;
and the voltage generating circuit is used for converting the second positive voltage output by the level shifting circuit into a first positive voltage or converting the second negative voltage output by the level shifting circuit into a first negative voltage, wherein the amplitude of the first positive voltage is smaller than that of the second positive voltage.
In some embodiments, the level shift circuit outputs a second positive voltage when the voltage of the enable signal is a first voltage value;
when the voltage of the enable signal is a second voltage value, the level shift circuit outputs a second negative voltage.
In some embodiments, the voltage generation circuit comprises: the circuit comprises a first branch circuit, a second branch circuit, a voltage division circuit and a capacitor circuit; wherein the content of the first and second substances,
the input end of the first branch circuit is respectively connected with the voltage input end and the input end of the capacitor circuit, the output end of the first branch circuit is respectively connected with the input end and the voltage output end of the voltage division circuit, the input end of the second branch circuit is connected with the voltage input end, the output end of the second branch circuit is respectively connected with the input end and the voltage output end of the voltage division circuit, and the output end of the voltage division circuit is respectively connected with the output end and the ground of the capacitor circuit;
wherein, the voltage input end is connected with the output end of the level shift circuit; the voltage output end is connected with the input end of the switch circuit.
In some embodiments, the first leg comprises: a first transistor and a second transistor;
the second branch comprises a third transistor and a fourth transistor;
the voltage division circuit comprises a first resistor;
the capacitance circuit includes a first capacitance and a second capacitance.
In some embodiments, a first pole of the first transistor is coupled to the voltage input terminal and the first terminal of the first capacitor, respectively, and a third pole of the first transistor is coupled to the second pole of the first transistor and the first pole of the second transistor, respectively;
a third pole of the second transistor is respectively connected with a second pole of the second transistor, the voltage output end, a second end of the first capacitor and a first end of the first resistor;
the second end of the first capacitor is also connected with the first end of the second capacitor and the voltage output end, and the second end of the second capacitor is connected with the ground;
a first pole of the third transistor is respectively connected with the voltage input end, the first end of the first capacitor and a second pole of the third transistor, and a third pole of the third transistor is connected with a first pole of the fourth transistor;
the first pole of the fourth transistor is further connected with the second pole of the fourth transistor, the third pole of the fourth transistor is connected with the first end of the first resistor, the voltage output end and the second end of the first capacitor, and the second end of the first resistor is connected with the ground.
In some embodiments, a radio frequency power amplification circuit includes: a bias circuit, a power supply circuit, and an amplification circuit, wherein,
the input end of the amplifying circuit is respectively connected with the output end of the bias circuit, the output end of the power supply circuit and the input end of the radio frequency signal, the output end of the amplifying circuit is connected with the output end of the radio frequency signal, and the bias circuit is connected with the output end of the switch circuit;
and/or the switch circuit comprises a transistor, a filter circuit and a resistance circuit.
In some embodiments, the bias circuit includes a first bias circuit and a second bias circuit, and the amplification circuit includes a fifth transistor and a sixth transistor.
In some embodiments, the first bias circuit comprises a current circuit and a seventh transistor, the filter circuit comprises a second resistor and a third capacitor, the resistor circuit comprises a third resistor, and the transistor comprises an eighth transistor; wherein the content of the first and second substances,
the first end of the second resistor is connected with the output end of the voltage conversion circuit, the second end of the second resistor is respectively connected with the first end of the third capacitor and the first end of the third resistor, and the second end of the third capacitor is connected with the ground;
a first pole of a fifth transistor is connected with the ground, a second pole of the fifth transistor is respectively connected with the output end of the current circuit, the second pole of the seventh transistor, a third pole of the eighth transistor and the input end of the radio-frequency signal, and a third pole of the fifth transistor is connected with the first pole of the sixth transistor;
the first pole of the seventh transistor is connected with the ground, and the third pole of the seventh transistor is respectively connected with the output end of the current circuit and the second pole of the seventh transistor;
a second pole of the eighth transistor is connected with the first end of the third resistor, and a first pole of the eighth transistor is connected with the ground;
and a second pole of the sixth transistor is connected with the output end of the second biasing circuit, and a third pole of the sixth transistor is respectively connected with the output end of the power supply circuit and the output end of the radio-frequency signal.
In a second aspect, an embodiment of the present application provides a radio frequency front end unit, where the radio frequency front end unit includes the radio frequency signal processing circuit provided in any embodiment of the present application.
The radio frequency signal processing circuit provided in the above embodiment includes: the radio frequency power amplifier comprises a voltage conversion circuit, a switching circuit and a radio frequency power amplification circuit; the voltage conversion circuit is used for converting the voltage of an input enable signal into a first positive voltage or a first negative voltage; the switch circuit is controlled to be conducted according to a first positive voltage, or the switch circuit is controlled to be not conducted according to a first negative voltage; wherein the first positive voltage and the first negative voltage have opposite phases; the switch circuit is used for controlling the radio frequency power amplifying circuit not to be in a working state when the switch circuit is conducted, and controlling the radio frequency power amplifying circuit to be in the working state when the switch circuit is not conducted; and the radio frequency power amplifying circuit is used for amplifying the radio frequency signal input to the radio frequency power amplifying circuit and then outputting the radio frequency signal. Therefore, the voltage of the enabling signal is converted into the first positive voltage or the first negative voltage through the voltage conversion circuit, the switch circuit is controlled to be conducted through the first positive voltage, or the switch circuit is controlled to be not conducted through the negative voltage, and therefore the problem that when the swing amplitude of the input radio-frequency signal is too large, the switch circuit is temporarily conducted, the radio-frequency power amplifying circuit is not in the working state is solved, the accuracy of the enabling signal controlling the conduction state of the switch circuit is improved, and the accuracy of the radio-frequency power amplifying circuit in switching the working state is improved. Therefore, in a wireless communication system, when a transmitting-receiving channel is in a standby state, the radio-frequency power amplifying circuit can be quickly turned off by using the radio-frequency signal processing circuit, so that the purpose of reducing the power consumption of the radio-frequency power amplifying circuit is achieved.
Drawings
Fig. 1 is a schematic diagram of a structure of a radio frequency signal processing circuit provided in the prior art;
fig. 2 is a schematic diagram illustrating a structure of an rf signal processing circuit according to an embodiment of the present disclosure;
FIG. 3 is a schematic diagram illustrating a structure of a voltage converting circuit according to an embodiment of the present disclosure;
FIG. 4 is a schematic diagram illustrating a structure of a voltage generating circuit according to an embodiment of the present disclosure;
FIG. 5 is a schematic diagram of an electronic device of a voltage generating circuit according to an embodiment of the present disclosure;
fig. 6 is a schematic structural diagram of an rf power amplifier circuit according to an embodiment of the present application;
FIG. 7 is a schematic diagram illustrating a structure of a switch circuit according to an embodiment of the present application;
FIG. 8 is a schematic diagram of an electronic device of an RF signal processing circuit according to an embodiment of the present application;
fig. 9 is a signal waveform diagram of a voltage converting circuit according to an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the following detailed descriptions of the specific technical solutions will be made with reference to the accompanying drawings in the embodiments of the present application. The following examples are intended to illustrate the present application, but are not intended to limit the scope of the present application.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
Since wireless communication systems typically employ time division duplex mode, their signals are not transmitted and received continuously. Therefore, when the receiving and transmitting channel is in a standby state, the radio frequency power amplifying circuit can be switched off or on by controlling the switch, so that the purpose of reducing the power consumption of the system is achieved.
Generally, there are two ways to control whether the rf power amplifier circuit is in an operating state: one is to control the power supply of the power amplifier and the other is to control the bias of the power amplifier. The method for controlling the working state of the radio frequency power amplification circuit by controlling the power supply of the power amplifier has the following defects: on one hand, the time sequence requirement of the system for high-speed switching cannot be met, and on the other hand, more chip resources are occupied. However, the method for controlling the working state of the radio frequency power amplifying circuit by controlling the bias of the power amplifier can overcome the defects, the design is easy to realize, the switching speed is high, the time sequence requirement of high-speed switching is met, and meanwhile, the circuit does not occupy more area and power consumption.
In the embodiment of the present application, the radio frequency amplification circuit adopts a single-ended input/output cascode structure, and in practical application, the radio frequency amplification circuit can be extended to radio frequency amplification circuits with other structures, such as a differential structure with multiple-ended input/output, which belongs to a simple extension of the technical scheme of the present application and is also within the protection scope of the present application.
Fig. 1 is a radio frequency signal processing circuit provided in the prior art, and please refer to fig. 1, in the radio frequency signal processing circuit, a radio frequency power amplifying circuit of a cascode structure is formed by a fifth transistor M1 and a sixth transistor M2. The analog circuit supply voltage VBAT, the bias current Ibias and the seventh transistor M0 form a basic current mirror structure, the basic current mirror structure is adopted as a bias circuit, and is connected with the second pole of the fifth transistor M1 to provide a bias voltage for the fifth transistor M1, wherein the seventh transistor M0 converts the bias current Ibias into the bias voltage of the fifth transistor M1, so as to control the current of the fifth transistor M1, and further to make the current of the third pole of the sixth transistor M2 proportional to the bias current Ibias. Therefore, the current mirror structure is adopted, so that the output current of the radio frequency power amplifying circuit is not influenced by external factors, such as power supply voltage, temperature and process, and is only related to the bias current Ibias.
The eighth transistor M3 is used as a switch circuit for controlling the operating state of the rf power amplifying circuit, wherein a third pole of the eighth transistor M3 is connected to a node between the bias circuit and the second pole of the fifth transistor M1, a first pole of the eighth transistor M3 is connected to the ground, and the second pole of the eighth transistor M3 is connected to the enable signal input end through an inverter INV. Here, the voltage of the enable signal EN input to the enable signal input terminal is usually +1.8v to 0 v, and thus, when EN =0 v, after passing through the inverter INV, the voltage input to the second pole of the eighth transistor M3 is +1.8v, the eighth transistor M3 is turned on, and the second pole of the fifth transistor M1 is shorted to the ground, so that the rf power amplifying circuit is not in an operating state. When EN = +1.8V, after passing through the inverter INV, the voltage input to the second pole of the eighth transistor M3 is 0V, and the eighth transistor M3 is not turned on, so that the radio frequency power amplification circuit is in an operating state.
However, the second pole of the fifth transistor M1 is further connected to the input end of the radio frequency signal, and if the swing of the signal input by the input end RFIN of the radio frequency signal is large, the voltage of the third pole of the eighth transistor M3 may be changed into a negative voltage, so that even if the second pole of the eighth transistor M3 is 0 v, the eighth transistor M3 is still briefly turned on, so that the radio frequency power amplifying circuit is not in an operating state, and the switching state of the switch circuit cannot be normally controlled by the enable signal, and the operating state of the radio frequency power amplifying circuit cannot be correctly switched, which affects the communication performance of the wireless communication system.
It should be noted that, when the rf power amplifying circuit is in an operating state, the rf power amplifying circuit amplifies the rf signal input to the rf power amplifying circuit. The first Transistor M4, the second Transistor M5, the third Transistor M6, the fourth Transistor M7, the fifth Transistor M1, the sixth Transistor M2, the seventh Transistor M0, and the eighth Transistor M3 may be any type of symmetric transistors, and in this embodiment, the transistors are specifically Metal-Oxide-Semiconductor Field-Effect transistors (MOSFETs), but a technical solution of replacing MOSFETs with other symmetric transistors is also within the protection scope of this application. In addition, when the transistor is a MOSFET, a first pole of the transistor is a source of the MOSFET, a second pole of the transistor is a gate of the MOSFET, and a third pole of the transistor is a drain of the MOSFET.
In one aspect of the present embodiment, a radio frequency signal processing circuit is provided, and fig. 2 is a schematic structural diagram of the radio frequency signal processing circuit, please refer to fig. 2, the radio frequency signal processing circuit includes: a voltage conversion circuit 11, a switch circuit 12 and a radio frequency power amplification circuit 13.
The voltage conversion circuit 11 is configured to convert a voltage of an input enable signal into a first positive voltage or a first negative voltage; and controls the switch circuit 12 to be conducted according to the first positive voltage, or controls the switch circuit 12 not to be conducted according to the first negative voltage; wherein the first positive voltage and the first negative voltage have opposite phases.
Here, the input terminal of the voltage conversion circuit 11 is connected to the input terminal of the enable signal. The voltage conversion circuit 11 converts the voltage of the enable signal EN input from the input terminal of the enable signal into a first positive voltage or a first negative voltage, where the first positive voltage and the first negative voltage have opposite phases and may be the same or different in magnitude. The output terminal of the voltage conversion circuit 11 is connected to the input terminal of the switch circuit 12, and the voltage conversion circuit 11 controls the switch circuit 12 to be conductive according to the first positive voltage or controls the switch circuit 12 to be nonconductive according to the first negative voltage.
The switch circuit 12 is configured to control the radio frequency power amplifying circuit 13 not to be in a working state when the switch circuit 12 is turned on, and control the radio frequency power amplifying circuit 13 to be in the working state when the switch circuit 12 is turned off.
Here, the output terminal of the switching circuit 12 is connected to the input terminal of the radio frequency power amplifying circuit 13. The switch circuit 12 controls whether the radio frequency power amplifying circuit 13 is in a working state, specifically, when the switch circuit 12 is turned on, the radio frequency power amplifying circuit 13 is controlled not to be in the working state, and when the switch circuit 12 is turned off, the radio frequency power amplifying circuit 13 is controlled to be in the working state.
The rf power amplifying circuit 13 is configured to amplify and output an rf signal input to the rf power amplifying circuit 13.
Here, the input terminal of the rf power amplifying circuit 13 is further connected to the input terminal of the rf signal, and the output terminal of the rf power amplifying circuit 13 is connected to the output terminal of the rf signal. The rf power amplifier circuit 13 amplifies the rf signal input from the input terminal of the rf signal and outputs the amplified rf signal to the output terminal of the rf signal.
In the above embodiment, the voltage of the enable signal is converted into the first positive voltage or the first negative voltage by the voltage conversion circuit 11, and the switch circuit 12 is controlled to be turned on by the first positive voltage, or the switch circuit 12 is controlled to be turned off by the negative voltage, so that the problem that the switch circuit 12 is turned on briefly when the swing of the input radio frequency signal is too large, and the radio frequency power amplification circuit 13 is not in the working state is solved, so that the accuracy of controlling the conduction state of the switch circuit 12 by the enable signal is improved, and the accuracy of switching the working state of the radio frequency power amplification circuit 13 is improved. Therefore, in the wireless communication system, when the receiving and transmitting channel is in the standby state, the radio frequency power amplifying circuit 13 can be quickly turned off by using the radio frequency signal processing circuit, so that the purpose of reducing the power consumption of the radio frequency power amplifying circuit is achieved, meanwhile, the switching circuit 12 is adopted to control the radio frequency power amplifying circuit 13, the normal work of the radio frequency power amplifying circuit 13 cannot be influenced, and the chip area and the cost are reduced.
Fig. 3 is a schematic diagram illustrating a structure of a voltage converting circuit according to an embodiment of the present invention, referring to fig. 3, in some embodiments, the voltage converting circuit 11 includes: a level shift circuit 111 and a voltage generation circuit 112.
The level shift circuit 111 is configured to convert a voltage of an input enable signal into a second positive voltage or a second negative voltage, where the second positive voltage and the second negative voltage have opposite phases.
Here, an input terminal of the level shift circuit 111 is connected to an input terminal of an enable signal. The level shift circuit 111 converts the voltage of the enable signal EN input from the input terminal of the enable signal into a second positive voltage or a second negative voltage, where the second positive voltage and the second negative voltage have opposite phases and may be the same or different in magnitude.
In practical applications, the magnitudes of the second positive voltage and the second negative voltage output by the level shift circuit 111 are related to the voltage used by the rf switch in the amplifier chip constituting the rf signal processing circuit.
Specifically, when the voltage of the enable signal EN is a first voltage value, the level shift circuit outputs a second positive voltage; when the voltage of the enable signal EN is the second voltage value, the level shift circuit outputs the second negative voltage.
The voltage generating circuit 112 is used for converting the second positive voltage output by the level shifting circuit 111 into the first positive voltage, or converting the second negative voltage output by the level shifting circuit into the first negative voltage, wherein the amplitude of the first positive voltage is smaller than that of the second positive voltage.
Here, an input terminal of the voltage generation circuit 112 is connected to an output terminal of the level shift circuit 111. The voltage generation circuit 112 converts the second positive voltage output from the level shift circuit 111 into a first positive voltage, which has a smaller magnitude than the second positive voltage, or converts the second negative voltage output from the level shift circuit into a first negative voltage.
In the above embodiment, since the drain voltage of the transistor in the switch circuit 12 is a threshold voltage plus an overdrive voltage when the rf power amplifying circuit operates, when the switch circuit 12 is controlled by the second negative voltage, the gate-drain voltage of the transistor in the switch circuit 12 may exceed the withstand voltage of the transistor. Therefore, the input terminal of the voltage generation circuit 112 is connected to the output terminal of the level shift circuit 111, and the magnitude of the first positive voltage or the first negative voltage output from the level shift circuit 111 is reduced by the voltage generation circuit 112, so that when the switch circuit 12 is controlled with the first positive voltage and the first negative voltage, the voltage of the gate drain of the transistor in the switch circuit 12 does not exceed the withstand voltage of the transistor.
Fig. 4 is a schematic diagram illustrating a structure of a voltage generation circuit according to an embodiment of the present application, referring to fig. 4, in some embodiments, the voltage generation circuit 112 includes: a first branch 21, a second branch 22, a voltage divider circuit 23 and a capacitance circuit 24.
The input end of the first branch 21 is connected to the voltage input end and the input end of the capacitor circuit 24, the output end of the first branch 21 is connected to the input end and the voltage output end of the voltage divider circuit 23, the input end of the second branch 22 is connected to the voltage input end, the output end of the second branch 22 is connected to the input end and the voltage output end of the voltage divider circuit 23, and the output end of the voltage divider circuit 23 is connected to the output end and the ground of the capacitor circuit 24.
Wherein, the voltage input end is connected with the output end of the level shift circuit 111; the voltage output is connected to the input of the switching circuit 12.
In the above-described embodiment, the second positive voltage input from the voltage input terminal is converted into the first positive voltage and the second negative voltage is converted into the first negative voltage by the first branch 21, the second branch 22 and the voltage dividing circuit 23 in the voltage generating circuit 112, so that when the switch circuit 12 is controlled with the first negative voltage or the first positive voltage, the gate-drain voltage of the transistor in the switch circuit 12 does not exceed the withstand voltage of the transistor.
Fig. 5 is a schematic diagram illustrating a structure of an electronic device of a voltage generating circuit according to an embodiment of the present application, referring to fig. 5, in some embodiments, the first branch 21 includes: the first transistor M4 and the second transistor M5, the second branch 22 includes a third transistor M6 and a fourth transistor M7, the voltage divider circuit 23 includes a first resistor R3, and the capacitor circuit 24 includes a first capacitor C3 and a second capacitor C2.
In some embodiments, referring to fig. 5, a first pole of the first transistor M4 is connected to the voltage input terminal and the first terminal of the first capacitor C3, respectively, and a third pole of the first transistor M4 is connected to a second pole of the first transistor M4 and the first pole of the second transistor M5, respectively.
Here, a first pole of the first transistor M4 is connected to a node between the voltage input terminal and the first terminal of the first capacitor C3, and a second pole of the first transistor M4 is connected to a node between a third pole of the first transistor M4 and the first pole of the second transistor M5.
The third pole of the second transistor M5 is connected to the second pole of the second transistor M5, the voltage output terminal, the second terminal of the first capacitor C3, and the first terminal of the first resistor R3.
Specifically, the third pole of the second transistor M5 is connected to a node between the voltage output terminal and the first terminal of the first resistor R3, and is also connected to a node between the voltage output terminal and the second terminal of the first capacitor C3. The second pole of the second transistor M5 is connected to a node between the third pole of the second transistor M5 and the voltage output terminal.
The second end C3 of the first capacitor is further connected to the first end of the second capacitor C2 and the voltage output end, and the second end of the second capacitor C2 is connected to ground.
Specifically, the second terminal C3 of the first capacitor is connected to a node between the first terminal of the second capacitor C2 and the voltage output terminal. The second terminal of the second capacitor C2 is connected to a node between the second terminal of the first resistor R3 and ground. Thus, the first capacitor C3 is connected in series with the second capacitor C2 for providing a low-impedance path to the ground for the rf signal, and reducing the influence of the rf signal swing on the switch circuit.
A first pole of the third transistor M6 is connected to the voltage input terminal, the first end of the first capacitor C3, and a second pole of the third transistor M6, respectively, and a third pole of the third transistor M6 is connected to a first pole of the fourth transistor M7.
Specifically, the first pole of the third transistor M6 is connected to a node between the voltage input terminal and the first terminal of the first capacitor C3. The second pole of the third transistor M6 is coupled to a node between the first pole of the third transistor M6 and the voltage input terminal. A third pole of the third transistor M6 is connected to a first pole of the fourth transistor M7.
The first pole of the fourth transistor M7 is further connected to the second pole of the fourth transistor M7, the third pole of the fourth transistor M7 is connected to the first end of the first resistor R3, the voltage output end and the second end of the first capacitor (C3), and the second end of the first resistor R3 is connected to ground.
Specifically, the second pole of the fourth transistor M7 is connected to a node between the first pole of the fourth transistor M7 and the third pole of the third transistor M6. A third pole of the fourth transistor M7 is connected to a node between the voltage output terminal and the first terminal of the first resistor R3 and to a node between the voltage output terminal and the second terminal of the first capacitor C3.
It should be noted that, a MOSFET is abbreviated as a MOS transistor, and is generally a symmetric field effect transistor, and in most cases, the source and the drain of the MOS transistor are interchangeable and do not affect the performance of the device. Referring to fig. 5, since the second pole of the first transistor M4 is connected to the third pole, and the second pole of the second transistor M5 is connected to the third pole, the first transistor M4 and the second transistor M5 respectively form a diode connection. Meanwhile, since the second pole of the third transistor M6 is connected to the first pole and the second pole of the fourth transistor M7 is connected to the first pole, the third transistor M6 and the fourth transistor M7 constitute reverse diode connections, respectively.
When the voltage of the input signal Vin at the voltage input terminal is a second positive voltage, the first poles of the first transistor M4, the second transistor M5, the third transistor M6 and the fourth transistor M7, i.e., the poles close to the voltage input terminal, are all equivalent to drains. The third poles, i.e., the poles close to the ground, of the first transistor M4, the second transistor M5, the third transistor M6, and the fourth transistor M7 are all equivalent to sources. The second poles of the first transistor M4, the second transistor M5, the third transistor M6, and the fourth transistor M7 are all equivalent to gates. In this way, the source voltages of the first transistor M4 and the second transistor M5 are both higher than the gate voltage, and the first transistor M4 and the second transistor M5 are not turned on. However, the source voltages of the third transistor M6 and the fourth transistor M7 are both less than the gate voltage, and the third transistor M6 and the fourth transistor M7 are turned on. Assume that the on-resistances of the third transistor M6 and the fourth transistor M7 are R o6 、R o7 If the voltage of the input signal Vin at the voltage input terminal is a second positive voltage, wherein the second positive voltage is V 2 ，V 2 If the voltage is more than 0, the voltage of the output signal Vout of the voltage output end is a first positive voltage V 1 Wherein the voltage of the output signal Vout of the voltage output terminal is V 1 Expressed as:
therefore, if R is properly designed o6 、R o7 And R3, if the voltage of the input signal Vin at the voltage input end is a second positive voltage V 2 The voltage of the output signal Vout at the voltage output terminal may be an ideal first positive voltage V 1 。
When the voltage of the input signal Vin at the voltage input terminal is the second negative voltage, the first transistor M4 and the second transistor M are turned onThe first poles of the M5, the third M6 and the fourth M7 transistors, i.e. the poles close to the voltage input terminal, are all equivalent to sources. The third poles, i.e., the poles close to the ground, of the first transistor M4, the second transistor M5, the third transistor M6, and the fourth transistor M7 are all equivalent to drains, and the second poles of the first transistor M4, the second transistor M5, the third transistor M6, and the fourth transistor M7 are all equivalent to gates. In this way, the gate voltages of the first transistor M4 and the second transistor M5 are both higher than the source voltage, and the first transistor M4 and the second transistor M5 are turned on. However, the gate voltages of the third transistor M6 and the fourth transistor M7 are both less than the source voltage, and the third transistor M6 and the fourth transistor M7 are not turned on. Assume that the on-resistances of the first transistor M4 and the second transistor M5 are R o4 、R o5 If the voltage of the input signal Vin at the voltage input terminal is a second negative voltage, wherein the second negative voltage is V 4 ，V 4 If < 0, the voltage of the output signal Vout at the voltage output terminal is the first negative voltage V 3 Wherein the voltage of the output signal Vout at the voltage output terminal is V 3 Expressed as:
therefore, if Ro4, ro5 and R3 are reasonably designed, the voltage of the input signal Vin at the voltage input terminal is the second negative voltage V 4 The voltage of the output signal Vout at the voltage output terminal may be the desired first negative voltage V 3 And a first positive voltage V 1 And a first negative voltage V 3 Is opposite in phase, a first positive voltage V 1 And a first negative voltage V 3 May be the same or different.
In the embodiment of the present application, the second poles of the first transistor M4 and the second transistor M5 in the first branch 21 are both connected to the respective third poles, and the first branch 21 is connected in series with the voltage dividing circuit 23, so that when the voltage of the input signal Vin at the voltage input terminal is a second positive voltage, the voltage generating circuit 112 outputs the first positive voltage. And, the second poles of the third transistor M6 and the fourth transistor M7 in the second branch 22 are connected to the respective first poles, and the second branch 22 is connected to the series of the voltage dividing circuit 23, so that when the voltage of the input signal Vin at the voltage input terminal is the second negative voltage, the voltage generating circuit 112 outputs the first negative voltage. And, through the capacitive circuit, provide a low impedance route to ground for the radio frequency signal, weaken the influence of radio frequency signal swing to switching circuit 12.
Fig. 6 is a schematic diagram illustrating a structure of an rf power amplifier circuit according to an embodiment of the present application, please refer to fig. 6, in some embodiments, the rf power amplifier circuit 13 includes: a bias circuit 131, a power supply circuit 132, and an amplification circuit 133.
Wherein, the input terminal of the amplifying circuit 133 is respectively connected to the output terminal of the bias circuit 131, the output terminal of the power circuit 132 and the input terminal RFIN of the radio frequency signal, the output terminal of the amplifying circuit 133 is connected to the output terminal RFOUT of the radio frequency signal, and the bias circuit 131 is connected to the output terminal of the switch circuit 12.
Here, the power supply circuit 132 includes a supply voltage of the amplification circuit. The bias circuit 131 is used to provide a bias voltage to the amplifying circuit 133. The input terminal RFIN of the radio frequency signal is used to input the radio frequency signal to the amplification circuit 133. The amplifying circuit 133 is used to amplify an input radio frequency signal. The output end RFOUT of the rf signal is used for outputting the rf signal amplified by the amplifying circuit.
Fig. 7 is a schematic diagram of a composition structure of a switch circuit in an embodiment of the present application, and in some embodiments, please refer to fig. 7, the switch circuit 12 includes a transistor 123, a filter circuit 121, and a resistor circuit 122.
Here, the input terminal of the filter circuit 121 is connected to the output terminal of the voltage conversion circuit 11, the output terminal of the filter circuit 121 is connected to the input terminal of the resistor circuit 122, the output terminal of the resistor circuit 122 is connected to the second pole of the transistor 123, the third pole of the transistor 123 is connected to the input terminal of the radio frequency power amplification circuit 13, and the first pole of the transistor 123 is connected to the ground. In this way, the resistance circuit 122 makes the second pole of the transistor 123 high-impedance, and the voltage output by the voltage conversion circuit 11 is connected to the second pole of the transistor 123 through the filter circuit 121, so that the potential of the second pole of the transistor 123 follows the radio frequency swing to some extent, and the risk of overvoltage is further reduced.
Fig. 8 is a schematic diagram of an electronic device structure of an rf signal processing circuit according to an embodiment of the present disclosure, please refer to fig. 8, in some embodiments, the bias circuit 131 includes a first bias circuit 1311 and a second bias circuit 1312, and the amplifying circuit 133 includes a fifth transistor M1 and a sixth transistor M2.
Wherein a first pole of the fifth transistor M1 is connected to ground, a second pole of the fifth transistor M1 is respectively connected to the output terminal of the first bias circuit 1311, the output terminal of the switch circuit 12 and the input terminal RFIN of the radio frequency signal, and a third pole of the fifth transistor M1 is connected to the first pole of the sixth transistor M2.
Here, the second pole of the fifth transistor M1 is connected to a node between the first bias circuit 1311 and the input terminal RFIN of the radio frequency signal. The second pole of the fifth transistor M1 is also connected to a node between the input terminal RFIN of the radio frequency signal and the output terminal of the switch circuit 12. The first pole of the fifth transistor M1 is connected to ground. The third pole of the five transistor M1 is connected to the first pole of the sixth transistor M2.
Wherein the second pole of the sixth transistor M2 is connected to the output terminal of the second bias circuit 1312, and the third pole of the sixth transistor M2 is respectively connected to the output terminal of the power circuit 133 and the output terminal RFOUT of the radio frequency signal.
Here, the second bias circuit 1312 includes a bias voltage Vbias for providing a bias voltage to the second pole of the sixth transistor M2. The power supply circuit 132 includes a VCC (Voltage Collector supply Voltage) for supplying a power supply Voltage to the amplification circuit. A third pole of the sixth transistor M2 is connected to a node between the output terminal of the power circuit 133 and the output terminal RFOUT of the radio frequency signal.
It should be noted here that the amplifying circuit may also adopt a cascode-structured amplifying circuit stacked by more levels of transistors, and the number of transistors in the amplifying circuit is not limited here.
In some embodiments, referring to fig. 8, the first bias circuit 1311 includes a current circuit and a seventh transistor M0, the filter circuit 121 includes a second resistor R1 and a third capacitor C1, the resistor circuit 122 includes a third resistor R2, and the transistor 123 includes an eighth transistor M3.
A first end of the second resistor R1 is connected to an output end of the voltage conversion circuit 11, a second end of the second resistor R1 is connected to a first end of the third capacitor C1 and a first end of the third resistor R2, respectively, and a second end of the third capacitor C1 is connected to ground.
Here, the second terminal of the second resistor R1 is connected to a node between the first terminal of the third capacitor C1 and the first terminal of the third resistor R2, and the second terminal of the third capacitor C1 is connected to ground.
A first pole of the fifth transistor M1 is connected to ground, a second pole of the fifth transistor M1 is connected to the output terminal of the current circuit, the second pole of the seventh transistor M0, a third pole of the eighth transistor M3, and the input terminal RFIN of the radio frequency signal, respectively, and a third pole of the fifth transistor M1 is connected to the first pole of the sixth transistor M2.
Here, the first pole of the fifth transistor M1 is connected to ground. The second pole of the fifth transistor M1 is connected to a node between the output terminal of the current circuit and the second pole of the seventh transistor M0. The second pole of the fifth transistor M1 is also connected to a node between the second pole of the seventh transistor M0 and the second pole of the seventh transistor M0. The second pole of the fifth transistor M1 is also connected to a node between the second pole of the seventh transistor M0 and the third pole of the eighth transistor M3. A third pole of the fifth transistor M1 is connected to the first pole of the sixth transistor M2.
A first pole of the seventh transistor M0 is connected to ground, and a third pole of the seventh transistor M0 is connected to the output terminal of the current circuit and the second pole of the seventh transistor M0, respectively.
Here, the second pole of the seventh transistor M0 is connected to the output terminal of the current circuit, and the third pole of the seventh transistor M0 is connected to a node between the output terminal of the current circuit and the second pole of the seventh transistor M0, and specifically, the current circuit includes the analog circuit supply voltage VBAT and the bias current Ibias. Thus, the current circuit and the seventh transistor form a basic current mirror structure, so that the output current of the rf power amplifier circuit 13 is not affected by external factors.
Wherein, the second pole of the eighth transistor M3 is connected to the first end of the third resistor R2. The first pole of the eighth transistor M3 is connected to ground.
Here, the second pole of the eighth transistor M3 is connected to the first terminal of the third resistor R2. In this way, the second pole of the eighth transistor M3 forms a high resistance. A third pole of the eighth transistor M3 is connected to a node between the second pole of the fifth transistor M1 and the input terminal RFIN of the radio frequency signal. In this way, the bias voltage of the second pole of the fifth transistor M1 is controlled according to the on state of the eighth transistor M3, so as to control the operating state of the rf power amplifying circuit 13.
The second pole of the sixth transistor M2 is connected to the output terminal of the second bias circuit, and the third pole of the sixth transistor M2 is connected to the output terminal of the power supply circuit and the output terminal of the radio frequency signal, respectively.
Here, the power supply circuit includes VCC. A second pole of the sixth transistor M2 is connected to the output terminal of the second bias circuit, and a third pole of the sixth transistor M2 is connected to a node between the output terminal of the power supply circuit and the output terminal of the radio frequency signal.
In the above embodiment, the switch circuit 12 is connected to the bias circuit 131 of the rf power amplifier circuit 13, and controls the conducting state of the switch circuit 12, so as to control the state that the second pole of the fifth transistor M1 in the amplifier circuit 133 is grounded, and further control whether the rf amplifier circuit is in the operating state. Therefore, the radio frequency power amplifying circuit 13 can be quickly turned off, the purpose of reducing the power consumption of the radio frequency power amplifying circuit is achieved, meanwhile, the switching circuit 12 is adopted to control the radio frequency power amplifying circuit 13, the normal work of the radio frequency power amplifying circuit 13 cannot be influenced, and the chip area and the cost are reduced.
In some embodiments, referring to fig. 8, the voltage converting circuit 11 includes: a level shift circuit 111 and a voltage generation circuit 112.
Here, the Voltage of the enable signal EN input at the enable signal input terminal is a, and if the Voltage a is DVDD (Digital Voltage Drain), the level shift circuit 111 converts the Voltage a of the enable signal EN into a second Negative Voltage, which is VNEG (Negative Voltage). When the Voltage a of the enable signal EN is 0 v, the level shift circuit 111 converts the Voltage a of the enable signal EN into a second positive Voltage, where the second positive Voltage is NVDD (Negative Voltage generator of Voltage Drain, power supply Voltage of the Negative Voltage generation circuit).
It should be noted that VNEG and NVDD are respectively a negative voltage and a positive voltage matched by the level shift circuit.
The output terminal of the level shift circuit 111 is connected to the voltage input terminal, and the voltage input terminal is connected to the input terminal of the voltage generation circuit 112. The output terminal of the voltage generation circuit 112 is connected to the voltage output terminal.
Here, when the output terminal of the level shift circuit 111 outputs VNEG, that is, when the voltage of the input signal Vin at the voltage input terminal is VNEG, the voltage output by the output terminal of the voltage generation circuit 112 is a first negative voltage, that is, the voltage of the output signal Vout at the voltage output terminal is a first negative voltage. If the output terminal of the level shift circuit 111 outputs NVDD, that is, the voltage of the input signal Vin at the voltage input terminal is NVDD, the voltage output by the output terminal of the voltage generation circuit 112 is a first positive voltage, that is, the voltage of the output signal Vout at the voltage output terminal is a first positive voltage.
For example, in practical applications, the rf signal processing circuit is generally formed by a power amplifier chip or a low noise amplifier chip, and the rf switch in the chip generally uses a positive voltage of +2.5V and a negative voltage of-2.5V. Therefore, when the rf power amplifying circuit is in operation, the gate voltage of the fifth transistor M1 is the threshold voltage plus an overdrive voltage, which is about 700 mv, and if the eighth transistor M3 is turned off by a voltage of-2.5V, wherein the eighth transistor M3 is a 2.5V transistor, the gate-drain voltage of M3 exceeds the withstand voltage of the transistor. In order that the voltage value output by the voltage conversion circuit does not exceed the withstand voltage of the transistor, therefore, the magnitudes of the first positive voltage and the first negative voltage do not exceed 1.5. Here, DVDD is +1.8 volts, NVDD is +2.5 volts, and VENG is-2.5 volts. Fig. 9 is a schematic signal waveform diagram of a voltage converting circuit according to an embodiment of the present application, please refer to fig. 9. If the voltage of the enable signal EN input at the enable signal input terminal is DVDD, i.e., +1.8 volts, the level shift circuit 111 outputs a second negative voltage, where the second negative voltage is VNEG, i.e., the voltage of the signal Vin at the voltage input terminal is-2.5 volts, and the output terminal of the voltage generation circuit 112 outputs a first negative voltage, where the first negative voltage is-1.5 volts, i.e., the voltage of the output signal Vout at the voltage output terminal is-1.5 volts. If the voltage of the enable signal EN input from the enable signal input terminal is 0 v, the level shift circuit 111 outputs a second positive voltage, wherein the second positive voltage is NVDD, i.e. the voltage of the input signal Vin at the voltage input terminal is-2.5 v, and the output terminal of the voltage generation circuit 112 outputs a first positive voltage, wherein the first positive voltage is +1.5 v, i.e. the voltage of the output signal Vout at the voltage output terminal is +1.5 v. In this way, when the voltage of the output signal Vout at the voltage output terminal is +1.5 v, the input voltage of the switch circuit 12 is +1.5 v, so that if the eighth transistor M3 in the switch circuit 12 is turned on, the second pole of the fifth transistor M1 in the amplifier circuit 133 is shorted to the ground, so that the rf power amplifier circuit 13 is not in an operating state.
In one aspect of the embodiments of the present application, a radio frequency front end unit is provided, where the radio frequency front end unit includes a radio frequency signal processing circuit provided in any one of the embodiments of the present application.
The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily think of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. The scope of protection of this application shall be governed by the scope of protection of the claims.
Claims (11)
1. A radio frequency signal processing circuit, characterized in that the radio frequency signal processing circuit comprises: the radio frequency power amplifier comprises a voltage conversion circuit, a switching circuit and a radio frequency power amplifying circuit; wherein the content of the first and second substances,
the voltage conversion circuit is used for converting the voltage of the input enable signal into a first positive voltage or a first negative voltage; the switch circuit is controlled to be conducted according to the first positive voltage, or the switch circuit is controlled to be not conducted according to the first negative voltage; wherein the first positive voltage and the first negative voltage are in opposite phase;
the switch circuit is used for controlling the radio frequency power amplifying circuit not to be in a working state when the switch circuit is conducted, and controlling the radio frequency power amplifying circuit to be in the working state when the switch circuit is not conducted;
the radio frequency power amplifying circuit is used for amplifying the radio frequency signal input to the radio frequency power amplifying circuit and then outputting the amplified radio frequency signal;
the voltage conversion circuit includes: a level shift circuit and a voltage generation circuit; wherein, the first and the second end of the pipe are connected with each other,
the level shift circuit is used for converting the voltage of the input enable signal into a second positive voltage or a second negative voltage, wherein the second positive voltage and the second negative voltage have opposite phases;
the voltage generating circuit is used for converting the second positive voltage output by the level shifting circuit into the first positive voltage or converting the second negative voltage output by the level shifting circuit into the first negative voltage, wherein the amplitude of the first positive voltage is smaller than that of the second positive voltage.
2. The radio frequency signal processing circuit according to claim 1,
when the voltage of the enable signal is a first voltage value, the level shift circuit outputs the second positive voltage;
when the voltage of the enable signal is a second voltage value, the level shift circuit outputs the second negative voltage.
3. The radio frequency signal processing circuit according to claim 1, wherein the voltage generating circuit comprises: the circuit comprises a first branch circuit, a second branch circuit, a voltage division circuit and a capacitor circuit; wherein, the first and the second end of the pipe are connected with each other,
the input end of the first branch circuit is respectively connected with a voltage input end and the input end of the capacitor circuit, the output end of the first branch circuit is respectively connected with the input end and the voltage output end of the voltage division circuit, the input end of the second branch circuit is connected with the voltage input end, the output end of the second branch circuit is respectively connected with the input end and the voltage output end of the voltage division circuit, and the output end of the voltage division circuit is respectively connected with the output end and the ground of the capacitor circuit;
the voltage input end is connected with the output end of the level shift circuit; the voltage output end is connected with the input end of the switch circuit.
4. The radio frequency signal processing circuit of claim 3, wherein the first branch comprises: a first transistor and a second transistor;
the second branch comprises a third transistor and a fourth transistor;
the voltage division circuit comprises a first resistor;
the capacitance circuit includes a first capacitance and a second capacitance.
5. The radio frequency signal processing circuit according to claim 4,
a first pole of the first transistor is respectively connected with the voltage input end and a first end of the first capacitor, and a third pole of the first transistor is respectively connected with a second pole of the first transistor and a first pole of the second transistor;
a third pole of the second transistor is respectively connected with a second pole of the second transistor, the voltage output end, a second end of the first capacitor and a first end of the first resistor;
the second end of the first capacitor is also connected with the first end of the second capacitor and the voltage output end, and the second end of the second capacitor is connected with the ground;
a first pole of the third transistor is connected to the voltage input terminal, the first end of the first capacitor, and the second pole of the third transistor, respectively, and a third pole of the third transistor is connected to the first pole of the fourth transistor;
the first pole of the fourth transistor is further connected with the second pole of the fourth transistor, the third pole of the fourth transistor is connected with the first end of the first resistor, the voltage output end and the second end of the first capacitor, and the second end of the first resistor is connected with the ground.
6. The radio frequency signal processing circuit of claim 1, wherein the radio frequency power amplification circuit comprises: a bias circuit, a power supply circuit, and an amplification circuit, wherein,
the input end of the amplifying circuit is respectively connected with the output end of the bias circuit, the output end of the power supply circuit and the input end of the radio frequency signal, the output end of the amplifying circuit is connected with the output end of the radio frequency signal, and the bias circuit is connected with the output end of the switch circuit.
7. The rf signal processing circuit of claim 1, wherein the switch circuit comprises a transistor and a resistor circuit, an input terminal of the resistor circuit is connected to an output terminal of the voltage converting circuit, and an output terminal of the resistor circuit is connected to the second pole of the transistor.
8. The radio frequency signal processing circuit according to claim 7, wherein the switching circuit further includes a filter circuit, and the resistance circuit is connected to the voltage conversion circuit through the filter circuit.
9. The radio frequency signal processing circuit according to claim 6, wherein the bias circuit includes a first bias circuit and a second bias circuit, and the amplification circuit includes a fifth transistor and a sixth transistor.
10. The radio frequency signal processing circuit according to any one of claims 6 to 9, wherein the first bias circuit includes a current circuit and a seventh transistor, the filter circuit includes a second resistor and a third capacitor, the resistor circuit includes a third resistor, and the transistor includes an eighth transistor; wherein, the first and the second end of the pipe are connected with each other,
the first end of the second resistor is connected with the output end of the voltage conversion circuit, the second end of the second resistor is respectively connected with the first end of the third capacitor and the first end of the third resistor, and the second end of the third capacitor is connected with the ground;
a first pole of a fifth transistor is connected with the ground, a second pole of the fifth transistor is respectively connected with the output end of the current circuit, the second pole of the seventh transistor, the third pole of the eighth transistor and the input end of the radio frequency signal, and the third pole of the fifth transistor is connected with the first pole of a sixth transistor;
a first pole of the seventh transistor is connected with the ground, and a third pole of the seventh transistor is respectively connected with the output end of the current circuit and a second pole of the seventh transistor;
a second pole of the eighth transistor is connected with the first end of the third resistor, and a first pole of the eighth transistor is connected with the ground;
and a second pole of the sixth transistor is connected with the output end of the second bias circuit, and a third pole of the sixth transistor is respectively connected with the output end of the power supply circuit and the output end of the radio-frequency signal.
11. A radio frequency front end unit, characterized in that it comprises a radio frequency signal processing circuit according to any of claims 1 to 10.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911163812.7A CN111030613B (en) | 2019-11-25 | 2019-11-25 | Radio frequency signal processing circuit and radio frequency front end unit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911163812.7A CN111030613B (en) | 2019-11-25 | 2019-11-25 | Radio frequency signal processing circuit and radio frequency front end unit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN111030613A CN111030613A (en) | 2020-04-17 |
| CN111030613B true CN111030613B (en) | 2023-01-31 |
Family
ID=70206356
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201911163812.7A Active CN111030613B (en) | 2019-11-25 | 2019-11-25 | Radio frequency signal processing circuit and radio frequency front end unit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN111030613B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115857603B (en) * | 2022-12-26 | 2023-09-01 | 成都仕芯半导体有限公司 | Radio frequency control circuit, control method and control equipment of variable reference voltage |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102142819A (en) * | 2011-03-04 | 2011-08-03 | 惠州市正源微电子有限公司 | Radio frequency power amplifier based on transformer |
| WO2012025066A1 (en) * | 2010-08-27 | 2012-03-01 | 华为终端有限公司 | Method and device for controlling signal transmission of radio frequency power amplifier |
| CN102403990A (en) * | 2010-09-14 | 2012-04-04 | 瑞萨电子株式会社 | Radio frequency module |
| CN109818588A (en) * | 2017-11-21 | 2019-05-28 | 锐迪科微电子（上海）有限公司 | A kind of radio-frequency power amplifier mould group |
-
2019
- 2019-11-25 CN CN201911163812.7A patent/CN111030613B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2012025066A1 (en) * | 2010-08-27 | 2012-03-01 | 华为终端有限公司 | Method and device for controlling signal transmission of radio frequency power amplifier |
| CN102403990A (en) * | 2010-09-14 | 2012-04-04 | 瑞萨电子株式会社 | Radio frequency module |
| CN102142819A (en) * | 2011-03-04 | 2011-08-03 | 惠州市正源微电子有限公司 | Radio frequency power amplifier based on transformer |
| CN109818588A (en) * | 2017-11-21 | 2019-05-28 | 锐迪科微电子（上海）有限公司 | A kind of radio-frequency power amplifier mould group |
Non-Patent Citations (1)
| Title |
|---|
| Volumetric intracardiac imaging using a fully integrated CMUT ring array Recent developments;Azadeh Moini等;《2011 IEEE International Ultrasonics Symposium》;20120905;全文 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN111030613A (en) | 2020-04-17 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8106711B2 (en) | Stacked pre-driver amplifier | |
| US7659754B2 (en) | CMOS power switching circuit usable in DC-DC converter | |
| US8410854B2 (en) | Semiconductor integrated circuit device | |
| US10637418B2 (en) | Stacked power amplifiers using core devices | |
| JP2008199493A (en) | Pulse detection circuit, envelope detection circuit, electronic device, and pulse detection method | |
| US8054122B2 (en) | Analog switch with a low flatness operating characteristic | |
| US5517148A (en) | Low current differential level shifter | |
| CN110729995A (en) | Level conversion circuit and level conversion method | |
| TWI516021B (en) | Radio frequency power amplifier with no reference voltage for biasing and electronic system | |
| CN102354241A (en) | Voltage/current conversion circuit | |
| US7982525B2 (en) | Systems and methods for driving high power stages using lower voltage processes | |
| CN111030613B (en) | Radio frequency signal processing circuit and radio frequency front end unit | |
| US8890612B2 (en) | Dynamically biased output structure | |
| US7295042B2 (en) | Buffer | |
| US20110156673A1 (en) | Internal power generating circuit and semiconductor device including the same | |
| KR101070118B1 (en) | Analog circuit with improved response speed feature | |
| CN111313871A (en) | Dynamic pre-amplifying circuit and dynamic comparator | |
| CN110350880A (en) | A kind of Novel ultra wide band operational amplifier | |
| CN206698188U (en) | The amplifier of low-voltage high linearity | |
| US20090167361A1 (en) | High-speed amplitude detector with a digital output | |
| US20080191920A1 (en) | Low-voltage drop reference generation circuit for A/D converter | |
| CN102055421A (en) | Differential to single-end amplifier with gain control | |
| JP2012114610A (en) | Electronic circuit | |
| US6570450B2 (en) | Efficient AC coupled CMOS RF amplifier | |
| US11848649B2 (en) | Low power VB class AB amplifier with local common mode feedback |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| CB02 | Change of applicant information | ||
| CB02 | Change of applicant information |
Address after: 510663 8th floor, building C2, Chuangxin building, No. 182, Kexue Avenue, Huangpu District, Guangzhou, Guangdong Applicant after: Guangzhou Huizhi Microelectronics Co.,Ltd. Address before: 510663 unit c3-802, innovation building, 182 science Avenue, Science City, Guangzhou high tech Industrial Development Zone, Guangdong Province Applicant before: SMARTER MICROELECTRONICS (GUANG ZHOU) Co.,Ltd. |
|
| GR01 | Patent grant | ||
| GR01 | Patent grant |