CN109585310B - Semiconductor structure and forming method thereof - Google Patents

Semiconductor structure and forming method thereof Download PDF

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Publication number
CN109585310B
CN109585310B CN201710896967.6A CN201710896967A CN109585310B CN 109585310 B CN109585310 B CN 109585310B CN 201710896967 A CN201710896967 A CN 201710896967A CN 109585310 B CN109585310 B CN 109585310B
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device wafer
layer
forming
adhesive
sticking
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CN109585310A (en
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付俊
陈福成
施林波
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Semiconductor Manufacturing International Shanghai Corp
Semiconductor Manufacturing International Beijing Corp
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Semiconductor Manufacturing International Shanghai Corp
Semiconductor Manufacturing International Beijing Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67132—Apparatus for placing on an insulating substrate, e.g. tape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157—Partial encapsulation or coating
    • H01L23/3185—Partial encapsulation or coating the coating covering also the sidewalls of the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68381—Details of chemical or physical process used for separating the auxiliary support from a device or wafer
    • H01L2221/68386—Separation by peeling

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

A semiconductor structure and a forming method thereof are provided, wherein the forming method comprises the following steps: providing a device wafer and a bearing substrate; forming an anti-sticking layer on the surface of the device wafer at the edge area; forming an adhesive glue on the central area and the anti-sticking layer, wherein the adhesive force between the adhesive glue and the anti-sticking layer is smaller than the adhesive force between the adhesive glue and the device wafer; carrying out bonding treatment on the device wafer and the bearing substrate to enable the adhesive to be bonded with the bearing surface of the bearing substrate; and removing the adhesive glue. The adhesion force between the adhesive glue and the anti-sticking layer is smaller than the adhesion force between the adhesive glue and the device wafer. In the process of removing the bonding glue, the bonding glue at the edge area is easier to remove, and the stress generated on the edge area of the device wafer is smaller, so that the device wafer is not easy to damage.

Description

Semiconductor structure and forming method thereof
Technical Field
The present invention relates to the field of semiconductor manufacturing technologies, and in particular, to a semiconductor structure and a method for forming the same.
Background
Semiconductor manufacturing technology is constantly evolving and requires that standard semiconductor and packaging processing equipment can handle and process thin substrates, even flexible substrates. Handheld consumer electronics products, such as: the size and shape of the devices driven by mobile phones, music players, cameras and game systems are continuously reduced. Thinning device wafers has been a great trend to meet the manufacturing needs of these products. Through-silicon-via (TSV) technology has been proposed to further reduce the area of the package, increase the capacity and increase the functionality, but ultra-thin device wafers are flexible and fragile, and are prone to warpage and waviness, and therefore, a support system is needed to make processing of TSV technology on conventional equipment feasible.
In order to reduce the warpage and undulation of the ultrathin device wafer in the thinning process, one scheme is as follows: bonding the device wafer to a rigid bearing substrate and then thinning the wafer; after thinning, the device wafer is separated from the carrier substrate by debonding.
However, the prior art is prone to damage to the device wafer edge when debonded.
Disclosure of Invention
The invention provides a semiconductor structure and a forming method thereof, which can reduce the damage of a device wafer and improve the performance of the formed semiconductor structure.
In order to solve the above problems, an embodiment of the present invention provides a method for forming a semiconductor structure, including: providing a device wafer and a carrier substrate, wherein the device wafer comprises opposite thinning surfaces and a back surface, the back surface comprises a central area and an edge area surrounding the central area, and the carrier substrate comprises a carrying surface; forming an anti-sticking layer on the surface of the edge region; forming an adhesive glue on the central area and the surface of the anti-sticking layer, wherein the adhesive force between the adhesive glue and the anti-sticking layer is smaller than the adhesive force between the adhesive glue and the device wafer; carrying out bonding treatment on the device wafer and the bearing substrate to enable the adhesive to be bonded with the bearing surface of the bearing substrate; after the bonding treatment, thinning the thinned surface of the device wafer; after the thinning treatment, removing the bearing substrate; and removing the adhesive glue after removing the bearing substrate.
Optionally, the material of the device wafer includes silicon, germanium, silicon germanium or silicon carbide.
Optionally, the step of forming the release layer includes: forming initial anti-sticking layers on the central region device wafer and the edge region device wafer; and removing the initial anti-adhesion layer of the central area to form the anti-adhesion layer.
Optionally, before forming the initial release layer, the method further includes: forming an isolation layer on the surface of the device wafer in the central area; the initial anti-sticking layer is positioned on the surfaces of the isolation layer and the edge region device wafer, and the adhesion force between the initial anti-sticking layer and the isolation layer is smaller than that between the initial anti-sticking layer and the device wafer.
Optionally, the isolation layer is made of polyimide or a photoresist material.
Optionally, the step of removing the initial release layer of the central region comprises: and baking the initial anti-sticking layer to decompose the initial anti-sticking layer in the central area.
Optionally, the baking temperature is 350-450 ℃.
Optionally, after forming the anti-adhesion layer and before performing the attaching process, the method further includes: and removing the isolation layer.
Optionally, the step of removing the initial release layer of the central region comprises: forming a pattern layer on the initial anti-sticking layer at the edge region; and etching the initial anti-sticking layer by taking the pattern layer as a mask, and removing the initial anti-sticking layer in the central area to form the anti-sticking layer.
Optionally, the anti-sticking layer is made of perfluorododecyl trichlorosilane, perfluorooctyl trichlorosilane, tetrahydrooctyl triethoxysilane, or tetrahydrooctyl methyldichlorosilane.
Optionally, the thickness of the anti-sticking layer is 1nm to 5 nm.
Optionally, the thickness of the adhesive glue is 9 μm to 11 μm.
Optionally, the step of removing the adhesive glue includes: sticking an adhesive tape on the surface of the adhesive; and tearing the adhesive through the adhesive tape to separate the adhesive from the device wafer.
Optionally, the device wafer is circular, the central area is circular, the edge area is circular, and the ratio of the radius of the device wafer to the radius of the central area is 0.94-0.98.
Optionally, the process for forming the anti-adhesion layer includes: a spray coating process, a spin coating process, or a gas phase self-assembled monolayer coating process.
Optionally, after removing the adhesive glue, removing the anti-sticking layer is further included.
Optionally, the process for removing the anti-adhesion layer includes: and heating the anti-sticking layer to decompose the anti-sticking layer.
The technical solution of the present invention also provides a semiconductor structure, including: a device wafer comprising opposing thinned and backside surfaces, the backside surface comprising a central region and an edge region surrounding the central region; and the anti-sticking layer is positioned on the surface of the device wafer at the edge area.
Optionally, the anti-sticking layer is made of perfluorododecyl trichlorosilane, perfluorooctyl trichlorosilane, tetrahydrooctyl triethoxysilane, or tetrahydrooctyl methyldichlorosilane.
Optionally, the thickness of the anti-sticking layer is 1nm to 5 nm.
Compared with the prior art, the technical scheme of the invention has the following advantages:
in the forming method of the semiconductor structure provided by the technical scheme of the invention, before the adhesive glue is formed, an anti-sticking layer is formed on the surface of the device wafer at the edge area. Because the adhesion force between the adhesive glue and the anti-sticking layer is smaller than that between the adhesive glue and the device wafer, the adhesive glue at the edge area is easier to remove in the process of removing the adhesive glue, and the stress generated on the edge area of the device wafer is smaller, so that the edge area of the device wafer is not easy to damage. When the device wafer is subjected to external force, the central area of the device wafer is not easily damaged due to stress concentration. Therefore, the forming method can improve the performance of the formed semiconductor structure.
Further, the anti-sticking layer is only located at the edge region, so that the anti-sticking layer does not affect the adhesion between the central region of the device wafer and the adhesive glue. Therefore, the forming method can reduce the damage of the device wafer in the process of removing the adhesive glue, and can also prevent the bearing substrate from falling off in the thinning process.
Furthermore, antiseized layer is the monomolecular layer, antiseized layer's thickness is less, is difficult to influence the performance and the subsequent technology of the semiconductor structure that forms to can keep antiseized layer, and then simplify process flow.
Drawings
FIGS. 1-3 are schematic structural diagrams illustrating steps of a method for forming a semiconductor structure;
fig. 4 to 13 are schematic structural diagrams of steps of a method for forming a semiconductor structure according to an embodiment of the present invention.
Detailed Description
The forming method of the semiconductor structure in the prior art has a plurality of problems, such as: the device wafer edge is easily damaged when debonded.
Now, with reference to a method for forming a semiconductor structure, the reason why the edge of the device wafer is easily damaged when the bonding is released in the prior art is analyzed:
fig. 1 to 3 are schematic structural diagrams of steps of a method for forming a semiconductor structure.
Referring to fig. 1, a device wafer 120 and a carrier substrate 110 are provided, the device wafer 120 includes opposite thinned surfaces and a back surface, and the carrier substrate 110 includes a carrying surface.
With continued reference to fig. 1, an adhesive 130 is formed on the back side of the device wafer 120; after the adhesive 130 is formed, the adhesive 130 is attached to the carrying surface of the carrier substrate 110.
Referring to fig. 2, after the adhesive 130 is attached to the carrying surface of the carrier substrate 110, the device wafer 120 is thinned.
Referring to fig. 3, after the thinning process, the carrier substrate 110 is removed (as shown in fig. 2); after removing the carrier substrate 110, removing the adhesive glue 130, the step of removing the adhesive glue 130 comprising: adhering an adhesive tape 131 on the surface of the adhesive 130; the adhesive 130 is removed by tearing the tape 131.
In the process of tearing the tape 131, the tape 131 generates stress on the device wafer 120, and the device wafer 120 is easily damaged. To reduce the breakage of the device wafer 120, a roller 132 is placed on the tape 131 at the force point of the adhesive 130 during the tearing process, and the roller 132 moves along with the movement of the force point of the tape 131. In the tearing process, the roller 132 can apply compressive stress to the surface of the device wafer 120, so that the tensile stress applied to the surface of the device wafer 120 by tearing the adhesive tape 131 can be offset, the adhesive tape 131 and the adhesive 130 are separated from the device wafer 120 mainly through shear force, and the breakage of the device wafer 120 can be reduced.
However, since the edge area of the device wafer 120 has a corner or is a curved surface, the normal direction of the edge surface of the device wafer 120 is not uniform, and when the tearing process is performed, the component force along the normal direction received by the edge surface of the device wafer 120 is complex, so that the force applied to the edge of the device wafer 120 is not easily controlled, and thus the component force received by the edge of the device wafer 120 in the direction perpendicular to the edge surface of the device wafer 120 is easily large, so that the edge of the device wafer 120 is damaged. When the device wafer 120 is subjected to an external force, the semiconductor devices in the device wafer 120 are easily damaged due to stress concentration.
In order to solve the technical problem, the technical solution of the present invention provides a method for forming a semiconductor structure, including: forming an anti-sticking layer on the surface of the device wafer at the edge region; an adhesive glue is formed on the central region and the release layer. The adhesive force between the adhesive glue and the anti-sticking layer is smaller than that between the adhesive glue and the device wafer, in the process of removing the adhesive glue, the adhesive glue at the edge area is easier to remove, the stress applied to the edge area of the device wafer is smaller, and therefore the device wafer is not easy to damage.
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below.
Fig. 4 to 13 are schematic structural diagrams of steps of a method for forming a semiconductor structure according to an embodiment of the present invention.
Referring to fig. 4, a device wafer 200 and a carrier substrate 300 are provided, the device wafer 200 includes an opposite thinning surface 202 and a back surface 201, the back surface 201 includes a central region II and an edge region I surrounding the central region II, and the carrier substrate 300 includes a carrying surface 301.
The back surface 201 of the device wafer 200 is provided with a semiconductor device, and the carrier substrate 300 is used for supporting the device wafer 200 and reducing the warpage or wrinkle of the device wafer 200 in the subsequent thinning process of the device wafer 200.
The edge region I is used for forming an anti-sticking layer subsequently; the central region II serves to provide some adhesion between the device wafer 200 and the carrier substrate 300.
In this embodiment, the device wafer 200 is circular. The edge area I is circular, and the central area II is circular.
If the ratio of the radius of the central area II to the radius of the device wafer 200 is too large and the edge area I is too small, the area of the subsequently formed anti-sticking layer 221 is small, which is not beneficial to reducing the damage of the device wafer 200; if the ratio of the radius of the central area II to the radius of the device wafer 200 is too small, the central area II is too small, which is not favorable for the adhesion between the device wafer 200 and the carrier substrate 300, and the carrier substrate 300 is easy to fall off during the subsequent thinning process. In this embodiment, the ratio of the radius of the device wafer 200 to the radius of the central region II is 0.94 to 0.98. Specifically, the radius of the device wafer 200 is 90mm to 110mm, for example, 100 mm; the radius of the central area II is 94-98 mm.
In this embodiment, the device wafer 200 is made of silicon. In other embodiments, the material of the device wafer may also be germanium, silicon germanium, or silicon carbide.
The material of the carrier substrate 300 is glass. In other embodiments, the material of the carrier substrate may also be silicon, germanium, aluminum, or copper.
Referring to fig. 5, an isolation layer 210 is formed in a central region II of the backside 201 of the device wafer 200.
The adhesion force between the isolation layer 210 and the subsequently formed initial anti-sticking layer is smaller than the adhesion force between the initial anti-sticking layer and the device wafer 200, so that the initial anti-sticking layer on the isolation layer 210 can be easily removed, and the anti-sticking layer is formed.
Specifically, the isolation layer 210 does not form a chemical bond with a subsequently formed adhesive glue. The isolation layer 210 does not form a chemical bond with the initial adhesive glue formed subsequently, the isolation layer 210 and the initial adhesive glue are attached to each other through a physical adsorption effect, and the adhesion force between the isolation layer 210 and the initial adhesive glue is small, so that the initial anti-sticking layer on the surface of the isolation layer 210 is easily removed.
In this embodiment, the isolation layer 210 is used as a molding layer of the device wafer 200 to reduce the influence of the external environment on the device wafer 200. The isolation layer 210 is made of an organic dielectric material, and specifically, the isolation layer 210 is made of polyimide.
In other embodiments, the material of the isolation layer may be photoresist.
In this embodiment, the thickness of the isolation layer 210 is too small to protect the semiconductor devices in the device wafer 200; if the spacer layer 210 is too thick. The integration of the formed semiconductor structure is easily reduced. Therefore, the isolation layer 210 may provide sufficient protection for the semiconductor device.
And forming an anti-sticking layer on the surface of the edge region I, wherein the adhesion force between the anti-sticking layer and the subsequently formed adhesive glue is smaller than that between the adhesive glue and the device wafer 200.
In this example, the step of forming the release layer is shown in fig. 6 and 7.
Referring to fig. 6, an initial anti-stiction layer 220 is formed on the device wafer 200 in the center region II and the device wafer 200 in the edge region I.
In this embodiment, the initial anti-sticking layer 220 is located on the surfaces of the edge region I device wafer 200 and the isolation layer 210.
The adhesion between the isolation layer 210 and the initial anti-sticking layer 220 is smaller than the adhesion between the initial anti-sticking layer 220 and the device wafer 200, so that the initial anti-sticking layer 220 on the isolation layer 210 can be easily removed, thereby forming the anti-sticking layer.
In this embodiment, the initial anti-adhesion layer 220 can form a chemical bond with the device wafer 200, and the initial anti-adhesion layer 220 and the isolation layer 210 are adhered together by physical adsorption. Therefore, the adhesion between the initial anti-adhesion layer 220 and the surface of the device wafer 200 is strong, and the adhesion between the initial anti-adhesion layer 220 and the isolation layer 210 is weak, so that the initial anti-adhesion layer 220 of the central region II is easily removed to form the anti-adhesion layer 221.
In this embodiment, the material of the initial release layer 220 is a self-assembled molecular film, such as perfluorododecyl trichlorosilane (FDTS), perfluorooctyl trichlorosilane (FOTS), tetrahydrooctyl triethoxysilane (FOTES), or tetrahydrooctyl methyldichlorosilane (FOMDS).
FDTS molecular formula is CF3(CF2)2(CH2)2SiCl3The surface of the device wafer has a hydroxyl dangling bond, and hydrogen atoms in the hydroxyl on the surface of the device wafer are easily absorbed by CF in FDTS3(CF2)2(CH2)2 Si-substitution to form CF3(CF2)2(CH2)2Si-O-Si, thereby forming a covalent bond with stronger acting force between the FDTS and the device wafer.
FOTS has the molecular formula of CF3(CF2)5(CH2)2SiCl3(ii) a The molecular formula of FOTES is CF3(CF2)5(CH2)2Si(OC2H5)3(ii) a The molecular formula of FOMDS is CF3(CF2)5(CH2)2Si(CH3)Cl2。
In this embodiment, the initial anti-sticking layer 220 is made of a hydrophobic material, and the isolation layer 210 is made of a hydrophilic material, so that a chemical bond is not easily formed between the initial anti-sticking layer 220 and the isolation layer 210, and the adhesion between the initial anti-sticking layer 220 and the isolation layer 210 is small.
If the thickness of the initial anti-sticking layer 220 is too large, the performance of the device wafer 200 and the subsequent packaging process are easily affected. Specifically, the initial anti-sticking layer 220 is a monomolecular film, and the thickness of the initial anti-sticking layer 220 is 1nm to 5 nm.
The process of forming the initial release layer 220 includes: spin coating process, spray coating process or gas phase self-assembly monolayer coating process.
Referring to fig. 7, the initial anti-adhesion layer 220 (shown in fig. 6) in the central region II is removed to form an anti-adhesion layer 221.
Since the adhesion between the anti-sticking layer 221 and the subsequently formed adhesive is smaller than the adhesion between the adhesive and the device wafer 200, the stress generated on the device wafer 200 in the subsequent process of removing the edge region I adhesive 230 is smaller, so that the damage to the edge of the device wafer 200 can be reduced. When the device wafer 200 is subjected to an external force, the central region II of the device wafer 200 is not easily damaged due to stress concentration. Therefore, the forming method can improve the performance of the formed semiconductor structure.
The anti-sticking layer 221 is only located at the edge region I, so that the anti-sticking layer 221 does not affect the adhesion between the central region II of the device wafer 200 and the subsequently formed adhesive. Therefore, the forming method can reduce the damage of the device wafer 200 in the subsequent process of removing the adhesive glue, and can also prevent the bearing substrate 300 from falling off in the thinning process.
In this embodiment, the step of removing the initial anti-adhesion layer 220 in the central region II includes: the initial anti-adhesion layer 220 is baked to decompose the initial anti-adhesion layer 220 in the central region II.
It should be noted that, because the adhesion force between the isolation layer 210 and the initial anti-adhesion layer 220 in the central region II is small, when the isolation layer 210 is separated from the initial anti-adhesion layer 220 in the central region II, the initial anti-adhesion layer 220 in the edge region I and the device wafer 200 are still attached to each other, so as to form the anti-adhesion layer 221.
If the temperature of the baking process is too high, the initial release layer 220 of the edge region I is easily removed; if the temperature of the baking process is too low, the initial release layer 220 of the central region II is not easily removed. Specifically, in this embodiment, the temperature of the baking process is 350 to 450 ℃.
In other embodiments, the isolation layerThe material of (a) may be a photoresist. The step of removing the initial release layer of the central region comprises: and stripping the photoresist, and removing the photoresist and the initial anti-sticking layer in the central area. The step of stripping comprises cleaning the photoresist through a stripping solution. The degumming solution comprises H2O2Or ammonia water or the combination of the two.
In other embodiments, the step of forming the release layer comprises: forming initial anti-sticking layers on the central region device wafer and the edge region device wafer; forming a pattern layer on the initial anti-sticking layer at the edge region; and etching the initial anti-sticking layer by taking the pattern layer as a mask, and removing the initial anti-sticking layer in the central area to form the anti-sticking layer. The pattern layer is made of photoresist.
Referring to fig. 8, an adhesive 230 is formed on the central region II and the surface of the anti-sticking layer 221, and an adhesion force between the adhesive 230 and the anti-sticking layer 221 is smaller than an adhesion force between the adhesive 230 and the device wafer 200.
The adhesive 230 is used for adhering the device wafer 200 and the carrier substrate 300 to each other, so that the carrier substrate 300 can provide support for the device wafer 200 during the thinning process, and the warpage and undulation of the device wafer 200 are reduced.
The adhesion force between the adhesive 230 and the anti-sticking layer 221 is small, so that the adhesive 230 in the edge region I can be removed easily in the following process, and thus the breakage of the device wafer 200 can be reduced.
In this embodiment, the adhesive glue 230 is made of an acrylic ultraviolet curing glue.
In this embodiment, the adhesive 230 is a hydrophilic material, and the hydrophilicity of the isolation layer 210 is greater than the hydrophilicity of the anti-sticking layer 221, so that the adhesion between the isolation layer 210 and the adhesive 230 is stronger, and the subsequent carrier substrate 300 can be prevented from falling off.
If the thickness of the adhesive glue 230 is too small, the adhesion between the device wafer 200 and the carrier substrate 300 is not facilitated; if the thickness of the adhesive 230 is too large, the process of removing the adhesive 230 is not facilitated. Specifically, the thickness of the adhesive glue 230 is 9 μm to 11 μm.
In this embodiment, the isolation layer 210 is used as a molding layer of the device wafer 200, and after the anti-sticking layer 221 is formed, the isolation layer 210 may be remained. In other embodiments, after forming the release layer and before the attaching process, removing the isolation layer is further included.
Referring to fig. 9, the device wafer 200 and the carrier substrate 300 are bonded to each other, so that the adhesive 230 is bonded to the carrier surface 301 of the carrier substrate 300.
The bonding process is used to bond the device wafer 200 and the carrier substrate 300.
Referring to fig. 10, after the bonding process, a thinning process is performed on the thinned surface 202 of the device wafer 200.
The thinning process serves to reduce the thickness of the device wafer 200, thereby increasing the integration of the formed semiconductor structure.
The thinning treatment process comprises the following steps: taiko process or chemical mechanical polishing.
During the thinning process, the carrier substrate 300 is used to support the device wafer 200, and reduce the warpage and waviness of the device wafer 200.
It should be noted that, in the attaching process, since the isolation layer 210 is disposed in the central region II of the device wafer 200, and the adhesion between the isolation layer 210 and the adhesive 220 is relatively large, the adhesion between the device wafer 200 and the carrier substrate 300 can be relatively strong, and the carrier substrate 300 is not easily peeled off in the thinning process.
Referring to fig. 11, after the thinning process, the carrier substrate 300 is removed.
The step of removing the carrier substrate 300 includes: the carrier substrate 300 and the adhesive 230 are irradiated to separate the carrier substrate 300 from the device wafer 200.
The wavelength of a light source for the irradiation treatment is 1064 nm.
If the irradiation time is too short, the carrier substrate 300 is not easily separated from the device wafer 200; if the irradiation treatment time is too long, the process cost is easily increased. Specifically, the irradiation treatment time is 45s to 55s, for example, 50 s.
Referring to fig. 12 and 13, after the carrier substrate 300 is removed, the adhesive glue 230 is removed.
In this embodiment, the step of removing the adhesive 230 includes: forming an adhesive tape 240 on the surfaces of the adhesive 230 and the release layer 221; the adhesive 230 is separated from the device wafer 200 by a tearing process performed on the tape 240.
Since the adhesive 230 is a hydrophilic material, the anti-sticking layer 221 is a hydrophobic material, and the hydrophobicity of the anti-sticking layer 221 is greater than that of the device wafer 200. Therefore, the adhesion force of the release layer 221 and the adhesive 230 is smaller than that of the device wafer 200 and the release layer 221, so that the adhesive 230 on the surface of the release layer 221 is easier to remove.
In the process of removing the adhesive glue 230, since the adhesion force between the adhesive glue 230 and the anti-sticking layer 221 is small, the adhesive tape 240 generates less stress to the device wafer 200, so that the device wafer 200 is not easily broken.
In this embodiment, a roller 241 is disposed on the adhesive tape 240 at the force point of the adhesive glue 230 during the tearing process, and the roller 241 moves along with the movement of the force point of the adhesive tape 240. In the tearing process, the roller 241 can generate compressive stress on the surface of the device wafer 200, so that the tensile stress generated on the surface of the device wafer 200 by tearing the adhesive tape 240 can be offset, the adhesive tape 240 and the adhesive glue 230 are mainly separated from the device wafer 200 through shearing force, and the breakage of the device wafer 200 can be reduced.
In this embodiment, the anti-sticking layer 221 is a monolayer, and the thickness of the anti-sticking layer 221 is small, so that the performance of the formed semiconductor structure and the subsequent processes are not easily affected. Therefore, in this embodiment, the anti-adhesion layer is retained, so that the process flow can be simplified.
In other embodiments, after removing the adhesive glue, removing the release layer is further included. And the removal of the anti-sticking layer can eliminate the influence of the anti-sticking layer on the device wafer. The step of removing the anti-sticking layer comprises heat treating the anti-sticking layer to decompose the anti-sticking layer. The technological parameters of the heating treatment are as follows: the heating temperature is 470 ℃ or higher.
In this embodiment, the isolation layer 210 is used as a molding layer of the device wafer 200, and after the anti-sticking layer 221 is formed, the isolation layer 210 may be remained. In other embodiments, after removing the adhesive glue, removing the isolation layer is further included.
With continued reference to fig. 13, an embodiment of the present invention further provides a semiconductor structure, including: a device wafer 200, the device wafer 200 comprising opposite thinned surfaces 202 and a backside 201, the backside 201 comprising a central region II and an edge region I surrounding the central region II; and the anti-sticking layer 221 is positioned on the surface of the device wafer 200 at the edge area I.
The anti-sticking layer 221 is made of perfluorododecyl trichlorosilane, perfluorooctyl trichlorosilane, FOES or FOMDS. The device wafer 200 is made of silicon, germanium, silicon germanium, or silicon carbide.
The thickness of the anti-sticking layer 221 is 1nm to 5 nm.
The semiconductor structure in this embodiment is formed by the forming method of the previous embodiment.
Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be effected therein by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.

Claims (16)

1. A method of forming a semiconductor structure, comprising:
providing a device wafer and a carrier substrate, wherein the device wafer comprises opposite thinning surfaces and a back surface, the back surface comprises a central area and an edge area surrounding the central area, and the carrier substrate comprises a carrying surface;
forming initial anti-sticking layers on the central region device wafer and the edge region device wafer;
removing the initial anti-sticking layer in the central area and forming an anti-sticking layer on the surface of the edge area;
forming an adhesive glue on the central area and the surface of the anti-sticking layer, wherein the adhesive force between the adhesive glue and the anti-sticking layer is smaller than the adhesive force between the adhesive glue and the device wafer;
carrying out bonding treatment on the device wafer and the bearing substrate to enable the adhesive to be bonded with the bearing surface of the bearing substrate;
after the bonding treatment, thinning the thinned surface of the device wafer;
after the thinning treatment, removing the bearing substrate;
and removing the adhesive glue after removing the bearing substrate.
2. The method of forming a semiconductor structure of claim 1, wherein the material of the device wafer comprises silicon, germanium, silicon germanium, or silicon carbide.
3. The method of forming a semiconductor structure of claim 1, wherein prior to forming the initial release layer, further comprising: forming an isolation layer on the surface of the device wafer in the central area; the initial anti-sticking layer is positioned on the surfaces of the isolation layer and the edge region device wafer, and the adhesion force between the initial anti-sticking layer and the isolation layer is smaller than that between the initial anti-sticking layer and the device wafer.
4. The method of claim 3, wherein the isolation layer is made of a polyimide or photoresist material.
5. The method of forming a semiconductor structure of claim 4, wherein the step of removing the initial release layer of the central region comprises: and baking the initial anti-sticking layer to decompose the initial anti-sticking layer in the central area.
6. The method of claim 5, wherein the baking temperature is 350 ℃ to 450 ℃.
7. The method of forming a semiconductor structure of claim 3, wherein after forming the release layer and before performing the bonding process, further comprising: and removing the isolation layer.
8. The method of forming a semiconductor structure of claim 1, wherein the step of removing the initial release layer of the central region comprises: forming a pattern layer on the initial anti-sticking layer at the edge region; and etching the initial anti-sticking layer by taking the pattern layer as a mask, and removing the initial anti-sticking layer in the central area to form the anti-sticking layer.
9. The method of claim 1, wherein the release layer is made of perfluorododecyl trichlorosilane, perfluorooctyl trichlorosilane, tetrahydrooctyl triethoxysilane, or tetrahydrooctyl methyldichlorosilane.
10. The method of forming a semiconductor structure of claim 1, wherein the release layer has a thickness of 1nm to 5 nm.
11. The method of claim 1, wherein the adhesive has a thickness of 9 μm to 11 μm.
12. The method of forming a semiconductor structure of claim 1, wherein removing the adhesive glue comprises: sticking an adhesive tape on the surface of the adhesive; and tearing the adhesive through the adhesive tape to separate the adhesive from the device wafer.
13. The method of claim 1, wherein the device wafer is circular, the central region is circular, the edge region is circular, and a ratio of a radius of the device wafer to a radius of the central region is 0.94-0.98.
14. The method of forming a semiconductor structure of claim 1, wherein the process of forming the release layer comprises: a spray coating process, a spin coating process, or a gas phase self-assembled monolayer coating process.
15. The method of claim 1, further comprising removing said release layer after removing said adhesive glue.
16. The method of forming a semiconductor structure of claim 15, wherein the process of removing the release layer comprises: and heating the anti-sticking layer to decompose the anti-sticking layer.
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