CN109461695A - A kind of wafer bonding method - Google Patents

A kind of wafer bonding method Download PDF

Info

Publication number
CN109461695A
CN109461695A CN201811185428.2A CN201811185428A CN109461695A CN 109461695 A CN109461695 A CN 109461695A CN 201811185428 A CN201811185428 A CN 201811185428A CN 109461695 A CN109461695 A CN 109461695A
Authority
CN
China
Prior art keywords
wafer
wafer bonding
bonding method
silicon oxide
oxide layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201811185428.2A
Other languages
Chinese (zh)
Inventor
郭松辉
沈新林
吴孝哲
吴龙江
林宗贤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Huaian Imaging Device Manufacturer Corp
Original Assignee
Huaian Imaging Device Manufacturer Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Huaian Imaging Device Manufacturer Corp filed Critical Huaian Imaging Device Manufacturer Corp
Priority to CN201811185428.2A priority Critical patent/CN109461695A/en
Publication of CN109461695A publication Critical patent/CN109461695A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14683Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/1469Assemblies, i.e. hybrid integration

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Electromagnetism (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
  • Pressure Welding/Diffusion-Bonding (AREA)

Abstract

The present invention provides a kind of wafer bonding method, comprising: provides the wafer that at least two panels surface includes silicon oxide layer;Ammoniated treatment is carried out to the silicon oxide layer of wherein at least wafer, to form amino dielectric layer on the surface of silicon oxide layer;By amino dielectric layer by wafer bonding, to form the ammonia of supercriticality in wafer bonding face.To reduce bubble size under conditions of lower reaction temperature and reaction pressure, product quality and yield are improved.

Description

A kind of wafer bonding method
Technical field
The invention belongs to field of semiconductor manufacture, are related to a kind of wafer bonding method.
Background technique
In the art of semiconductor manufacturing, it is often necessary to by wafer bonding to together.But during wafer bonding, At wafer bonding face, presence or the gas that generates in wafer bonding due to particle cannot release wafer bonding in time Face causes to form a large amount of bubble at wafer bonding face.
Structural schematic diagram such as Fig. 1, after illustrating two panels wafer bonding in the prior art.Wherein, in wafer 101 and wafer 102 when being bonded, and gaseous state H can be generated at wafer bonding face 1032O, gaseous state H2If O cannot be excluded in time, will stay in At wafer bonding face 103, bubble 104 is formed, such as Fig. 2.The part bubble 104 can reduce product quality, influence yield.Fig. 3 a~ 3c illustrates the reaction mechanism schematic diagram of two panels wafer bonding in the prior art.Since the electronegativity of oxygen atom is greater than silicon atom, 2 electronics of silicon oxygen bond (Si-O key) are thus formed closer to oxygen atom, so that silicon atom band part positive charge (+), Oxygen atom band part negative electrical charge (-).Due to chemical reaction be all towards be conducive to generate H2What the direction of O carried out, thus in crystalline substance When round key closes, since the reaction at wafer bonding face 103 has gaseous state H2The generation of O, so the reaction energy at wafer bonding face 103 It enough goes on smoothly, but part gaseous state H2O usually will form bubble 104, to reduce product quality, influence yield.
Therefore, it is necessary to a kind of wafer bonding method is provided, during wafer bonding, to reduce the size of bubble, Improve product quality and yield, it has also become current urgent problem to be solved.
Summary of the invention
In view of the foregoing deficiencies of prior art, it the purpose of the present invention is to provide a kind of wafer bonding method, is used for Solve the problems, such as that product quality is low and low yield caused by the bubble generated in wafer bonding face.
In order to achieve the above objects and other related objects, the present invention provides a kind of wafer bonding method, comprising the following steps:
There is provided at least two panels wafer, the surface of the wafer includes silicon oxide layer;
Ammoniated treatment is carried out to the silicon oxide layer of at least a piece of wafer, to form ammonia on the surface of the silicon oxide layer Base dielectric layer;
By the amino dielectric layer by the wafer bonding, to form the ammonia of supercriticality in the wafer bonding face Gas.
Optionally, during being bonded the wafer, generating in the wafer bonding face has water, the state packet of the water Include one of supercriticality and gaseous state.
Optionally, the method for forming the silicon oxide layer includes atomic layer deposition method, chemical vapour deposition technique and life in situ One of regular way.
Optionally, the method for the ammoniated treatment includes magnetron sputtering plasma ammoniated treatment, inductively coupled plasma One of body ammoniated treatment and DPN processing.
Optionally, the range for forming the temperature of the ammonia of the supercriticality includes 132.4 DEG C~350 DEG C of reaction, and The range of reaction pressure includes 11.28MPa~20MPa.
Optionally, in the step of being bonded the wafer, further include the steps that tempering.
Optionally, plasma-activated processing and cleaning treatment are included the steps that in the step of being bonded the wafer.
Optionally, the working gas of the plasma-activated processing includes one of nitrogen and oxygen or combination;Institute The used cleaning solution of the step of stating cleaning treatment includes in the cleaning solution of deionized water, the cleaning solution containing ammonia and hydrofluoric acid containing It is a kind of.
Optionally, the ratio range of the area of the area and wafer bonding face for the bubble that the wafer bonding face is formed Including 0.1%~1%.
Optionally, any of the above-described wafer bonding method includes being applied to preparation one of SOI and back-illuminated type CMOS.
As described above, wafer bonding method of the invention, have the advantages that by the silicon oxide layer to wafer into Row ammoniated treatment, to form amino dielectric layer on the surface of silicon oxide layer, then by amino dielectric layer by wafer bonding, with Wafer bonding face forms the ammonia of supercriticality, to reduce gas under conditions of lower reaction temperature and reaction pressure Size is steeped, product quality and yield are improved.
Detailed description of the invention
Fig. 1 is shown as the structural schematic diagram after two panels wafer bonding in the prior art.
Fig. 2 is shown as the pattern schematic diagram of the bubble at wafer bonding face in the prior art.
Fig. 3 a~3c is shown as the reaction mechanism schematic diagram of wafer bonding in Fig. 1.
Fig. 4 is shown as carrying out the process flow chart of wafer bonding in the present invention.
Fig. 5 is shown as the structural schematic diagram that amino dielectric layer is formed on the first wafer in the present invention.
Fig. 6 is shown as the structural schematic diagram of the second circle in the present invention.
Fig. 7 is shown as being bonded the structural schematic diagram after the first wafer and the second wafer in the present invention.
Fig. 8 a~8c is shown as the reaction mechanism schematic diagram of ammoniated treatment in the present invention.
Fig. 9 a~9c is shown as carrying out the reaction mechanism schematic diagram of plasma-activated processing and cleaning treatment in the present invention.
Figure 10 a~10c is shown as being bonded the reaction mechanism schematic diagram of the first wafer and the second wafer in the present invention.
Component label instructions
101,102 wafer
103 wafer bonding faces
104 bubbles
110 first wafers
111 silicon substrates
112 silicon oxide layers
130 amino dielectric layers
120 second wafers
121 silicon substrates
122 dielectric layers
123 silicon oxide layers
140 wafer bonding faces
Specific embodiment
Illustrate embodiments of the present invention below by way of specific specific example, those skilled in the art can be by this specification Other advantages and efficacy of the present invention can be easily understood for disclosed content.The present invention can also pass through in addition different specific realities The mode of applying is embodied or practiced, the various details in this specification can also based on different viewpoints and application, without departing from Various modifications or alterations are carried out under spirit of the invention.
Please refer to Fig. 4~Figure 10 c.It should be noted that diagram provided in the present embodiment only illustrates in a schematic way Basic conception of the invention, only shown in schema then with related component in the present invention rather than package count when according to actual implementation Mesh, shape and size are drawn, when actual implementation each component kenel and ratio can arbitrarily change for one kind, and its component Being laid out kenel may also be increasingly complex.
As shown in figure 4, the present invention provides a kind of wafer bonding method, comprising the following steps:
There is provided at least two panels wafer, the surface of the wafer includes silicon oxide layer;
Ammoniated treatment is carried out to the silicon oxide layer of at least a piece of wafer, to form ammonia on the surface of the silicon oxide layer Base dielectric layer;
By the amino dielectric layer by the wafer bonding, to form the ammonia of supercriticality in the wafer bonding face Gas.
The present invention carries out ammoniated treatment by the silicon oxide layer to wafer, to form amino medium on the surface of silicon oxide layer Layer, then by amino dielectric layer by wafer bonding, to form the ammonia of supercriticality in wafer bonding face, thus lower Reaction temperature and reaction pressure under conditions of, reduce bubble size, improve product quality and yield.
Specifically, the number of the wafer can be to be N number of, wherein N >=2, only need to ensure to need in N number of wafer The surface for the wafer being bonded is the silicon oxide layer containing silicon oxygen bond (Si-O key), the specific number of the wafer Herein with no restriction.
Such as Fig. 5, first offer semiconductor substrate, the semiconductor substrate includes silicon substrate 111, Yu Suoshu silicon substrate 111 Upper surface silicon oxide layer deposited 112, thus the silicon substrate 111 surface formed the first wafer 110 containing Si-O key. Wherein, the method for depositing the silicon oxide layer 112 includes one of atomic layer deposition method and chemical vapour deposition technique, herein not It is restricted.Such as Fig. 6, the second wafer 120 to be bonded is provided, second wafer 120 may include semiconductor substrate, described partly to lead Body substrate includes silicon substrate 121, dielectric layer 122 and the silicon oxide layer 123 positioned at 122 surface of dielectric layer.The silicon substrate 121, metal line or device be may also comprise inside dielectric layer 122 and silicon oxide layer 123, herein with no restriction.The silica The forming method of layer 123 includes atomic layer deposition method and chemical vapour deposition technique, and the silicon oxide layer 123, which also can be only, to be given an account of Matter layer 122 is formed by the silicon oxide layer containing Si-O key through in situ synthesis, herein with no restriction.First wafer 110 Can also be without silicon oxide layer deposited 112 the step of, and in situ synthesis is used, in the surface shape of the silicon substrate 111 At the silicon oxide layer with Si-O key, herein with no restriction.
Then, ammoniated treatment is carried out to the silicon oxide layer 112 in first wafer 110, in the silica The surface of layer 112, which is formed, has amino (- NH2) amino dielectric layer 130.
Specifically, the method for the ammoniated treatment includes magnetron sputtering plasma ammoniated treatment, inductively coupled plasma One of body ammoniated treatment and DPN processing.The working gas of the ammoniated treatment includes ammonia (NH3).Fig. 8 a~8c, signal The reaction mechanism schematic diagram of ammoniated treatment.Such as Fig. 8 a, when carrying out ammoniated treatment to first wafer 110, the oxidation The Si-O key in silicon layer 112 is broken off.Working gas NH in the Si-O key being broken off and the ammoniated treatment3Knot It closes, forms hydrogen-oxygen key (- OH) and amino (- NH2), such as Fig. 8 b~Fig. 8 c, contain to be formed on the surface of the silicon oxide layer 112 There is-NH2The amino dielectric layer 130.
It, can also be to the oxidation in second wafer 120 to be bonded as the further embodiment of the embodiment Silicon layer 123 carries out ammoniated treatment, has amino (- NH to be formed on the surface of the silicon oxide layer 1232) amino dielectric layer. Those skilled in the art select according to specific needs, herein with no restriction.Preferably to playing carrier function, containing compared with First wafer 110 of few function element carries out the ammoniated treatment, in order to reduce the damage to wafer.
Finally, such as Fig. 7, by containing-NH2The amino dielectric layer 130 by first wafer 110 and described second Wafer 120 is bonded, to form supercriticality in the bonding face 140 of first wafer 110 and second wafer 120 NH3
As the further embodiment of the embodiment, the step of being bonded first wafer 110 and the second wafer 120 In, include the steps that plasma-activated processing and cleaning treatment.The working gas of the plasma-activated processing includes nitrogen One of gas and oxygen or combination;The step of cleaning treatment, used cleaning solution included deionized water, containing the clear of ammonia One of washing lotion and the cleaning solution of hydrofluoric acid containing.
Specifically, the effect of the plasma-activated processing is that the Si-O key is broken to form silicon dangling bonds, it is described The effect of cleaning treatment be by the silicon dangling bonds generate Si-OH, form the amino dielectric layer 130 of stable state, as Fig. 9 a~ 9c.Then such as Figure 10 a~10c, first wafer 110 and the institute of the plasma-activated processing and cleaning treatment will be passed through The second wafer 120 is stated to be bonded, due to atomic electronegativity O > N > Si > H, nitrogen-atoms electronegativity is greater than silicon atom, so that 2 electronics of N-Si singly-bound are formed closer to nitrogen-atoms, thus silicon atom band part positive charge (+), similarly oxygen atom band portion Divide negative electrical charge (-), O-H key gradually weakens with Si-N key, and new keys N-H key and Si-O key increasingly generate, therefore reacts and generate NH3's Speed can compare H2O is fast.Due to NH3The condition of supercriticality is 132.4 DEG C/11.28MPa, and object in a supercritical state Matter is a kind of dense gaseous state, and density ratio general gas flow wants big two orders of magnitude, and close with liquid, viscosity is smaller than liquid, But diffusion velocity is faster than liquid (about two orders of magnitude), so having preferable mobility and transfer performance.Therefore, described to make NH3Reaction in a supercritical state, preferably when being bonded to first wafer 110 and second wafer 120 The range of temperature includes 132.4 DEG C~350 DEG C, and the range of reaction pressure includes 11.28MPa~20MPa, so as to reduce gas Steep size.
As the further embodiment of the embodiment, in the mistake for being bonded first wafer 110 and second wafer 120 Cheng Zhong, in the H that the wafer bonding face 140 generates2The state of O includes one of supercriticality and gaseous state.
Specifically, due to the H2The supercriticality condition of O is 374.1 DEG C/22.06MPa, therefore to further decrease The size of the bubble can also be by the technique during being bonded first wafer 110 and the second wafer 120 Condition control is in 374.1 DEG C/22.06MPa or more, in order to by the H2O is transformed into supercriticality, but this method need compared with High reaction temperature and reaction pressure is unfavorable for the control of process conditions, therefore preferably lower to process conditions requirement, can By the NH3It is changed into the scheme of supercriticality.
As the further embodiment of the embodiment, in the step for being bonded first wafer 110 and second wafer 120 In rapid, further include the steps that tempering.
Specifically, during being bonded first wafer 110 and the second wafer 120, it can also be only in the crystalline substance The gaseous NH is formed at circle bonding face 1403, then the wafer after bonding is tempered, the tempering step In process conditions be at least can be by the NH3It is changed into the NH of supercriticality3, or use can be by the gaseous H2O and institute State NH3It is transformed into supercriticality, in order in the step of being tempered, achieve the purpose that reduce bubble size.
As the further embodiment of the embodiment, the area for the bubble that the wafer bonding face 140 is formed and institute The ratio range for stating the area in wafer bonding face 140 includes 0.1%~1%.Thus under the premise of process conditions are relatively easy to control, The size of the bubble at the wafer bonding face 140 is reduced, the quality of the wafer after improving bonding.
As the further embodiment of the embodiment, the wafer bonding method includes being applied to preparation SOI and back-illuminated type One of CMOS, herein with no restriction.
In conclusion wafer bonding method of the present invention, carries out ammoniated treatment by the silicon oxide layer to wafer, to aoxidize The surface of silicon layer forms amino dielectric layer, then by amino dielectric layer by wafer bonding, to form super face in wafer bonding face The ammonia of boundary's state improves product quality to reduce bubble size under conditions of lower reaction temperature and reaction pressure And yield.So the present invention effectively overcomes various shortcoming in the prior art and has high industrial utilization value.
The above-described embodiments merely illustrate the principles and effects of the present invention, and is not intended to limit the present invention.It is any ripe The personage for knowing this technology all without departing from the spirit and scope of the present invention, carries out modifications and changes to above-described embodiment.Cause This, institute is complete without departing from the spirit and technical ideas disclosed in the present invention by those of ordinary skill in the art such as At all equivalent modifications or change, should be covered by the claims of the present invention.

Claims (10)

1. a kind of wafer bonding method, which comprises the following steps:
There is provided at least two panels wafer, the surface of the wafer includes silicon oxide layer;
Ammoniated treatment is carried out to the silicon oxide layer of at least a piece of wafer, is situated between with forming amino on the surface of the silicon oxide layer Matter layer;
By the amino dielectric layer by the wafer bonding, to form the ammonia of supercriticality in the wafer bonding face.
2. wafer bonding method according to claim 1, it is characterised in that: during being bonded the wafer, in institute Stating wafer bonding face and generating has water, and the state of the water includes one of supercriticality and gaseous state.
3. wafer bonding method according to claim 1, it is characterised in that: the method for forming the silicon oxide layer includes original One of sublayer sedimentation, chemical vapour deposition technique and in situ synthesis.
4. wafer bonding method according to claim 1, it is characterised in that: the method for the ammoniated treatment includes that magnetic control splashes Penetrate one of plasma ammoniated treatment, inductively coupled plasma body ammoniated treatment and DPN processing.
5. wafer bonding method according to claim 1, it is characterised in that: form the anti-of the ammonia of the supercriticality The range for answering temperature includes 132.4 DEG C~350 DEG C, and the range of reaction pressure includes 11.28MPa~20MPa.
6. wafer bonding method according to claim 1, it is characterised in that: in the step of being bonded the wafer, also wrap The step of including tempering.
7. wafer bonding method according to claim 1, it is characterised in that: include in the step of being bonded the wafer it is equal from The step of daughter activation processing and cleaning treatment.
8. wafer bonding method according to claim 7, it is characterised in that: the work gas of the plasma-activated processing Body includes one of nitrogen and oxygen or combination;The step of cleaning treatment used cleaning solution include deionized water, One of the cleaning solution of cleaning solution and hydrofluoric acid containing containing ammonia.
9. wafer bonding method according to claim 1, it is characterised in that: the face for the bubble that the wafer bonding face is formed The long-pending ratio range with the area in the wafer bonding face includes 0.1%~1%.
10. any wafer bonding method according to claim 1~9, it is characterised in that: the wafer bonding method packet It includes and is applied to preparation one of SOI and back-illuminated type CMOS.
CN201811185428.2A 2018-10-11 2018-10-11 A kind of wafer bonding method Pending CN109461695A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201811185428.2A CN109461695A (en) 2018-10-11 2018-10-11 A kind of wafer bonding method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201811185428.2A CN109461695A (en) 2018-10-11 2018-10-11 A kind of wafer bonding method

Publications (1)

Publication Number Publication Date
CN109461695A true CN109461695A (en) 2019-03-12

Family

ID=65607491

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201811185428.2A Pending CN109461695A (en) 2018-10-11 2018-10-11 A kind of wafer bonding method

Country Status (1)

Country Link
CN (1) CN109461695A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040152282A1 (en) * 2000-02-16 2004-08-05 Ziptronix, Inc. Method for low temperature bonding and bonded structure

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040152282A1 (en) * 2000-02-16 2004-08-05 Ziptronix, Inc. Method for low temperature bonding and bonded structure

Similar Documents

Publication Publication Date Title
US11760059B2 (en) Method of room temperature covalent bonding
CN109411340A (en) Wafer bonding method
US10748989B2 (en) Insulating layer structure for semiconductor product, and preparation method of insulating layer structure
CN105185720B (en) A kind of ultra-thin thermal oxide wafer bonding technique for strengthening bond strength
CN102751337A (en) N type crystalline silicon solar battery and manufacturing method thereof
CN101101891A (en) Silicon of insulator and its making technology
CN110416363B (en) Front passivation technology matched with alkali polishing selectivity emitter
JP2021531645A (en) Radio frequency silicon on insulator wafer platform with excellent performance, stability and manufacturability
CN104465879B (en) A kind of passivation on double surfaces method of solar cell
WO2020018366A1 (en) Selectively etching for nanowires
CN101471347B (en) Semiconductor substrate, method for preparing the same and three-dimensional encapsulation method
CN102832160A (en) Preparation method of SOI (silicon on insulator) silicon wafer
CN113903656A (en) Silicon carbide wafer processing technology
WO2014005379A1 (en) Method for fabricating goi wafer structure
CN109461695A (en) A kind of wafer bonding method
CN102381718B (en) Passivant and method for adopting passivant to realize surface pretreatment for germanium-base devices
CN109824032A (en) The transfer method of wafer level graphene film
CN104630744B (en) A kind of Al/Ti film Atomic layer deposition methods with amino titanium as titanium source
CN111883612A (en) Method for reducing scratches of tubular PECVD (plasma enhanced chemical vapor deposition) insert and film coating process adopting method
CN105632894B (en) Method for bonding compound semiconductor and silicon-based semiconductor
JPWO2020014007A5 (en)
CN102881562A (en) Surface passivation method of germanium-based substrate
CN109950134A (en) Structure and preparation method thereof with sull
CN102522332B (en) ONO structure and preparation method thereof, memory and preparation method thereof
CN108666209A (en) A kind of production method of semiconductor substrate

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
WD01 Invention patent application deemed withdrawn after publication

Application publication date: 20190312

WD01 Invention patent application deemed withdrawn after publication