CN109411340A - Wafer bonding method - Google Patents

Wafer bonding method Download PDF

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Publication number
CN109411340A
CN109411340A CN201811281935.6A CN201811281935A CN109411340A CN 109411340 A CN109411340 A CN 109411340A CN 201811281935 A CN201811281935 A CN 201811281935A CN 109411340 A CN109411340 A CN 109411340A
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film layer
wafer
layer
bonding method
wafer bonding
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CN201811281935.6A
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Inventor
沈新林
王海宽
郭松辉
吴龙江
林宗贤
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Huaian Imaging Device Manufacturer Corp
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Huaian Imaging Device Manufacturer Corp
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Priority to CN201811281935.6A priority Critical patent/CN109411340A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/185Joining of semiconductor bodies for junction formation
    • H01L21/187Joining of semiconductor bodies for junction formation by direct bonding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041Cleaning
    • H01L21/02057Cleaning during device manufacture
    • H01L21/0206Cleaning during device manufacture during, before or after processing of insulating layers
    • H01L21/02065Cleaning during device manufacture during, before or after processing of insulating layers the processing being a planarization of insulating layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31127Etching organic layers
    • H01L21/31133Etching organic layers by chemical means
    • H01L21/31138Etching organic layers by chemical means by dry-etching

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Pressure Welding/Diffusion-Bonding (AREA)
  • Cleaning Or Drying Semiconductors (AREA)

Abstract

The present invention provides a kind of wafer bonding method, it include: that the first wafer and the second wafer are provided, first wafer includes the first bonding face, second wafer includes the second bonding face, it is formed with the first film layer containing silicon oxygen bond layer on first bonding face, the second film layer containing silicon oxygen bond is formed on the second bonding face;Silazine link layer is introduced in the first film layer;Plasma-activated processing is carried out to the first film layer and the second film layer;First film layer and the second film layer are started the cleaning processing;Bonding processing is carried out to the first film layer and the second film layer, to form the ammonia of supercriticality in bonded interface.To reduce bubble size under conditions of lower reaction temperature and reaction pressure, number of bubbles is reduced, finished product rate and reliability are improved.

Description

Wafer bonding method
Technical field
The invention belongs to field of semiconductor manufacture, more particularly to a kind of wafer bonding method.
Background technique
By the high speed development of over half a century, microelectric technique and the information technology for relying on microelectric technique are right The development of human society produces revolutionary impact.However, now must in face of the problem of be: the physics pole of conventional transistor Limit is constantly approached, and smaller size of manufacturing technology is increasingly difficult to, and the power consumption of integrated circuit constantly increases, and the investment of fab is rapid It rises.In this case, how to keep microelectric technique with speed sustainable development described in Moore's Law, have become Today, entire industry all made great efforts to solve the problems, such as.
It is the integrated development of semiconductor and microelectric technique with the appearance of the technologies such as SOI, MEMS and three-dimension device manufacture New solution is provided, while wafer bond techniques become the integrated development of current microelectric technique and practical crucial skill Art.So-called wafer bonding refers to and is bonded the smooth wafer of two panels face-to-face, and applies with certain pressure, temperature, electricity The external conditions such as pressure, the interface between original two wafer generates atom or intermolecular binding force, such as covalent bond, metal Key, molecular link etc. make the bonded energy between two surfaces reach some strength, and became one this two wafer.However, in wafer In bonding process, since remained on surface particle or the gas generated in wafer bonding cannot discharge in time, thus can be in key Close interface and form a large amount of bubble or hole not of uniform size, reduce the bonding quality of wafer, influence device yield rate and Reliability.
Therefore, it is necessary to propose a kind of wafer bonding method, to solve during wafer bonding, formed in bonded interface A large amount of bubble or hole not of uniform size, reduce the bonding quality of wafer, influence the yield rate and reliability of device.
Summary of the invention
In view of the foregoing deficiencies of prior art, it the purpose of the present invention is to provide a kind of wafer bonding method, is used for It solves in the prior art during wafer bonding, a large amount of bubbles not of uniform size can be formed in bonded interface, reduce wafer Bonding quality influences the problem of yield rate and reliability of device etc..
In order to achieve the above objects and other related objects, the present invention provides a kind of wafer bonding method, comprising the following steps:
There is provided the first wafer and the second wafer, first wafer includes the first bonding face, and second wafer includes the Two bonding faces are formed with the first film layer containing silicon oxygen bond layer on first bonding face, are formed on second bonding face The second film layer containing silicon oxygen bond;
Silazine link layer is introduced in first film layer;
Plasma-activated processing is carried out to first film layer and second film layer;
First film layer and second film layer are started the cleaning processing;
Bonding processing is carried out to first film layer and second film layer, forms bonded interface.Optionally, in bonding institute During stating the first film layer and second film layer, the ammonia of supercriticality is formed in the bonded interface.
Optionally, it during being bonded first film layer and second film layer, is formed in the bonded interface Water, the state of the water include gaseous state.
Optionally, the step of forming first film layer containing silicon oxygen bond layer includes using chemical vapour deposition technique or furnace Pipe sedimentation is in silicon oxide layer deposited on first bonding face.
Optionally, the step of forming second film layer containing silicon oxygen bond, which is included on second bonding face, forms oxygen SiClx layer or teos layer.
It optionally, include using chemical vapour deposition technique the step of first film layer introduces the silazine link layer in institute State depositing silicon oxynitride silicon layer or fire sand layer in the first film layer.
Optionally, the first film layer described in cleaning treatment and the step of second film layer used cleaning solution include go from Sub- water.
Optionally, in the step of being bonded first film layer and second film layer, further include the steps that annealing.
Further, in the annealing steps, annealing temperature between 300 DEG C~400 DEG C, annealing pressure between 10mTorr~1Torr.
Optionally, the working gas of the plasma-activated processing includes one of nitrogen, oxygen and inert gas Or combination.
Optionally, the wafer bonding method includes being applied to prepare in CMOS or back-illuminated type CMOS front-illuminated.
As described above, wafer bonding method of the invention, has the advantages that through the institute in first wafer Introducing silazine link layer on the first bonding face is stated, so as to contain silazine link in first film layer, and passes through plasma-activated place First film layer and second film layer described in reason and cleaning treatment, to form silicon amino in first film layer, and described the Two film layers form silicone hydroxyl, are afterwards bonded first film layer and second film layer by silicon amino and silicone hydroxyl, in key Close the ammonia that interface forms supercriticality.Relative to being only generated for vapour molecule at bonded interface, bubble in the present invention In part vapour molecule number by identical quantity ammonia molecule substitute, bonding process formed supercriticality ammonia, The ammonia of supercriticality has smaller volume than conventional ammonia or steam at this time, to be bonded after effectively reducing bonding The final bubble size at interface.Further, since the temperature that ammonia reaches supercriticality is lower, annealing temperature can at low temperature into Row, and device performance will not be impacted.The bonding quality that wafer can be improved as a result, guarantees the yield rate of device and reliable Property and reduce manufacturing cost.
Detailed description of the invention
Fig. 1 is shown as the structural schematic diagram in routine techniques after two panels wafer bonding.
Fig. 2 is shown as generating the pattern schematic diagram of bubble in routine techniques at two panels wafer bonding face.
Fig. 3 a~3c is shown as the reaction mechanism schematic diagram of two panels wafer bonding in Fig. 1.
Fig. 4 is shown as the process flow chart of wafer bonding method of the invention.
Fig. 5 is shown as the structural schematic diagram of the first wafer in wafer bonding method of the invention, wherein on the first bonding face It is formed with the first film layer.
Fig. 6 is shown as the structural schematic diagram of the second wafer in wafer bonding method of the invention, wherein on the second bonding face It is formed with the second film layer.
Fig. 7 is shown as the structural schematic diagram after first film layer is bonded with the second film layer in wafer bonding method of the invention.
Fig. 8 a~8b is shown as the reaction machine of the plasma-activated processing of the first film layer in wafer bonding method of the invention Manage schematic diagram.
Fig. 9 a~9c is shown as the reaction mechanism schematic diagram of the first film layer cleaning treatment in wafer bonding method of the invention.
Figure 10 a~10c is shown as reacting for the first film layer and the second film layer bonding process in the wafer bonding method of invention Mechanism schematic diagram.
Component label instructions
1 ', 2 ' wafers
3 ' wafer bonding faces
4 ' bubbles
1 first wafer
11 first bonding faces
12 first film layers
121 silicon oxygen bond layers
122 silazine link layers
2 second wafers
21 second bonding faces
22 second film layers
23 substrates
24 dielectric layers
3 bonded interfaces
S1~S5 step
Specific embodiment
Illustrate embodiments of the present invention below by way of specific specific example, those skilled in the art can be by this specification Other advantages and efficacy of the present invention can be easily understood for disclosed content.The present invention can also pass through in addition different specific realities The mode of applying is embodied or practiced, the various details in this specification can also based on different viewpoints and application, without departing from Various modifications or alterations are carried out under spirit of the invention.
Please refer to Fig. 4~Figure 10 c.It should be noted that diagram provided in the present embodiment only illustrates in a schematic way Basic conception of the invention, only shown in schema then with related component in the present invention rather than package count when according to actual implementation Mesh, shape and size are drawn, when actual implementation kenel, quantity and the ratio of each component can arbitrarily change for one kind, and its Assembly layout kenel may also be increasingly complex.
The schematic diagram of structure after conventional two panels wafer bonding in the prior art as shown in figure 1.Wherein, in wafer 1 ' And wafer 2 ' can generate gaseous state H at 3 ' place of wafer bonding face when being bonded2O, gaseous state H2If O cannot be excluded in time, will The place of wafer bonding face 3 ' is stayed in, forms bubble 4 ', as shown in Figure 2.The part bubble 4 ' can reduce the bonding quality of wafer, influence The yield rate and reliability of device.
Fig. 3 a~3c illustrates the reaction mechanism schematic diagram of two panels wafer bonding conventional in the prior art, due to oxygen atom Electronegativity be greater than silicon atom so that formed stable silicon oxygen singly-bound (Si-O key) 2 electronics closer to oxygen atom, thus silicon Atom band part positive charge (+), oxygen atom band part negative electrical charge (-), in addition, since chemical reaction is all towards being conducive to generate What the direction of gas carried out, so in wafer bonding, when forming stable silicon oxygen singly-bound at the bonding face in two wafers, Inevitably there is gas generation, is such as formed with gaseous state H2O, the gaseous state H of formation2If O cannot be discharged timely, will It is flowed at bonded interface, due to gaseous state H2The volume of O is larger, so will form at bonded interface a large amount of not of uniform size Bubble or hole influence the yield rate and reliability of device to reduce the bonding quality of wafer.So being deposited in this field In the continuous demand reduced and reduce bubble size and quantity at wafer bonding face, therefore there is also various technologies to change Into the method for the tradition wafer bonding.
Based on the above, the present invention provides a kind of wafer bonding method, by generating ammonia at wafer bonding face, with Bubble size and quantity guarantee the yield rate of device to improve the bonding quality of wafer at reduction and reduction wafer bonding face And reliability.
Specifically, the present invention provides a kind of wafer bonding method as shown in Fig. 4 and Fig. 7, comprising the following steps:
S1 provides the first wafer and the second wafer, and first wafer includes the first bonding face, and second wafer includes Second bonding face is formed with the first film layer containing silicon oxygen bond layer on first bonding face, is formed on second bonding face There is the second film layer containing silicon oxygen bond;
S2 introduces silazine link layer in first film layer;
S3 carries out plasma-activated processing to first film layer and second film layer;
S4 starts the cleaning processing first film layer and second film layer;
S5 carries out bonding processing to first film layer and second film layer, forms bonded interface.
Wherein, in bonding process, this bonded interface can generate the ammonia of supercriticality.Due to supercriticality Ammonia there is smaller size relative to the gas under normal pressure, and there is good mobility, thus bonded interface can be reduced The bubble size at place.Compared to the gas of general state, molecule in a supercritical state can have smaller size quite good Good mobility and transfer performance, thus can significantly reduce the bubble size of wafer bonding interface.
Wherein, supercriticality refers to that temperature and pressure are in the fluid of critical point or more supercritical fluid.
The present invention on first bonding face of first wafer by introducing silazine link layer, so that first film Contain silazine link in layer, and by it is plasma-activated handle and cleaning treatment described in the first film layer and second film layer, with Silicon amino is formed in first film layer, and forms silicone hydroxyl in second film layer, passes through silicon amino and silicone hydroxyl afterwards for institute The first film layer and second film layer bonding are stated, to form the ammonia of supercriticality in bonded interface.The object of supercriticality Matter is a kind of dense gaseous state, and density ratio general gas flow wants big two orders of magnitude, and close with liquid, viscosity is smaller than liquid, But diffusion velocity is faster than liquid (about two orders of magnitude), so having preferable mobility and transfer performance, relative on bonding circle It is only generated for vapour molecule at face, the part vapour molecule number in the present invention in bubble is replaced by the ammonia molecule of identical quantity In generation, forms the ammonia of supercriticality in bonding process, and the ammonia of supercriticality has than conventional ammonia or steam at this time Smaller volume, to effectively reduce the final bubble size of bonded interface after bonding.Further, since ammonia reaches overcritical The temperature of state is lower, and annealing temperature can carry out at low temperature, and will not impact to device performance.Crystalline substance can be improved as a result, Round bonding quality, guarantee device yield rate and reliability and reduce manufacturing cost.
Explanation is needed exist for, the purpose of the present invention is reduce and reduce by two panels wafer bonding, and in bonding process The generation of bubble, when bonding, chemical reaction occurs for mainly described first film layer and second film layer to realize described first The bonding of wafer and second wafer.That is relative to bonding process, first wafer and second wafer Property is identical, so first wafer is also possible to second wafer, second wafer is also possible to the first wafer, this First wafer and second wafer can be interchangeable by field technical staff according to example.
Below in conjunction with the attached drawing wafer bonding method that the present invention will be described in detail.
Firstly, carrying out step S1 as shown in the S1 and Fig. 5 and Fig. 6 in Fig. 4), the first wafer 1 and the second wafer 2 are provided, First wafer 1 includes the first bonding face 11, and second wafer 2 includes the second bonding face 21, first bonding face 11 On be formed with the first film layer 12 containing silicon oxygen bond layer 121, second containing silicon oxygen bond is formed on second bonding face 21 Film layer 22.
First wafer 1 and second wafer 2 can be any semiconductor material and be made, such as Si, SiC, SiGe Deng being selected as Si material in the present embodiment.First wafer 1 and second wafer 2 can be carrying effect containing active The less carrying wafer of energy, or the device wafers containing metal line or device, herein with no restrictions.In the present embodiment First wafer 1 is selected to carry wafer, second wafer 2 is device wafers, as shown in fig. 6, second wafer 2 wraps Substrate 23 and dielectric layer 24 are included, metal line or device are formed in the substrate and dielectric layer.
First film layer 12 containing silicon oxygen bond layer 121 can be formed in the present invention using any feasible method, only It wants that silicon oxygen bond can be formed in first film layer 12.It is preferably deposited using chemical vapour deposition technique or boiler tube in the present embodiment Method is in silicon oxide layer deposited 121 on first bonding face 11, to form silicon oxygen bond in first film layer 12.
Second film layer 22 containing silicon oxygen bond can be formed in the present invention using any feasible method, as long as can be Second film layer 22 forms silicon oxygen bond, such as in forming silicon oxide layer or TEOS layers on second bonding face 21.This In embodiment, such as selection is in formation ethyl orthosilicate (TEOS) layer on second bonding face 21.
Then, as shown in the S2 and Fig. 5 and Fig. 8 a in Fig. 4, step S2 is carried out), institute is introduced in first film layer 12 State silazine link layer 122.To which first film layer 12 contains silicon oxygen bond and silazine link, as shown in Figure 8 a.
As an example, including using chemical vapor deposition in the method that first film layer 12 introduces the silazine link layer 122 Area method is in depositing silicon oxy-nitride (SiON) layer in first film layer 12 or fire sand (SiCN) layer.
Continue, as shown in S3 and Fig. 8 a~Fig. 8 b in Fig. 4, carry out step S3), to first film layer 12 and described the Two film layers 22 carry out plasma-activated processing.
As shown in Figure 8 a, plasma-activated processing can interrupt the silicon oxygen bond and silazine link in first film layer 12.Such as Shown in Fig. 8 b, after interrupting the silicon oxygen bond and silazine link, at the silicon atom, oxygen atom and nitrogen-atoms in first film layer 12 In excited state.Similarly, plasma-activated processing can interrupt the silicon oxygen bond in second film layer 22, interrupt the silicon oxygen bond Afterwards, the silicon atom in second film layer 22 and oxygen atom are in excited state.The work gas of the plasma-activated processing Body includes one of nitrogen, oxygen and inert gas or combination.It is nitrogen that the working gas is preferably selected in the present embodiment.
Then, as shown in S4 and Fig. 9 a~Fig. 9 c in Fig. 4, step S4 is carried out), to first film layer 12 and described the Two film layers 22 start the cleaning processing.
As shown in Fig. 9 a and Fig. 9 b, during cleaning treatment, hydrone can be broken down into hydrogen ion and hydroxide ion, Oxygen atom and nitrogen-atoms and the hydrogen ion in first film layer 12 in excited state form silicone hydroxyl and silicon amino, place Silicone hydroxyl is formed in the silicon atom of excited state and the hydroxide ion.After cleaning treatment, keep the silicon atom, oxygen former Son and nitrogen-atoms restore stable state, are formed simultaneously new keys silicon amino, as is shown in fig. 9 c.Similarly, in second film layer 22 Silicone hydroxyl is formed in the oxygen atom and silicon atom of excited state and the hydrogen ion and hydroxide ion.As an example, at cleaning Managing cleaning solution used by first film layer 12 and second film layer 22 includes deionized water.
Finally, as shown in S5 and Figure 10 a~Figure 10 c in Fig. 4, step S5 is carried out), to first film layer 12 and described Second film layer 22 carries out bonding processing, forms bonded interface 3, to form the ammonia of supercriticality in the bonded interface 3.
In bonding process, due to atomic electronegativity O > N > Si > H, nitrogen-atoms electronegativity is greater than silicon atom, so that being formed 2 electronics of N-Si singly-bound are closer to nitrogen-atoms, thus silicon atom band part positive charge (+), similarly oxygen atom band part is negative Charge (-), O-H key gradually weaken with Si-N key, and new keys N-H key and Si-O key increasingly generate, and react the principle that can be gone on smoothly It is because the leaving capability of amino is more stronger than hydroxyl in the reaction system, reaction generates NH3Speed can compare H2O is fast.By In NH3The condition of supercriticality is 132.4 DEG C/11.28Mpa, so to first film layer 12 and second film layer 22 The range of reaction temperature when carrying out bonding processing includes 132.4 DEG C~350 DEG C, so as to reduce the size of bubble, reduces gas The quantity of bubble.
As an example, during being bonded first film layer 12 and the second film layer 22, in the bonded interface 3 It is formed with H2O, the H2The state of O includes gaseous state.
Specifically, due to H2The supercriticality condition of O is 374.1 DEG C/22.06Mpa, therefore described to further decrease The size and quantity of bubble can be by Donor Conditions during being bonded first film layer 12 and the second film layer 22 Control is temperature between 300 DEG C~400 DEG C, and pressure is between 10mTorr~1Torr.
Preferably, it during being bonded first film layer 12 and the second film layer 22, is realized by annealing process First wafer 1 and stablizing for second wafer 2 are bonded, and the supercriticality is generated in annealing process NH3, or use higher temperature and pressure by the gaseous H2The O and NH3It is transformed into supercriticality.
As an example, the wafer bonding method includes being applied to prepare in CMOS or back-illuminated type CMOS front-illuminated.
In conclusion wafer bonding method of the invention, by drawing on first bonding face of first wafer Enter silazine link layer, so as to contain silazine link in first film layer, and by described in plasma-activated processing and cleaning treatment First film layer and second film layer to form silicon amino in first film layer, and form silicone hydroxyl in second film layer, First film layer and second film layer are bonded by silicon amino and silicone hydroxyl afterwards, to form supercritical state in bonded interface The ammonia of state.Part vapour molecule number relative to being only generated for vapour molecule at bonded interface, in the present invention in bubble Mesh is substituted by the ammonia molecule of identical quantity, forms the ammonia of supercriticality in bonding process, at this time the ammonia of supercriticality Gas has smaller volume than conventional ammonia or steam, to effectively reduce the final bubble ruler of bonded interface after bonding It is very little.Further, since the temperature that ammonia reaches supercriticality is lower, annealing temperature can carry out at low temperature, and will not be to device Performance impacts.The bonding quality that wafer can be improved as a result, guarantee device yield rate and reliability and reduce manufacture at This.So the present invention effectively overcomes various shortcoming in the prior art and has high industrial utilization value.
The above-described embodiments merely illustrate the principles and effects of the present invention, and is not intended to limit the present invention.It is any ripe The personage for knowing this technology all without departing from the spirit and scope of the present invention, carries out modifications and changes to above-described embodiment.Cause This, institute is complete without departing from the spirit and technical ideas disclosed in the present invention by those of ordinary skill in the art such as At all equivalent modifications or change, should be covered by the claims of the present invention.

Claims (11)

1. a kind of wafer bonding method, which comprises the following steps:
The first wafer and the second wafer are provided, first wafer includes the first bonding face, and second wafer includes the second key Conjunction face is formed with the first film layer containing silicon oxygen bond layer on first bonding face, be formed on second bonding face containing Second film layer of silicon oxygen bond;
Silazine link layer is introduced in first film layer;
Plasma-activated processing is carried out to first film layer and second film layer;
First film layer and second film layer are started the cleaning processing;
Bonding processing is carried out to first film layer and second film layer, forms bonded interface.
2. wafer bonding method according to claim 1, it is characterised in that: be bonded first film layer and described second During film layer, the ammonia of supercriticality is formed in the bonded interface.
3. wafer bonding method according to claim 1, it is characterised in that: be bonded first film layer and described second During film layer, it is formed with water in the bonded interface, the state of the water includes gaseous state.
4. wafer bonding method according to claim 1, it is characterised in that: form first film containing silicon oxygen bond layer The step of layer includes using chemical vapour deposition technique or boiler tube sedimentation in silicon oxide layer deposited on first bonding face.
5. wafer bonding method according to claim 1, it is characterised in that: form second film layer containing silicon oxygen bond The step of be included on second bonding face and form silicon oxide layer or teos layer.
6. wafer bonding method according to claim 1, it is characterised in that: introduce the silicon nitrogen in first film layer The step of key layer includes using chemical vapour deposition technique in depositing silicon oxynitride silicon layer or fire sand layer in first film layer.
7. wafer bonding method according to claim 1, it is characterised in that: the first film layer described in cleaning treatment and described The step of two film layers, used cleaning solution included deionized water.
8. wafer bonding method according to claim 1, it is characterised in that: be bonded first film layer and described second In the step of film layer, further include the steps that annealing.
9. wafer bonding method according to claim 8, it is characterised in that: in the annealing steps, annealing temperature is situated between In 300 DEG C~400 DEG C, pressure of annealing is between 10mTorr~1Torr.
10. wafer bonding method according to claim 1, it is characterised in that: the work of the plasma-activated processing Gas includes one of nitrogen, oxygen and inert gas or combination.
11. wafer bonding method according to claim 1, it is characterised in that: the wafer bonding method includes being applied to It prepares in CMOS or back-illuminated type CMOS front-illuminated.
CN201811281935.6A 2018-10-31 2018-10-31 Wafer bonding method Pending CN109411340A (en)

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Cited By (7)

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Publication number Priority date Publication date Assignee Title
CN110223996A (en) * 2019-06-20 2019-09-10 德淮半导体有限公司 Wafer assembly and forming method thereof
CN110289209A (en) * 2019-07-05 2019-09-27 长春长光圆辰微电子技术有限公司 A kind of processing method of SOI wafer
CN110364427A (en) * 2019-07-17 2019-10-22 德淮半导体有限公司 Wafer bonding method
CN112117326A (en) * 2020-09-25 2020-12-22 中国科学院半导体研究所 Preparation method of MOS (Metal oxide semiconductor) device and MOS device
CN112951713A (en) * 2021-02-07 2021-06-11 长春长光圆辰微电子技术有限公司 Processing method of small-size wafer
CN113345803A (en) * 2021-05-31 2021-09-03 长江存储科技有限责任公司 Wafer bonding method
CN114420549A (en) * 2022-03-31 2022-04-29 深圳新声半导体有限公司 Method for bonding silicon dioxide surface and silicon surface at low temperature

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US20040152282A1 (en) * 2000-02-16 2004-08-05 Ziptronix, Inc. Method for low temperature bonding and bonded structure

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110223996A (en) * 2019-06-20 2019-09-10 德淮半导体有限公司 Wafer assembly and forming method thereof
CN110289209A (en) * 2019-07-05 2019-09-27 长春长光圆辰微电子技术有限公司 A kind of processing method of SOI wafer
CN110364427A (en) * 2019-07-17 2019-10-22 德淮半导体有限公司 Wafer bonding method
CN112117326A (en) * 2020-09-25 2020-12-22 中国科学院半导体研究所 Preparation method of MOS (Metal oxide semiconductor) device and MOS device
CN112951713A (en) * 2021-02-07 2021-06-11 长春长光圆辰微电子技术有限公司 Processing method of small-size wafer
CN113345803A (en) * 2021-05-31 2021-09-03 长江存储科技有限责任公司 Wafer bonding method
CN114420549A (en) * 2022-03-31 2022-04-29 深圳新声半导体有限公司 Method for bonding silicon dioxide surface and silicon surface at low temperature

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