CN108733583A - Improve the pre-head method and system of NVMe SSD alphabetic data reading performances - Google Patents
Improve the pre-head method and system of NVMe SSD alphabetic data reading performances Download PDFInfo
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Abstract
The invention discloses a kind of pre-head methods and system improving NVMe SSD alphabetic data reading performances, are related to the technical field of NVMe SSD alphabetic datas reading.This method comprises the following steps：By the order in different types of alphabetic data read command sequence SQ, command process sequence is formed after arbitration, and according to the different type by command catalog；When the preceding n order of same class order is read out, from (n+1)th order in such order, remaining corresponding data of order is formed into a pre- read command queue in order, is stored in data buffer storage, for subsequently reading.The system includes：Order prefetches module, command processing module and data pre-head module.The present invention can carry out classification processing to the order in command process queue, and pre-head method is made to come into force, and data are loaded into cache by guarantee in advance, are improved the reading performance of alphabetic data, are extended the service life of SSD.
Description
Technical field
The present invention relates to the technical fields that NVMe SSD alphabetic datas are read, and it is suitable to be specifically related to a kind of raising NVMe SSD
Ordinal number according to reading performance pre-head method and system.
Background technology
Hard disk, including (Solid State Drive, solid-state are hard by HDD (Hard Disk Drive, mechanical hard disk) and SSD
Disk), wherein the data storage device that SSD is made of several NAND FLASH arrays.In order to improve the property of alphabetic data reading
It can, it will usually pre-head method is designed in its firmware, is analyzed by the command sequence sent to main frame HOST, when
When monitoring alphabetic data read operation, the data that firmware in advance will can read HOST are relatively slow from access speed
It is loaded into non-volatile memory medium in hard drive internal cache.When the data read command that HOST is subsequently sent hits height
When speed caching, firmware can directly transfer data to HOST from caching, reduce due to accessing low speed non-volatile memory medium
Caused by order delay increase and bandwidth decline.
In the design of existing pre-head method, firmware is judging that a HOST command sequence is that alphabetic data reads behaviour
When making, be primarily to see whether be all HOST read commands and front and back order starting LBA and Data Block quantity, when after
The end LBA consecutive hourss of the starting LBA and previous pen order of one order, you can it is determined as alphabetic data read command sequence,
Pre-head method comes into force at this time, the pre- read operation of log-on data.In order to safeguard the context of data pre-head, it will usually design a data
Queue is pre-read to manage the state of data pre-head operation, when firmware continues HOST data read commands after treatment, by inquiring this
Data pre-head queue judges whether the order hits cache.
By taking the NVMe SSD of Fig. 1 as an example, NVMe (NVM (Non-Volatile Memory) Express), one kind is based on
The SSD interface agreement of PCIe (PCI Express) data transmission.In figure, Single Function are with simple function unit
PCIe device, HOST be the NVMe SSD create N SQ (Submission Queue, command sequence) is responsible for SSD send out
It loses one's life order.Wherein, SQ 0 is Admin Submission Queue, is responsible for sending Admin orders to SSD, other SQ are I/O
Submission Queue are responsible for sending I/O orders to SSD.NVMe controllers can obey the order according to preset arbitration rules
It enables obtaining in queue 0~SQ of SQ N and orders and order is sent to by command process queue (Command ProcessQueue)
Processing module (Command Processor) is handled.
In Fig. 1, the ends HOST application program or system service process give SSD transmission data reading orders by SQ 1, other
SQ is idle state, does not order and needs to handle.Order in SQ 1 is taken out and by command process team by NVMe controllers
Row are given command processing module and are handled, when command processing module finds end LBA (the Logical Block of order A0
Address, mathematical logic block address) and order A1 starting LBA consecutive hourss, pre-head method comes into force, and is handling order
After A1, the pre- read through model of notification data (Read Ahead) by HOST orders A2, A3 ... relevant data are from NAND FLASH
It is loaded into cache in advance.As command processing module start to process HOST order A2, it is found that its data hit high speed is slow
It deposits, is directly transmitted to HOST from corresponding cache location by the data corresponding to HOST orders A2.Meanwhile pre- read through model continue from
NAND FLASH load new data to ensure that follow-up HOST orders can continue to hit caching.
Above-mentioned pre-head method is design most commonly seen in current SSD (including SATA SSD and NVMe SSD) firmware, should
Strategy has great help to promoting SSD alphabetic data reading performances.The design is to there was only HOST command queue
For SATASSD, requirement has been fully met, but for the NVMe SSD for possessing a plurality of HOST command queues, it is this
Pre-head method in some cases, especially concurrently accesses SSD more frequency in the ends HOST application program or system service process
In the case of numerous, pre-head method cannot come into force, and alphabetic data reading performance is caused to decline.
Since existing pre-head method only focuses on starting LBA and Data the Block (data blocks, in hard disk of HOST read commands
Store the minimum logic unit of data) quantity, for the NVMe SSD for supporting to create a plurality of I/O SQ, command process mould
The command process sequence that block receives is actually result of the order after arbitration in a plurality of SQ.Therefore, multiple at the ends HOST
Thread concurrently accesses under the application scenarios of SSD, be sent to originally alphabetic data reading order in certain I/O SQ can because
The SQ arbitration mechanisms of NVMe and be disturbed, cause pre-head method failure (i.e. alphabetic data read command sequence is not identified
Come), or even pre- read command and HOST read commands repetition can be caused to load identical data from NAND FLASH and instead result in and be
Performance of uniting declines.It is exemplified below the analysis of cases of two kinds of pre-head methods failure.
Shown in Figure 2, some application program at the ends HOST sends alphabetic data read command sequence by SQ 1, simultaneously
The other application at the ends HOST is sent and the no any associated order of order in SQ 1 by SQ 2 and SQ 3 respectively.Passing through
In command process sequence after arbitration, B0 and C0 are inserted between order A0 and A1, and A0 and B0 are not that continuous data is read
Operation.Therefore, the alphabetic data read command sequence in SQ 1 is not identified, and pre-head method does not come into force, command process
Module would not be that not yet processed order shifts to an earlier date pre-reads data in SQ 1.
Referring to as shown in figure 3, if the different application at the ends HOST passes through Function 0_SQ 1, Function 1_ respectively
SQ 1, Function 2_SQ 1 send order, other SQ are idle state.Wherein, the order in Function 0_SQ 1
Queue is alphabetic data read operation, but in the command sequence after arbitration, B0 and C0 are inserted between order A0 and A1,
Command processing module find A0 and B0 be not continuous data read operation, would not Function 0_SQ 1 order start number
According to pre- read operation.Since pre-head method does not come into force, command processing module can not be not yet processed in Function 0_SQ 1
Order prepares data in advance, repeats to load from NAND FLASH so as to cause HOST read commands and data pre-head order identical
Data make system performance decline instead, and therefore increase the access times to NAND FLASH, and Data is kept to data
The influence of Retention (the integrality degree for being recorded in data in Nonvolatile memory medium), influences NAND indirectly
The service life of FLASH, to influence the service life of SSD.
Invention content
The purpose of the invention is to overcome the shortcomings of above-mentioned background technology, a kind of raising NVMe SSD alphabetic datas are provided
The pre-head method and system of reading performance.The present invention can carry out classification processing to the order in command process queue, make to pre-read
Method comes into force, and data are loaded into cache by guarantee in advance, to improve the reading performance of alphabetic data, extend SSD's
Service life.
The present invention provides a kind of pre-head method improving NVMe SSD alphabetic data reading performances, and this method includes following step
Suddenly：
By the order in different types of alphabetic data read command sequence SQ, command process sequence is formed after arbitration,
And according to the different type by command catalog；
When the preceding n order of same class order is read out, from (n+1)th order in such order, remaining is ordered
Corresponding data form a pre- read command queue in order, are stored in data buffer storage, for subsequently reading, wherein n >=2.
Based on the above technical solution, when the command process queue is by the PCIe device with simple function unit
When generation, according to SQ ID to the command catalog in command process sequence.
Based on the above technical solution, when the command process queue is by with multiple functional unit Function's
When PCIe device generates, according to SQ ID and Function ID to the command catalog in command process sequence.
Based on the above technical solution, in the preceding n order, the end mathematical logic block of previous order
The starting LBA of location LBA and latter command is continuous.
Based on the above technical solution, when in data buffer storage exist order corresponding data when, the data directly from
It is spread out of in data buffer storage.
The present invention also provides a kind of pre- read apparatus improving NVMe SSD alphabetic data reading performances, which includes：
Order prefetches module, for arbitrating the order in different types of alphabetic data read command sequence SQ to form life
Enable processing sequence；
Command processing module is used to that the command catalog of command process sequence to be worked as same class according to the different type
The preceding n order of order is read out, and from (n+1)th order in such order, remaining order is initiated to data pre-head module
Data pre-head request, wherein n >=2；
Data pre-head module is used to be asked according to different data pre-heads, by the corresponding data of same class order by suitable
Sequence forms a pre- read command queue, is stored in data buffer storage.
Based on the above technical solution, when the command process queue is by the PCIe device with simple function unit
When generation, command processing module is according to SQ ID to the command catalog in command process sequence.
Based on the above technical solution, when the command process queue is by with multiple functional unit Function's
When PCIe device generates, command processing module is according to SQ ID and Function ID to the command catalog in command process sequence.
Based on the above technical solution, when command processing module reads the first two order, the end of previous order
The starting LBA consecutive hourss of mathematical logic block address LBA and latter command, command processing module are initiated to data pre-head module
The data pre-head request of remaining order.
Based on the above technical solution, when there are the corresponding data of order in data buffer storage, data pre-head module
The data are directly spread out of from data buffer storage.
Compared with prior art, advantages of the present invention is as follows：
(1) present invention carries out at classification command process queue according to the different type each ordered in command process queue
Reason, solves the problems, such as that the command sequence in a plurality of SQ interferes with each other and pre-head method is caused to fail, so as to avoid due to pre-
Reading method fails, and so that the digital independent performance of SSD is affected, and being embodied in order delay increases, digital independent band
The problems such as width declines.
(2) present invention will order corresponding data to form a pre- read command queue in order and be stored in data buffer storage,
Convenient for the state of management data pre-head operation, while safeguarding the context of data pre-head.Moreover, handling follow-up HOST data reads life
When enabling, can directly pre-reading queue by inquiring this data judges whether the order hits cache, accelerate reading
Speed further improves the reading performance of alphabetic data.
(3) pre-head method of the invention greatly reduces HOST read commands and data pre-head order is repeated from NAND
The probability that identical data is loaded on FLASH, reduces the access to NAND FLASH, improves Information Security and extends NAND
The service life of FLASH.
Description of the drawings
Fig. 1 is a kind of existing NVMe SSD data pre-head methods.
Fig. 2 be the pre-head method of the existing PCIe device (i.e. Single Function) with simple function unit not
The schematic diagram to come into force.
Fig. 3 is that the pre-head method of the existing PCIe device (i.e. Multi-Function) with multiple functional units is not given birth to
The schematic diagram of effect.
Fig. 4 is pre-reading for PCIe device (i.e. the Single Function) that the embodiment of the present invention has simple function unit
The schematic diagram that method comes into force.
Fig. 5 is the side of pre-reading for the PCIe device (i.e. Multi-Function) that the embodiment of the present invention has multiple functional units
The schematic diagram that method comes into force.
Specific implementation mode
Below in conjunction with the accompanying drawings and specific embodiment the present invention is described in further detail.
The embodiment of the present invention provides a kind of pre-head method improving NVMe SSD alphabetic data reading performances, and this method includes
Following steps：
By the order in different types of alphabetic data read command sequence SQ, command process sequence is formed after arbitration,
And according to the different type by command catalog.
When the preceding n order of same class order is read out, from (n+1)th order in such order, remaining is ordered
Corresponding data form a pre- read command queue in order, are stored in data buffer storage, for subsequently reading, wherein n >=2.
Specifically, in preceding n order, the end LBA of previous order (Logical Block Address, mathematical logic block
Location) and the starting LBA of latter command it is continuous.
When existing in data buffer storage, when ordering corresponding data, which directly spreads out of from data buffer storage.Digital independent
Order orders corresponding data by inquiring pre- read command queue, to judge to exist in data buffer storage.
Wherein, when command process queue is generated by the PCIe device with simple function unit, according to SQ ID to order
Command catalog in processing sequence.
When command process queue is generated by the PCIe device with multiple functional unit Function, according to SQ ID and
Function ID are to the command catalog in command process sequence.
The embodiment of the present invention also provides a kind of pre- read apparatus improving NVMe SSD alphabetic data reading performances, the system packet
It includes：Order prefetches module, command processing module and data pre-head module；
Wherein, order prefetches module for shape to be arbitrated in the order in different types of alphabetic data read command sequence SQ
At order processing sequence.
Command processing module is used for according to different type by the command catalog of command process sequence, before same class order
N order is read out, and from (n+1)th order in such order, it is pre- to initiate the data that remaining is ordered to data pre-head module
Read request, wherein n >=2.
Data pre-head module is used to be asked according to different data pre-head, by the corresponding data of same class order shape in order
At a pre- read command queue, it is stored in data buffer storage.
When command process queue is generated by the PCIe device with simple function unit, command processing module is according to SQ
ID is to the command catalog in command process sequence.
When command process queue is generated by the PCIe device with multiple functional unit Function, command processing module
According to SQ ID and Function ID to the command catalog in command process sequence.
Specifically, when command processing module reads the first two order, the end mathematical logic block address of previous order
The starting LBA consecutive hourss of LBA and latter command, the data that command processing module initiates remaining order to data pre-head module are pre-
Read request.When existing in data buffer storage, when ordering corresponding data, data pre-head module is by the data directly from data buffer storage
Outflow.
Order prefetches module and obtains order from multiple command sequence SQ according to preset arbitration rules.Actually answering
In, since NVMe agreements are supported to create a plurality of SQ, the application program of HOST and system service can pass through different SQ
It sends and orders to SSD simultaneously.When multiple SQ simultaneously have order etc. it is pending when, NVMe controllers are advised according to preset arbitration
It is then obtained from these SQ and orders and be sent to command processing module processing, common rule is that the order in Admin SQ is preferentially located
It manages, dispatch of taking turns mechanism is taken in the order in I/O SQ.Therefore, the sequence of command processing module processing order is all SQ arbitrations
Command sequence afterwards, arbitration result not only depends on preset arbitration mechanism, but also depends on the states of each SQ at that time.For
For the NVMe SSD for supporting Multi-Function, command sequence that command processing module receives be first pass through it is each above-mentioned
Arbitration inside Function between each SQ, using the arbitration between each Function.It is common rule for
Inside Function, dispatch of taking turns mechanism is taken in the order priority processing in Admin SQ, the order in I/O SQ；?
Dispatch of taking turns mechanism is taken between Function.Therefore arbitration result depends on preset arbitration mechanism and owns
The state inside all SQ in Function.
Embodiment one
Shown in Figure 4, based on the above technical solution, the present embodiment uses Single Function NVMe
SSD maintains four datas and pre-reads queue, can at most meet four alphabetic datas simultaneously and pre-read thread, the value of n is 2.Figure
In, RR indicates that polling mechanism, Priority indicate priority processing, have the pre- read command sequence of alphabetic data in SQ1, SQ2 and SQ3
Row, other SQ are idle state, and command processing module can be to the command process queue after arbitration, according to the SQ ID of each order
Information is done to be handled respectively.
It is pre- to data when command processing module monitors that order A0, A1 are from SQ1 alphabetic data read command sequences
Read through model initiates data pre-head request, in advance will order A2, A3 ... data be loaded into data buffer storage, and by pre- read command
The data pre-head context from SQ 1 is safeguarded in queue 0 (Prefetch Queue 0).
When command processing module monitors that order B0, B1 are from 2 alphabetic data read command sequences of SQ, to data
Pre- read through model initiates data pre-head request, will order in advance B2, B3 ... data be loaded into data buffer storage, and ordered by pre-reading
Queue 1 (Prefetch Queue 1) is enabled to safeguard the data pre-head context from SQ 2.
When command processing module monitors that order C0, C1 are from 3 alphabetic data read command sequences of SQ, to data
Pre- read through model initiates data pre-head request, will order in advance C2, C3 ... data be loaded into data buffer storage, and ordered by pre-reading
Queue 2 (Prefetch Queue 2) is enabled to safeguard the data pre-head context from SQ 3.
It can be seen that as start to process order A2, B2, C2, A3, B3, C3 ..., these orders can hit different respectively
Data buffer storage simultaneously directly transmits HOST, without being obtained from NAND FLASH.SQ1, SQ2 and SQ3's pre-reads tactful judgement
And data pre-head information will not all interfere with each other.
Embodiment two
Referring to as shown in figure 5, based on the above technical solution, the present embodiment uses Multi-Function NVMe
SSD maintains four datas and pre-reads queue, can at most meet four alphabetic datas simultaneously and pre-read thread, the value of n is 2.Figure
There is the pre- read command sequence of alphabetic data in middle Function 0_SQ 1, Function 1_SQ 1 and Function 2_SQ 1
Row, every other SQ are idle state, command processing module can to the command sequence after arbitration according to the SQ ID that each order with
Function ID carry out classification processing to command process queue.
When command processing module monitors that order A0, A1 are from 1 alphabetic data reading order sequences of Function 0_SQ
When row, to data pre-head module initiate data pre-head request, in advance by A2, A3 ... data be loaded into data buffer storage, and by
Pre- read command queue 0 (Prefetch Queue 0) safeguards the data pre-head context from SQ 1.
When command processing module monitors that order B0, B1 are from 1 alphabetic data reading order sequences of Function 1_SQ
When row, to data pre-head module initiate data pre-head request, in advance by B2, B3 ... data be loaded into data buffer storage, and by
Pre- read command queue 1 (Prefetch Queue 1) safeguards the data pre-head context from SQ 2.
When command processing module monitors that order C0, C1 are from 1 alphabetic data reading order sequences of Function 2_SQ
When row, to data pre-head module initiate data pre-head request, in advance by C2, C3 ... data be loaded into data buffer storage, and by
Pre- read command queue 2 (Prefetch Queue 2) safeguards the data pre-head context from Function 2_SQ 1.
It can be seen that as start to process order A2, B2, C2, A3, B3, C3 ..., these orders can hit different respectively
Data buffer storage simultaneously directly transmits HOST, without being obtained from NAND FLASH.Function 0_SQ 1,Function 1_
SQ 1 and Function 2_SQ 1 pre-read strategy judgement and data pre-head information will not all interfere with each other.
Those skilled in the art can be carry out various modifications to the embodiment of the present invention and modification, if these modifications and change
For type within the scope of the claims in the present invention and its equivalent technologies, then these modifications and variations are also in protection scope of the present invention
Within.
The prior art that the content not being described in detail in specification is known to the skilled person.
Claims (10)
1. a kind of pre-head method improving NVMe SSD alphabetic data reading performances, which is characterized in that include the following steps：
By the order in different types of alphabetic data read command sequence SQ, command process sequence is formed after arbitration, and press
According to the different type by command catalog；
When the preceding n order of same class order is read out, from (n+1)th order in such order, remaining order is corresponded to
Data form a pre- read command queue in order, be stored in data buffer storage, for subsequently reading, wherein n >=2.
2. improving the pre-head method of NVMe SSD alphabetic data reading performances as described in claim 1, it is characterised in that：Work as institute
State command process queue by with simple function unit PCIe device generate when, according to SQ ID in command process sequence
Command catalog.
3. improving the pre-head method of NVMe SSD alphabetic data reading performances as described in claim 1, it is characterised in that：Work as institute
State command process queue by with multiple functional unit Function PCIe device generate when, according to SQ ID and Function
ID is to the command catalog in command process sequence.
4. improving the pre-head method of NVMe SSD alphabetic data reading performances as described in claim 1, it is characterised in that：It is described
In preceding n order, the end mathematical logic block address LBA of previous order and the starting LBA of latter command are continuous.
5. improving the pre-head method of NVMe SSD alphabetic data reading performances as described in claim 1, it is characterised in that：Work as number
According to existing in caching, when ordering corresponding data, which directly spreads out of from data buffer storage.
6. a kind of pre- read apparatus improving NVMe SSD alphabetic data reading performances, which is characterized in that including：
Order prefetches module, to be formed at order for arbitrating the order in different types of alphabetic data read command sequence SQ
Manage sequence；
Command processing module is used for according to the different type by the command catalog of command process sequence, when same class order
Preceding n order be read out, from such order (n+1)th order, to data pre-head module initiate remaining order number
According to pre- read request, wherein n >=2；
Data pre-head module is used to be asked according to different data pre-head, by the corresponding data of same class order shape in order
At a pre- read command queue, it is stored in data buffer storage.
7. improving the pre- read apparatus of NVMe SSD alphabetic data reading performances as claimed in claim 6, it is characterised in that：Work as institute
State command process queue by with simple function unit PCIe device generate when, command processing module according to SQ ID to order
Command catalog in processing sequence.
8. improving the pre- read apparatus of NVMe SSD alphabetic data reading performances as claimed in claim 6, it is characterised in that：Work as institute
State command process queue by with multiple functional unit Function PCIe device generate when, command processing module is according to SQ
ID and Function ID are to the command catalog in command process sequence.
9. improving the pre- read apparatus of NVMe SSD alphabetic data reading performances as claimed in claim 6, it is characterised in that：Order
When processing module reads the first two order, for terminating mathematical logic block address LBA and latter command of previous order
Beginning LBA consecutive hours, command processing module initiate remaining data pre-head request ordered to data pre-head module.
10. improving the pre- read apparatus of NVMe SSD alphabetic data reading performances as claimed in claim 6, it is characterised in that：When
When there are the corresponding data of order in data buffer storage, data pre-head module directly spreads out of the data from data buffer storage.
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