CN108536614A - A kind of direct random write implementation method of Flash, device and storage medium - Google Patents
A kind of direct random write implementation method of Flash, device and storage medium Download PDFInfo
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- CN108536614A CN108536614A CN201810286924.0A CN201810286924A CN108536614A CN 108536614 A CN108536614 A CN 108536614A CN 201810286924 A CN201810286924 A CN 201810286924A CN 108536614 A CN108536614 A CN 108536614A
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- 238000000034 method Methods 0.000 title claims abstract description 19
- 241001269238 Data Species 0.000 claims description 10
- 238000003672 processing method Methods 0.000 claims description 2
- 230000009286 beneficial effect Effects 0.000 abstract description 2
- 238000005516 engineering process Methods 0.000 description 5
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000004891 communication Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
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- 235000013399 edible fruits Nutrition 0.000 description 1
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
- G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/72—Details relating to flash memory management
- G06F2212/7202—Allocation control and policies
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/72—Details relating to flash memory management
- G06F2212/7206—Reconfiguration of flash memory system
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Abstract
The present invention provides a kind of direct random write implementation methods of Flash, in turn includes the following steps：S110：Obtain Flash sizes and Flash block sizes；S120：Obtain offset address and to be written data length of the data first address to be written relative to Flash；S130：The Block blocks and block bias internal of Flash where calculating data to be written；S140：According to data length to be written and the block bias internal of opposite Flash, the corresponding Block block numbers of data to be written are calculated.The beneficial effects of the invention are as follows need to wipe and by block erasing characteristic before writing using Flash, according to Flash self-capacities size and block size, data to be written are deviated relative to Flash and data byte length, calculate the Flash Block blocks serial numbers and block bias internal that data to be written to be written, utilize the memory of one piece of Flash Block block size, pass through reading, it replaces, the operations such as write-in, so that Flash is independent of the middle layers such as MTD or Flash File System, it can arbitrary address in directly random write Flash, the continuous data of random length byte.
Description
Technical field
The present invention relates to communication and field of computer technology, more particularly, to a kind of direct random write implementation methods of Flash,
Device and storage medium.
Background technology
The characteristic that Flash is needed to wipe before writing and be wiped by block makes it not depend on MTD (Memory
Technology Device, memory techniques equipment) etc. middle layers or when Flash File System cannot direct random write.It is certain
There are the middle layers such as no MTD and the demands of the direct random write Flash of Flash File System for special scenes；Or embedded
Under environment, it is desirable that final executable file is small as far as possible, and when cutting can also remove the middle layers such as MTD but may need past
Some runtime datas are written in Flash.Patent of the present invention provides a kind of no MTD middle layers or Flash File System feelings
Direct random write Flash under condition.
Invention content
The invention aims to solve defect and deficiency of the existing technology, a kind of direct random writes of Flash are provided
Implementation method so that Flash, can be directly random independent of the middle layers such as MTD or Flash File System
Write arbitrary address in Flash blocks, random length byte continuous data, be especially suitable for x86, it is domestic soar, all places such as Godson
Manage device architecture platform.
In order to solve the above technical problems, the technical solution adopted by the present invention is：A kind of direct random write realization sides Flash
Method in turn includes the following steps：
S110：Obtain Flash sizes and Flash block sizes；
S120：Obtain offset address and to be written data length of the data first address to be written relative to Flash；
S130：The Block blocks and block bias internal of Flash where calculating data to be written；
S140：According to data length to be written and the block bias internal of opposite Flash, it is corresponding to calculate data to be written
Block block numbers.
Preferably, further include between the step S120 and step S130：
Judge the data to be written whether more than Flash sizes；
If so, the end that reports an error；
If if not, thening follow the steps S003.
Preferably, the step S130, the Block blocks of Flash, judge result of calculation packet where calculating data to be written
It includes：
S131：Data to be written are in a Block block of Flash；
S132：Two difference Blocks of the data to be written across Flash；
S133：Multiple Block blocks of the data to be written across Flash.
Preferably, when judging result is S131, following steps are executed successively：
S311：Apply for the memory of one section of Flash Block block size；
S312：It reads in the memory applied in Block block number evidences to the S301 to be written；
S313：The data of corresponding position in the memory applied are replaced with data to be written；
S314：The internal storage data of this section of Block size length is written to Flash relevant blocks.
Preferably, when judging result is S132, following steps are executed successively：
S321：Apply for the memory of one section of Flash Block block size；
S322：It reads first Flash Block block number evidences to be written and arrives the memory；
S323：With block bias internal address in data to be written replacement memory to the data of the Block blocks end；
S324：Replaced this section of Block length internal storage datas are written to Flash corresponding blocks；
S325：It reads next Flash Block block number evidences to be written and arrives memory；
S326：The remaining data to be written in memory beginning are replaced；
S327：Replaced internal storage data is written to the Flash Block.
Preferably, when judging result is S133, following steps are executed successively：
S331：The write-in of two Block block number evidences from beginning to end；
S332：The write-in of intermediate Block block numbers evidence；
Preferably, the step S331 includes：
S3311：Apply for the memory of one section of Flash Block block size；
S3312：It reads the Flash Block block number evidences to be written of head and the tail two and arrives the memory；
S3313：With block bias internal address in data to be written replacement memory to the data of the Block blocks end；
S3314：Replaced this section of Block length internal storage datas are written to Flash corresponding blocks；
S3315：It reads next Flash Block block number evidences to be written and arrives memory；
S3316：The remaining data to be written in memory beginning are replaced；
S3317：Replaced internal storage data is written to the Flash Block.
Preferably, the step S332 includes：
S3321：By record data to be written every time write-in after offset, with waiting for for offset the latter Block length
Write-in data replace the correspondence Block blocks that Flash is written in data in EMS memory again；
S3322：Every time after write-in, the offset for recording data to be written increases a Block length byte, until remaining
A Block length of the inadequate Flash of data to be written.
A kind of direct random write realization devices of Flash, including：
First data acquisition module：For obtaining Flash sizes and Flash block sizes；
Second data acquisition module：For obtaining data first address to be written relative to the offset address of Flash and to be written
Enter data length byte；
First computing module：Block blocks and block bias internal for Flash where calculating data to be written；
Second computing module：For calculating the corresponding Block block numbers of data to be written.
A kind of storage medium, the storage medium store a plurality of instruction, and a plurality of instruction is suitable for running on computers
When so that the computer executes the data processing method.
The invention has the advantages and positive effects that due to the adoption of the above technical scheme：
It, can be in directly random write Flash 1. in the case where not needing the middle layers such as MTD or Flash File System
The continuous data of arbitrary address, random length byte, this realization method be suitable for x86, it is domestic soar, all processors such as Godson
Architecture platform；
It is big according to Flash self-capacities size and block 2. needing erasing before being write using Flash and by block erasing characteristic
Data small, to be written are deviated relative to Flash and data byte length, calculate the data to be written Flash Block to be written
Block serial number and block bias internal, it is real by flows such as reading, replacement, write-ins using the memory of one piece of Flash Block block size
The direct random write to Flash is showed.
Description of the drawings
Fig. 1 is the direct random write overview flow charts of Flash；
Fig. 2 is that the direct random writes of Flash initialize beginning flow chart；
Fig. 3 is the direct random writes of Flash data to be written flow chart in the same Block；
Fig. 4 is the direct random writes of Flash data to be written flow chart in two difference Block；
Fig. 5 is the direct random writes of Flash data to be written flow chart in multiple Block.
Specific implementation mode
This example provides a kind of direct random write implementation methods of Flash, the direct random write overview flow chart such as Fig. 1 of Flash
Shown, steps are as follows for specific embodiment：
First, according to Fig. 2, the direct random write initialization beginning flows of Flash obtain Flash sizes and Block is big
The information such as small, data to be written are deviated relative to Flash and the information such as length：
Step S201：Obtain Flash size flash_size and Flash block sizes block_len；
Step S202：Obtain data to be written the offset address addr_off with respect to Flash and data byte length data_
len；
Step S203：Judge whether data to be written exceed Flash magnitude ranges.Write-in is terminated if exceeding, it is no
Then, into next step；
Step S204：The Block blocks of Flash where calculating data to be written：Block_num=addr_off/block_
len；
Step S205：The block bias internal of Flash where calculating data to be written：Block_addr_off=addr_off%
block_len；
According to the offset address of data to be written and byte length determine data to be written across Flash Block block numbers.
If data to be written, in a Block block, according to Fig. 3 data to be written, flow chart executes in the same Block；Such as
Fruit data to be written are across two Block blocks, then according to Fig. 4 data to be written, flow chart executes in two difference Block；If
Data to be written are across multiple Block blocks, then according to Fig. 5 data to be written, flow chart executes in multiple Block.
When data to be written are in a Block of Flash, as shown in figure 3, embodiment step is as follows：
Step S301：Apply for the memory of one section of block_size size, reads Flash block_num block numbers according in
It deposits；
Step S302：Memory make and break section [block_addr_off, (block_addr_off+data_len)) data use
Data cover to be written, other interval censored datas remain unchanged；
Step S303：Replaced internal storage data is simultaneously written to Flash by erasing Flash block_num blocks should
Block_num blocks；
Data to be written are when two difference Block of Flash, as shown in figure 4, embodiment step is as follows：
Step S401：Apply for the memory of one section of block_size size, reads Flash block_num block numbers according in
It deposits；
Step S402：Memory make and break section [block_addr_off, (block_len-block_addr_off)) data
With data interval to be written [0, (block_len-block_addr_off)) data cover, other interval censored datas remain unchanged
Step S403：Replaced internal storage data is simultaneously written to Flash by erasing Flash block_num blocks should
Block_num blocks；
Step S404：Apply for the memory of one section of block_size size, reads Flash (block_num+1) block number evidence
To memory；
Step S405:Memory make and break section [0, data_len-(block_len-block_addr_off)] data are with waiting for
Be written data interval [(block_len-block_addr_off), data_len) data cover, other interval censored datas are constant；
Step S406：Replaced internal storage data is simultaneously written to Flash by erasing Flash (block_num+1) blocks should
(block_num+1) block；
Data to be written are when multiple and different Block of Flash, as shown in figure 5, embodiment step is as follows：
Step S501, S502, S503 with data to be written across two difference Block of Flash step S401, S402,
S403 is consistent；
Step S504：The memory block for applying for one section of block_len size, data-bias (block_len- to be written
Block_addr_off+block_len*N) the block_len length datas after (N 0.1.2 ...) copy the memory block to；
Step S505：It wipes Flash (block_num+M) (M 1.2 ...) block and replaced internal storage data is written
It should (block_num+M) block to Flash；
Step S506：Judge whether remaining data length to be written is less than Flash block size block_len, if it is not, then weighing
Step S504, S505, S506 are executed again, if so, thening follow the steps S507；
Step S507：Apply for the memory of one section of block_len size, reads Flash (block_num+ (M+1)) block number
According to memory；
Step S508：Memory make and break section [0, (data_len- ((block_len-block_addr_off)+block_
Len*N))) data data interval to be written [((block_len-block_addr_off)+block_len*N), data_
Len) data cover, other interval censored datas are constant
Step S509：Erasing Flash (block_num+ (M+1)) blocks are simultaneously written to replaced internal storage data
Flash (block+ (M+1)) block；
The beneficial effects of the invention are as follows：
It, can be in directly random write Flash 1. in the case where not needing the middle layers such as MTD or Flash File System
The continuous data of arbitrary address, random length byte, this realization method be suitable for x86, it is domestic soar, all processors such as Godson
Architecture platform；
It is big according to Flash self-capacities size and block 2. needing erasing before being write using Flash and by block erasing characteristic
Data small, to be written are deviated relative to Flash and data byte length, calculate the data to be written Flash Block to be written
Block serial number and block bias internal, it is real by flows such as reading, replacement, write-ins using the memory of one piece of Flash Block block size
The direct random write to Flash is showed.
Some vocabulary has such as been used to censure specific components in specification and claim.Those skilled in the art answer
It is understood that hardware manufacturer may call the same component with different nouns.This specification and claims are not with name
The difference of title is used as the mode for distinguishing component, but is used as the criterion of differentiation with the difference of component functionally.Such as logical
The "comprising" of piece specification and claim mentioned in is an open language, therefore should be construed to " include but do not limit
In "." substantially " refer in receivable error range, those skilled in the art can be described within a certain error range solution
Technical problem basically reaches the technique effect.Specification subsequent descriptions are to implement the better embodiment of the application, so described
Description is being not limited to scope of the present application for the purpose of the rule for illustrating the application.The protection domain of the application
When subject to appended claims institute defender.
It should also be noted that, the terms "include", "comprise" or its any other variant are intended to nonexcludability
Including so that commodity or system including a series of elements include not only those elements, but also include not clear
The other element listed, or further include for this commodity or the intrinsic element of system.In the feelings not limited more
Under condition, the element that is limited by sentence "including a ...", it is not excluded that including the element commodity or system in also
There are other identical elements.
Several preferred embodiments of the application have shown and described in above description, but as previously described, it should be understood that the application
Be not limited to form disclosed herein, be not to be taken as excluding other embodiments, and can be used for various other combinations,
Modification and environment, and the above teachings or related fields of technology or knowledge can be passed through in application contemplated scope described herein
It is modified.And changes and modifications made by those skilled in the art do not depart from spirit and scope, then it all should be in this Shen
It please be in the protection domain of appended claims.
Claims (10)
1. a kind of direct random write implementation methods of Flash, it is characterised in that：It in turn includes the following steps：
S110：Obtain Flash sizes and Flash block sizes；
S120：Obtain offset address and to be written data length of the data first address to be written relative to Flash；
S130：The Block blocks and block bias internal of Flash where calculating data to be written；
S140：According to data length to be written and the block bias internal of opposite Flash, the corresponding Block blocks of data to be written are calculated
Number.
2. the direct random write implementation methods of a kind of Flash according to claim 1, it is characterised in that：In the step
Further include between S120 and step S130：
Judge the data to be written whether more than Flash sizes；
If so, the end that reports an error；
If if not, thening follow the steps S003.
3. the direct random write implementation methods of a kind of Flash according to claim 1 or 2, it is characterised in that：The step
S130, the Block blocks of Flash, judge that result of calculation includes where calculating data to be written：
S131：Data to be written are in a Block block of Flash；
S132：Two difference Blocks of the data to be written across Flash；
S133：Multiple Block blocks of the data to be written across Flash.
4. the direct random write implementation methods of a kind of Flash according to claim 3, it is characterised in that：When judging result is
When S131, following steps are executed successively：
S311：Apply for the memory of one section of Flash Block block size；
S312：It reads in the memory applied in Block block number evidences to the S301 to be written；
S313：The data of corresponding position in the memory applied are replaced with data to be written；
S314：The internal storage data of this section of Block size length is written to Flash relevant blocks.
5. the direct random write implementation methods of a kind of Flash according to claim 3, it is characterised in that：When judging result is
When S132, following steps are executed successively：
S321：Apply for the memory of one section of Flash Block block size；
S322：It reads first Flash Block block number evidences to be written and arrives the memory；
S323：With block bias internal address in data to be written replacement memory to the data of the Block blocks end；
S324：Replaced this section of Block length internal storage datas are written to Flash corresponding blocks；
S325：It reads next Flash Block block number evidences to be written and arrives memory；
S326：The remaining data to be written in memory beginning are replaced；
S327：Replaced internal storage data is written to the Flash Block.
6. the direct random write implementation methods of a kind of Flash according to claim 3, it is characterised in that：When judging result is
When S133, following steps are executed successively：
S331：The write-in of two Block block number evidences from beginning to end；
S332：The write-in of intermediate Block block numbers evidence.
7. the direct random write implementation methods of a kind of Flash according to claim 6, it is characterised in that：The step S331
Including：
S3311：Apply for the memory of one section of Flash Block block size；
S3312：It reads the Flash Block block number evidences to be written of head and the tail two and arrives the memory；
S3313：With block bias internal address in data to be written replacement memory to the data of the Block blocks end；
S3314：Replaced this section of Block length internal storage datas are written to Flash corresponding blocks；
S3315：It reads next Flash Block block number evidences to be written and arrives memory；
S3316：The remaining data to be written in memory beginning are replaced；
S3317：Replaced internal storage data is written to the Flash Block.
8. the direct random write implementation methods of a kind of Flash according to claim 6, it is characterised in that：The step S332
Including：
S3321：It is to be written with offset the latter Block length by recording offset of the data to be written every time after write-in
Data replace the correspondence Block blocks that Flash is written in data in EMS memory again；
S3322：Every time after write-in, the offset for recording data to be written increases a Block length byte, until remaining to be written
Enter a Block length of the inadequate Flash of data.
9. a kind of direct random write realization devices of Flash, which is characterized in that including：
First data acquisition module：For obtaining Flash sizes and Flash block sizes；
Second data acquisition module：For obtaining offset address and to be written number of the data first address to be written relative to Flash
According to length byte；
First computing module：Block blocks and block bias internal for Flash where calculating data to be written；
Second computing module：For calculating the corresponding Block block numbers of data to be written.
10. a kind of storage medium, which is characterized in that the storage medium stores a plurality of instruction, and a plurality of instruction is suitable for counting
When being run on calculation machine so that the computer executes the data processing method as described in claim 1 to 8 any one.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111124987A (en) * | 2019-12-30 | 2020-05-08 | 京信通信系统（中国）有限公司 | PCIE-based data transmission control system and method |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101233479A (en) * | 2005-08-03 | 2008-07-30 | 桑迪士克股份有限公司 | Management of memory blocks that directly store data files |
| CN101344867A (en) * | 2007-07-13 | 2009-01-14 | 深圳市江波龙电子有限公司 | Method for improving data access speed of nand type flash memory |
| US20100011155A1 (en) * | 2008-07-11 | 2010-01-14 | Nec Electronics Corporation | Data processor with flash memory, and method for accessing flash memory |
| CN102169419A (en) * | 2011-04-02 | 2011-08-31 | 无锡众志和达存储技术有限公司 | RAID (redundant array of independent disks) data block splitting and assembling method based on SATA (serial advanced technology attachment) controller |
| CN103502926A (en) * | 2011-04-29 | 2014-01-08 | 美国网域存储技术有限公司 | Extent-based storage architecture |
| CN103559140A (en) * | 2013-10-29 | 2014-02-05 | 深圳创维数字技术股份有限公司 | Flash data storage method and device |
| CN105373338A (en) * | 2014-08-20 | 2016-03-02 | 深圳市中兴微电子技术有限公司 | Control method and controller for FLASH |
-
2018
- 2018-03-30 CN CN201810286924.0A patent/CN108536614A/en active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101233479A (en) * | 2005-08-03 | 2008-07-30 | 桑迪士克股份有限公司 | Management of memory blocks that directly store data files |
| CN101344867A (en) * | 2007-07-13 | 2009-01-14 | 深圳市江波龙电子有限公司 | Method for improving data access speed of nand type flash memory |
| US20100011155A1 (en) * | 2008-07-11 | 2010-01-14 | Nec Electronics Corporation | Data processor with flash memory, and method for accessing flash memory |
| CN102169419A (en) * | 2011-04-02 | 2011-08-31 | 无锡众志和达存储技术有限公司 | RAID (redundant array of independent disks) data block splitting and assembling method based on SATA (serial advanced technology attachment) controller |
| CN103502926A (en) * | 2011-04-29 | 2014-01-08 | 美国网域存储技术有限公司 | Extent-based storage architecture |
| CN103559140A (en) * | 2013-10-29 | 2014-02-05 | 深圳创维数字技术股份有限公司 | Flash data storage method and device |
| CN105373338A (en) * | 2014-08-20 | 2016-03-02 | 深圳市中兴微电子技术有限公司 | Control method and controller for FLASH |
Non-Patent Citations (1)
| Title |
|---|
| 于良耀等: "闪存直接存取", 《电脑编程技巧与维护》 * |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111124987A (en) * | 2019-12-30 | 2020-05-08 | 京信通信系统（中国）有限公司 | PCIE-based data transmission control system and method |
| CN111124987B (en) * | 2019-12-30 | 2021-06-22 | 京信通信系统（中国）有限公司 | PCIE-based data transmission control system and method |
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Application publication date: 20180914 |