CN108108323B - Signal picker and its method for multiplexing interface - Google Patents
Signal picker and its method for multiplexing interface Download PDFInfo
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- CN108108323B CN108108323B CN201810012157.4A CN201810012157A CN108108323B CN 108108323 B CN108108323 B CN 108108323B CN 201810012157 A CN201810012157 A CN 201810012157A CN 108108323 B CN108108323 B CN 108108323B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
- G06F13/387—Information transfer, e.g. on bus using universal interface adapter for adaptation of different data processing systems to different peripheral devices, e.g. protocol converters for incompatible systems, open system
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0026—PCI express
Abstract
The present invention relates to data acquisition technology field, a kind of signal picker and its method for multiplexing interface are disclosed, to improve the flexibility and scalability of collector.Signal picker of the present invention includes: mainboard, is provided with CPU, which is connected at least one multiplex interface and each multiplex interface of identification accesses the pattern recognition unit for acquiring the type of signal front-end processing module；The multiplex interface supplies at least two different types of acquisition signal front-end processing module reuses；The respectively acquisition signal front-end processing module is provided with the functional unit for signal acquisition and the coding unit for the pattern recognition unit identification types；Wherein, the CPU is also used to when any acquisition signal front-end processing module accesses any multiplex interface, the type that the acquisition signal front-end processing module is identified by the pattern recognition unit, the functional status of each pin in the multiplex interface is redefined according to the type identified.
Description
Technical field
The present invention relates to data acquisition technology field more particularly to a kind of signal pickers and its method for multiplexing interface.
Background technique
Signal picker is the electronic equipment for being widely used in each field.Such as: it can be used for the dynamic environment of computer room base station
Monitoring, various signal acquisitions of industrial or agricultural etc..
Existing signal picker is roughly divided into monoblock type and split type two class, its main feature is that the type of each interface is fixed,
It is short of flexibility, usage scenario is limited.
A kind of existing power & environment supervision system of CN201320487188 patent disclosure, which is to realize mould by bus
Block.Existing split type equipment is divided into host and acquisition module mostly, and host and is adopted containing functions such as uplink communication and general supplies
Collect intermodule to communicate by bus (such as RS-485 or RS232 or CAN).Its advantage is that: the extension quantity of sub-module is often
It can accomplish very much；But in actual installation and application, product form is not one complete whole, for certain requirement one
The occasion for changing equipment is not applicable.Moreover, because acquisition module needs are communicated with host, need to design master on acquisition module
Chip is controlled, and carries out corresponding software development, Material Cost and development cost are all bigger.
Summary of the invention
Present invention aims at a kind of signal picker and its method for multiplexing interface is disclosed, to improve the flexibility of collector
And scalability.
To achieve the above object, the invention discloses a kind of signal pickers, comprising:
Mainboard, is provided with CPU, and the CPU is connected at least one multiplex interface and each multiplex interface institute of identification
The pattern recognition unit of the type of access acquisition signal front-end processing module；The multiplex interface is different types of at least two
The acquisition signal front-end processing module reuse；
Each acquisition signal front-end processing module is provided with for the functional unit of signal acquisition and knows for the mode
The coding unit of other unit identification types；
Wherein, the CPU is also used to access any multiplex interface in any acquisition signal front-end processing module
When, the type of the acquisition signal front-end processing module is identified by the pattern recognition unit, according to the type weight identified
Define the functional status of each pin in the multiplex interface.
To achieve the above object, the invention also discloses a kind of method for multiplexing interface of signal picker, comprising:
CPU is connect at least one multiplex interface；The multiplex interface supplies at least two different types of acquisition signals
Front end processing block multiplexing；
The CPU identifies that each multiplex interface accesses acquisition signal front-end processing module by pattern recognition unit
Type, the acquisition signal front-end processing module are provided with the functional unit for signal acquisition and supply the pattern recognition unit
The coding unit of identification types；
The CPU is when any acquisition signal front-end processing module accesses any multiplex interface, by described
Pattern recognition unit identifies the type of the acquisition signal front-end processing module, redefines the multiplexing according to the type identified
The functional status of each pin in interface.
Based on above-mentioned signal picker of the invention and its method for multiplexing interface, optionally, above-mentioned multiplex interface is compatible with
For it is each it is described acquisition signal front-end processing module access interface type include at least following types in any two kinds:
The compound expansion module of 4AI/DI, 4DI expansion module, 2DO expansion module, 2COM expansion module, 2DI&1COM expand
Open up module.
Optionally, the above-mentioned pattern recognition unit of the present invention includes the pull-up resistor connecting with CPU respective pins, corresponding
, it is provided on above-mentioned coding unit and the matched pull down resistor of the pull-up resistor；Whereby, pattern recognition unit can pass through
It identifies the presence or absence of corresponding pull-up resistor or is known by identifying corresponding pull-up resistance value partial pressure ID voltage relative value be calculated
The other type for accessing acquisition signal front-end processing module.
The invention has the following advantages:
The degree of modularity of product is high, and cost is easy to control, and when use can not only keep the unification of product form, but also can move
State configures the type of all kinds of interfaces, and it is different to may make that the signal of multiplex interface may execute under disparate modules, different time
Function greatly improves the flexibility and scalability of collector.Further, when the quantity of multiplex interface of the present invention is extremely
When few more than two, each multiplex interface as the cloth line morphology between CPU for acquiring signal front-end processing module mixed insertion, into
The flexibility and convenience of one step raising system.
Below with reference to accompanying drawings, the present invention is described in further detail.
Detailed description of the invention
The attached drawing constituted part of this application is used to provide further understanding of the present invention, schematic reality of the invention
It applies example and its explanation is used to explain the present invention, do not constitute improper limitations of the present invention.In the accompanying drawings:
Fig. 1 is the terminal panel schematic diagram of signal picker disclosed by the embodiments of the present invention；
Fig. 2 is the system block diagram of signal picker disclosed by the embodiments of the present invention；
Fig. 3 is that a kind of multiplex interface pin disclosed by the embodiments of the present invention redefines mapping graph；
Fig. 4 is that a kind of multiplex interface pin disclosed by the embodiments of the present invention redefines mapping graph.
Specific embodiment
The embodiment of the present invention is described in detail below in conjunction with attached drawing, but the present invention can be defined by the claims
Implement with the multitude of different ways of covering.
Embodiment 1
The present embodiment discloses a kind of signal picker, and equipment is integrated form, as shown in Figure 1, setting at terminal panel end
Two class expansion slot are set, one kind is general extension slot, as multiplex interface (or being " multiplexing slot ")；Another kind of is proprietary extensions
Slot (or being " special purpose interface ").Expansion slot can be used and hide at no expansion module (i.e. acquisition signal front-end processing module)
Cover panel covered empty slot；When using expansion module, the terminal that panel cooperation institute's AM access module both can be used covers together
Empty slot only can also be filled up completely the slot opened in equipment with the terminal of module.
As shown in Fig. 2, the signal picker of the present embodiment includes:
Mainboard is provided with CPU, which is connected at least one multiplex interface and each multiplex interface of identification is accessed and adopted
Collect the pattern recognition unit of the type of signal front-end processing module；The multiplex interface supplies at least two different types of acquisition signals
Front end processing block multiplexing；
The respectively acquisition signal front-end processing module, is provided with for the functional unit of signal acquisition and for pattern recognition unit
The coding unit of identification types；
Wherein, CPU is also used to know when any acquisition signal front-end processing module accesses any multiplex interface by mode
The type of other unit identification acquisition signal front-end processing module, redefines each pin in multiplex interface according to the type identified
Functional status, and power with after the driving of the type matching identified to the power pins of multiplex interface loading.
As shown in Figure 3 and Figure 4, optionally, each acquisition signal front-end processing of confession that the present embodiment multiplex interface is compatible with
Module access interface type include in following five seed types it is any two or more:
The compound expansion module of 4AI/DI, 4DI expansion module, 2DO expansion module, 2COM expansion module, 2DI&1COM expand
Open up module.Wherein, AI indicates analog input；AO indicates analog output；DI indicates digital quantity input；DO indicates that digital quantity is defeated
Out；COM (cluster communication port) i.e. serial communication interface.
Referring to Fig. 2 and Fig. 3, general extension interface contains 6 signals, is respectively: IO1, IO2, power supply are just, power supply is negative, IO3 and
IO4.The physical implementation of signal connection can be conducting wire connection, be also possible to socket connection, and specific on-link mode (OLM) is unlimited；4
A I/O signal is divided into two pairs, i.e., 1 and 2 be a pair, and 3 and 4 be a pair, is signally attached on CPU, belongs to the configurable letter of CPU
Number, optionally difference can be configured to UART (Universal Asynchronous Receiver/ in software
Transmitter, universal asynchronous receiving-transmitting transmitter) or GPIO (General Purpose Input Output, it is general defeated
Enter/export)).
The identification method of the pattern recognition unit of corresponding diagram 3 can are as follows: pattern recognition unit includes connecting with CPU respective pins
Pull-up resistor, be provided with and the matched pull down resistor of pull-up resistor on coding unit；Pattern recognition unit is for passing through identification
The presence or absence of corresponding pull-up resistor accesses the type for acquiring signal front-end processing module to identify.Specifically:
When being not inserted into module, the logic state of 1,2,3,4 four signal on each interface is " 1111 " (on mainboard
CPU pin is pulled up using biggish resistance, such as 47K Ω, therefore default conditions are high level), what power supply was turned off.Module insertion
Afterwards, 0 state can be switched to (the corresponding signal foot of module will use a lesser resistance, under 2k Ω by least having a signal
It draws, the pull-up resistor on this pull down resistor and motherboard circuit, which combines, to switch to low electricity by the high level defaulted for this signal
It is flat), system can be into process be judged after detecting this state, and mainboard can just be supplied to the supply pin of interface after judging process
Electricity.
Wherein, the coding (also known as " block code ") Yu multiplex interface of the acquisition signal front-end processing module of corresponding diagram 3
The mapping relations of pin such as the following table 1.
Table 1:
In more detail, the system work process of corresponding above-mentioned Fig. 2, Fig. 3 and table 1 are as follows:
(process of system electrification initialization is such as from about scheduled on when system detects acquisition signal front-end processing module type
In), 1,2,3,4 signals are all configured to DI mode by CPU, are used as module insertion and type indication signal.It is being not inserted into extension
The logic state of four signals is " 1111 " when module, at least one signal can switch to 0 state, system after expansion module insertion
It detects to enter after this changes and judges process.
Judge in process in module, system is inserted into module according to the block code judgement of acquisition signal front-end processing module
Type specifically can refer to above-mentioned table 1；After module judges process, CPU can switch to 1,2,3,4 signals and module type pair
The functional mode answered；It specifically includes:
The compound expansion module of 4AI/DI, 1,2 be defined as UART signal to (i.e. T and R, T indicate send, R indicate receive),
3,4 is undefined, is spacing wave；This expansion module, AI signal is measured using the converter with UART interface, and CPU passes through
UART interface obtains the data of converter, and then calculates the signal value in the channel AI；Functions of modules code is 0000.
4DI expansion module, 1,2,3,4 are defined as GPIO signal, this signal is configured to input by CPU, for receiving electricity
The digital signal that road improves out, functions of modules code are 0001.
2DO expansion module, 1,2 are defined as GPIO signal, this signal is configured to output by CPU, for controlling output letter
Number；Functions of modules code is 0010.
2COM expansion module, 1,2 and 3,4 are defined as UART signal to (i.e. T and R), and the circuit in module can will
UART is converted into RS485, RS422 or RS232 bus signals；Functions of modules code is 0011.
2DI&1COM expansion module, 1,2 are defined as GPIO signal, this signal is configured to input by CPU, and 3,4 are defined as
UART signal is to (i.e. T and R).
Further, the confession interface that respectively the acquisition signal front-end processing module accesses that the present embodiment multiplex interface is compatible with
Type can also include 4AI, 6AI/DI, 2DO+1COM, the other types such as 4DO, as long as can make of GPIO or UART signal
Interface can be implemented with the circuit module for obtaining data.
Embodiment 2
The present embodiment is similar with above-described embodiment 1, the difference is that, as shown in figure 4, the multiplexing in the present embodiment connects
Mouth be provided with 7 signals be respectively IO1, IO2, power supply just, ID, power supply be negative, IO3, IO4.Wherein, ID signal is a simulation electricity
Signal is pressed, CPU detects the type that this voltage signal carrys out judgment module.
The identification method of the pattern recognition unit of corresponding the present embodiment are as follows: pattern recognition unit includes and CPU respective pins
The pull-up resistor of connection is provided with and the matched pull down resistor of the pull-up resistor on above-mentioned coding unit；The pattern-recognition list
Member is by identifying that corresponding pull-up resistance value partial pressure ID voltage relative value be calculated accesses at acquisition signal front end to identify
Manage the type of module.It specifically includes:
On the ADCIN signal group of mainboard CPU, there are a pull-up resistors, such as 47K Ω；At acquisition signal front end
It manages above module, ID signal is connected to ground by a pull down resistor.Different modules is assigned with different ID voltage values, this electricity
Pressure value is generated by the resistance value of its pull down resistor.When being not inserted into expansion module, the ID signal on interface can be identified as 16/
16 full signal value, that is to say, that the ID signal on interface does not have pull down resistor.In table, ID voltage relative value refers to partial pressure
The ratio of voltage value and total voltage that network generates such as generates 1/16 relative value, needs to use in the case where 47K Ω pull-up resistor
The pull down resistor of 3.13K Ω.This voltage relative value, can have an error due to producing, and when identification can set a mistake
Difference allows region, when such as designing for 1/16 voltage relative value, when identification can be relaxed to 0.8/16~1.2/16, this section all
It is identified as 1/16 value.
Whereby, the present embodiment is additionally arranged an additional expansion module type identification in the identification method of above-described embodiment
With pin, and expansion module type identification with pin is multiplexed (i.e.: with the subsequent pin redefined in above-described embodiment 1
There are Chong Die with the subsequent functional leads redefined for the pin of identification types)；The present embodiment mode is sacrificing pin number
On the basis of reduce the quantity of related pull-up and pull down resistor (in general, in the mode of above-described embodiment 1, multiplex interface draw
The pin of foot and CPU correspond it is direct-connected, and be respectively provided on the respectively direct-connected route electric connecting point with pull-up resistor
It connects one to one)；But then, using additional identification pin mode to design and develop more easily, the tune of software and hardware
Examination workload is small and makes also more stable in practical work process because identification pin and functional pin do not conflict completely；Cause
This two kinds of identification methods cut both ways, compare under, the pin resource of CPU is more rare, so that above-described embodiment 1
The overall cost of identification method is more excellent.
It is worth noting that in the present invention, when using embodiment 1 by identifying that the presence or absence of pull-up resistor is accessed to identify
When acquiring the type of signal front-end processing module, if there is weight in the pin of identification types and the subsequent functional leads redefined
Folded, then preferably, CPU is supplied to the power pins of the multiplex interface again after the type for having identified acquisition signal front-end processing module
Electricity avoids module from powering on rear functional pin and generates signal immediately and be unfavorable for CPU to acquisition signal front-end processing module with this
Type identification；If aforementioned delay is not used to power on scheme, alternatively, can also be handled by corresponding software
To eliminate this unfavorable factor.And when identifying pin and functional pin mode independent using the present embodiment, then regardless of multiplexing
When interface, which powers on, does not affect recognition effect.
Optionally, the expansion module type identification in the present embodiment has been accessible to the ADC of CPU or onboard with pin
It is placed outside the ADC of CPU, for identification this divider resistance.
The coding (or " ID voltage relative value ") of acquisition signal front-end processing module type for reference connects with multiplexing
Mapping relations such as the following table 2 of the pin of mouth.
Table 2
It is not repeat them here with above-described embodiment 1 that other, which correspond to above-mentioned Fig. 4 and the system work process of table 2,.
In addition, the special purpose interface in the present embodiment and above-described embodiment 1 is not generally applicable, it is only capable of and matched proprietary extensions mould
Block carries out data interaction.Such as AI proprietary extensions module, module being designed to, AI signal conditioning circuit, the signal after conditioning are direct
The converter of mainboard is accessed, the signal of special purpose interface can be by analog signal required by onboard ADC；It can also be designed to
Autonomous system with single-chip microcontroller voluntarily handles AI channel signal by the single-chip microcontroller in module, then by onboard bus by data
It is sent to CPU, the signal of such expansion interface is just defined as the signal of bus；It is also designed to carry an AD turns in module
Parallel operation is gone the data of reading AI signal by CPU by the digital interface of converter, and the signal on such case lower interface is just fixed
Justice at converter digital interface signal.For another example COM proprietary extensions module can be designed to that UART turns other lattice such as RS485
The circuit form of formula signal, in such cases, the signal on expansion interface are exactly UART signal；Or it is designed to that SPI changes into it
The circuit form of his rs 232 serial interface signal, the signal on expansion interface should just be defined as spi bus.It designs in any case, it is dedicated to connect
Signal definition on mouth be it is fixed, dedicated, module must be designed to the circuit using such signal format, otherwise just not
The use of this expansion interface can be inserted into.
Embodiment 3
In conjunction with the content of above-mentioned two embodiment, the present embodiment discloses a kind of interface duplex side of corresponding signal picker
Method, comprising:
Step S1, CPU is connect at least one multiplex interface.The multiplex interface supplies at least two different types of acquisitions
Signal front-end processing module reuse.
Step S2, the CPU identifies that respectively the multiplex interface accesses acquisition signal front-end processing mould by pattern recognition unit
The type of block, the acquisition signal front-end processing module are provided with the functional unit for signal acquisition and supply the pattern recognition unit
The coding unit of identification types.
Step S3, the CPU passes through the mould when any acquisition signal front-end processing module accesses any multiplex interface
Formula recognition unit identifies the type of the acquisition signal front-end processing module, is redefined in the multiplex interface according to the type identified
The functional status of each pin.
Optionally, respectively the acquisition signal front-end processing module connects for the confession that at least one multiplex interface of the present embodiment is compatible with
The interface type entered include in following five seed types it is any two or more:
The compound expansion module of 4AI/DI, 4DI expansion module, 2DO expansion module, 2COM expansion module, 2DI&1COM expand
Open up module.
Similarly, referring to above-mentioned two embodiment, pattern recognition unit can be by identifying the presence or absence of corresponding pull-up resistor or passing through
The corresponding pull-up resistance value of identification divides ID voltage relative value be calculated to identify and access acquisition signal front-end processing module
Type.
Further, special purpose interface is additionally provided on mainboard to access for proprietary extensions module, the proprietary extensions module is through plate
It carries bus and sends data to the CPU；And analog-to-digital conversion module is set on the mainboard to signal collected carry out modulus
Conversion；Or in the acquisition signal front-end processing module and proprietary extensions module be arranged analog-to-digital conversion module with to acquire believe
Number carry out analog-to-digital conversion.It is worth noting that for the signal acquisition of some special data interface types, especially part is dedicated
Expansion module can omit analog-to-digital conversion module described in this paragraph.
To sum up, signal picker and its method for multiplexing interface disclosed by the embodiments of the present invention, have an advantage that
The degree of modularity of product is high, and cost is easy to control, and when use can not only keep the unification of product form, but also can move
State configures the type of all kinds of interfaces, and it is different to may make that the signal of multiplex interface may execute under disparate modules, different time
Function greatly improves the flexibility and scalability of collector.Further, when the quantity of multiplex interface of the present invention is extremely
When few more than two, each multiplex interface as the cloth line morphology between CPU for acquiring signal front-end processing module mixed insertion, into
The flexibility and convenience of one step raising system.Wherein, so-called cloth line morphology is the same, it usually needs meet: one, position is different
The physical location deployment of each multiplex interface, internal each signal pins is the same, the spacing etc. between pin and pin；Two,
Different multiplex interfaces between the corresponding one group of pin in position, signal logic that is reconfigurable or redefining is consistent.
The foregoing is only a preferred embodiment of the present invention, is not intended to restrict the invention, for the skill of this field
For art personnel, the invention may be variously modified and varied.All within the spirits and principles of the present invention, made any to repair
Change, equivalent replacement, improvement etc., should all be included in the protection scope of the present invention.
Claims (10)
1. a kind of signal picker characterized by comprising
Mainboard is provided with CPU, and the CPU is connected at least one multiplex interface and each multiplex interface of identification is accessed
Acquire the pattern recognition unit of the type of signal front-end processing module；The multiplex interface is different types of described at least two
Acquire signal front-end processing module reuse；
Each acquisition signal front-end processing module is provided with the functional unit for signal acquisition and supplies the pattern-recognition list
The coding unit of first identification types；
Wherein, the CPU is also used to lead to when any acquisition signal front-end processing module accesses any multiplex interface
The type that the pattern recognition unit identifies the acquisition signal front-end processing module is crossed, institute is redefined according to the type identified
State the functional status of each pin in multiplex interface, the functional status is one of DI, DO and bus interface or any several
The combination of kind of state, each pin support to be set as DI, DO and bus interface function, and the bus of the bus interface is
UART bus or spi bus.
2. signal picker according to claim 1, which is characterized in that the confession that at least one described multiplex interface is compatible with
The interface type of each acquisition signal front-end processing module access includes at least any two kinds in following types:
The compound expansion module of 4AI/DI, 4DI expansion module, 2DO expansion module, 2COM expansion module, 2DI&1COM expanded mode
Block.
3. signal picker according to claim 1 or 2, which is characterized in that the pattern recognition unit include with it is described
The pull-up resistor of CPU respective pins connection, is provided with and the matched pull down resistor of the pull-up resistor on the coding unit；
The pattern recognition unit is used for by identifying the presence or absence of corresponding pull-up resistor or by the corresponding pull-up resistance value partial pressure of identification
The ID voltage relative value being calculated accesses the type of acquisition signal front-end processing module to identify.
4. signal picker according to claim 3, which is characterized in that when the quantity of the multiplex interface is at least two
When above, each multiplex interface is as the cloth line morphology between the CPU so that each acquisition signal front-end processing module is mixed
It inserts.
5. signal picker according to claim 4, which is characterized in that identified when by the presence or absence of identification pull-up resistor
When accessing the type of acquisition signal front-end processing module, if the pin of identification types and the subsequent functional leads redefined
There are overlappings, then the CPU draws to the power supply of the multiplex interface again after the type for having identified acquisition signal front-end processing module
Foot power supply.
6. a kind of method for multiplexing interface of signal picker characterized by comprising
CPU is connect at least one multiplex interface；The multiplex interface supplies at least two different types of acquisition signal front ends
Processing module multiplexing；
The CPU identifies that each multiplex interface accesses the class of acquisition signal front-end processing module by pattern recognition unit
Type, the acquisition signal front-end processing module are provided with for the functional unit of signal acquisition and know for the pattern recognition unit
The coding unit of other type；
The CPU passes through the mode when any acquisition signal front-end processing module accesses any multiplex interface
Recognition unit identifies the type of the acquisition signal front-end processing module, redefines the multiplex interface according to the type identified
The functional status of interior each pin, the functional status are the group of one of DI, DO and bus interface or any several states
Close, each pin supports to be set as DI, DO and bus interface function, the bus of the bus interface for UART bus or
Spi bus.
7. the method for multiplexing interface of signal picker according to claim 6, which is characterized in that at least one described multiplexing
The interface type for each acquisition signal front-end processing module access that interface is compatible with includes at least appointing in following types
Two kinds of meaning:
The compound expansion module of 4AI/DI, 4DI expansion module, 2DO expansion module, 2COM expansion module, 2DI&1COM expanded mode
Block.
8. the method for multiplexing interface of signal picker according to claim 6 or 7, which is characterized in that the pattern-recognition
Unit includes the pull-up resistor connecting with the CPU respective pins, is provided on the coding unit and the pull-up resistor
The pull down resistor matched；The method also includes:
The pattern recognition unit is by identifying the presence or absence of corresponding pull-up resistor or by identifying that corresponding pull-up resistance value partial pressure is counted
The ID voltage relative value obtained accesses the type of acquisition signal front-end processing module to identify.
9. the method for multiplexing interface of signal picker according to claim 8, which is characterized in that when the multiplex interface
When quantity is at least two, each multiplex interface is as the cloth line morphology between the CPU for each acquisition signal
Front end processing block mixed insertion.
10. the method for multiplexing interface of signal picker according to claim 9, which is characterized in that pulled up when by identification
The presence or absence of resistance come identify access acquisition signal front-end processing module type when, if the pin of identification types with it is subsequent heavy
There is overlapping in the functional leads of definition, then CPU is after the type for having identified acquisition signal front-end processing module again to the multiplexing
The power pins of interface are powered.
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| CN109086235B (en) * | 2018-08-10 | 2020-09-22 | 深圳市吉影科技有限公司 | Underwater universal equipment detection, identification and control method and system |
| CN109450518A (en) * | 2018-09-11 | 2019-03-08 | 陕西千山航空电子有限责任公司 | A kind of general acquisition and interpretation method of flight parameter |
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