CN107887433B - Enhanced AlGaN/GaN high-electron-mobility transistor and preparation method thereof - Google Patents

Enhanced AlGaN/GaN high-electron-mobility transistor and preparation method thereof Download PDF

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CN107887433B
CN107887433B CN201710861956.4A CN201710861956A CN107887433B CN 107887433 B CN107887433 B CN 107887433B CN 201710861956 A CN201710861956 A CN 201710861956A CN 107887433 B CN107887433 B CN 107887433B
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CN107887433A (en
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吴少兵
王彦硕
黄念宁
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CETC 55 Research Institute
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Abstract

The invention relates to an enhanced AlGaN/GaN high electron mobility transistor, the epitaxial structure of which comprises a SiC substrate, a GaN channel layer, a GaN high resistance buffer layer and an AlGaN barrier layer with gradually changed Al content. The preparation method comprises the following process steps: (1) preparing a source drain metal system; (2) preparing a gate pin dielectric groove structure; (3) digging a groove; (4) photoetching a gate cap; (5) and forming a Schottky contact. The invention has the advantages that: 1. by BCl3The gas is used for grooving process, because BCl3The reaction rate of AlGaN with different Al contents is different, so that the grooving can be automatically stopped. 2. And forming a Schottky barrier through gate metal preparation to obtain the enhanced AlGaN/GaN device. 3. The method can be compatible with the existing depletion type GaN device, has simple preparation process, and can realize the monolithic integration of enhancement type/depletion type devices in the same wafer. 4. The process window is large, and the controllability of the grooving depth and the device starting voltage is good.

Description

Enhanced AlGaN/GaN high-electron-mobility transistor and preparation method thereof
Technical Field
The invention relates to an enhanced AlGaN/GaN high-electron-mobility transistor and a preparation method thereof, belonging to the field of third-generation semiconductor microwave millimeter wave devices.
Background
The third-generation semiconductor GaN device has larger forbidden band width and higher working voltage, and has wide application prospect in the field of microwave and millimeter wave chips. In a typical HEMT device having an AlGaN/GaN structure, due to the inverse piezoelectric effect of the AlGaN/GaN interface, two-dimensional electron gas exists in a GaN channel, and thus the device is in a normally-on state at zero gate voltage. When the GaN HEMT device is in a high-voltage working state, if the grid is powered off or is not controlled, the device can be instantly burnt by heat consumption generated by large current and high power, and the system safety is endangered. And the enhancement type device is in a normally-off state under the zero bias gate voltage, so that no current exists in the device and the system cannot be burnt out even if the gate is powered off or is not controlled. Therefore, the enhancement-mode device has certain advantages in terms of safety in use in an environment where the operating voltage is high. Meanwhile, the enhancement device is also an essential device of the digital multifunctional integrated circuit. Therefore, the development of the enhanced device is beneficial to promoting the development of the microwave millimeter wave device.
Currently, there are two main approaches to implementing the enhancement type GaN device. One is achieved with P-GaN with acceptor ion implantation. The other method is realized by grooving the conventional AlGaN/GaN device, reducing the thickness of a barrier layer and moving the pinch-off voltage to the positive gate voltage direction. Because the compatibility of the P-GaN injection process and the current GaN HEMT device is not high, the realization of the enhanced AlGaN/GaN HEMT device by the grooving method is a more common choice. However, when the groove-digging enhanced AlGaN/GaN HEMT device digs the groove AlGaN, the controllability of groove-digging depth and surface damage is poor, and the performance and consistency of the device are affected. Generally, BCl used for trenching AlGaN barrier layers3A gas. BCl is enabled due to AlGaN single material structure3In the reaction with AlGaN, only the entire AlGaN reaction is completed, and the depth thereof is determined only by the reaction time. The energy of the plasma is influenced by factors such as radio frequency power, air pressure and the like, so that the actual reaction thickness fluctuates. In addition, the AlGaN barrier layer is completely removed, and carriers in a channel are completely blocked, so that the turn-on voltage is high.
In summary, in order to solve the above problems, different enhanced AlGaN/GaN device structures and manufacturing processes need to be proposed.
Disclosure of Invention
The invention provides an enhanced AlGaN/GaN high electron mobility transistor and a preparation method thereof, aiming at utilizing an AlGaN barrier layer structure with gradually changed Al content and a plasma BCl3And the characteristic that different Al contents of AlGaN have groove digging rate difference is realized, so that the enhanced AlGaN/GaN high electron mobility transistor is prepared.
The technical solution of the invention is as follows: an epitaxial structure of the enhanced AlGaN/GaN high electron mobility transistor comprises a SiC substrate, a GaN channel layer, a GaN high-resistance buffer layer and an AlGaN barrier layer with gradually changed Al content;
the preparation method comprises the following process steps:
(1) preparing a source drain metal system;
(2) preparing a gate pin dielectric groove structure;
(3) digging a groove;
(4) photoetching a gate cap;
(5) and forming a Schottky contact.
The invention has the advantages that:
1. by BCl3The gas is used for grooving process, because BCl3The reaction rates of AlGaN with different Al contents are different, the reaction rate of AlGaN with smaller Al content and BCl3 is high, and the reaction rate of AlGaN with higher Al content and BCl3 is low, so that the grooving can be automatically stopped;
2. forming a Schottky barrier through gate metal preparation to obtain an enhanced AlGaN/GaN device;
3. the method can be compatible with the existing depletion type GaN device, has simple preparation process, and can realize the monolithic integration of enhancement type/depletion type devices in the same wafer;
4. the process window is large, and the controllability of the grooving depth and the device starting voltage is good.
Drawings
FIG. 1 is a schematic view of a GaN epitaxial layer structure.
FIG. 2 is a schematic cross-sectional view of source-drain metal and growth protection medium.
FIG. 3 is a schematic cross-sectional view of a photolithographic gate leg process.
FIG. 4 is a schematic diagram of etching a gate to form a dielectric trench.
FIG. 5 is BCl3And grooving and thinning the barrier layer.
FIG. 6 is a schematic diagram after a gate cap is etched.
Fig. 7 is a schematic cross-sectional view of gate metal evaporated and stripped to form a schottky contact.
In the figure, 101 is a SiC substrate, 102 is a GaN high-resistance buffer layer, 103 is a GaN channel layer, 104 is an AlGaN barrier layer, 105 is an AlGaN back barrier layer, 106 is an AlN insert layer, 107 is a GaN cap layer, 108 is a GaN HEMT structure, 201 is source and drain metal, 202 is a source and drain protection SiN medium, 301 is a photoetching process, 401 is an etching process or a wet etching process, 402 is a gate pin part medium groove structure, 501 is a grooving process, 502 is a thinned AlGaN barrier layer, 601 is a photoetching gate cap process, 602 and 603 are gate cap structural glue types, 701 is gate metal evaporation, stripping and heat treatment processes, and 702 is gate metal.
Detailed Description
The epitaxial structure of the enhancement type AlGaN/GaN high electron mobility transistor comprises a SiC substrate, a GaN channel layer, a GaN high-resistance buffer layer and an AlGaN barrier layer with gradually changed Al content; in the AlGaN barrier layer with the gradually changed Al content, the Al content in AlGaN at the AlGaN/GaN interface is the highest, and the Al content in AlGaN is gradually reduced from the AlGaN/GaN interface to the AlGaN surface.
A preparation method of an enhanced AlGaN/GaN high electron mobility transistor comprises the following process steps:
(1) preparing a source drain metal system: preparing source drain metal on the epitaxial structure, and growing a source drain protective medium SiN;
(2) preparing a gate pin dielectric groove structure: forming a gate pin pattern on the surface of the epitaxial structure by adopting a photoetching process, and then removing a medium on the gate pin part by adopting one of an etching process and a wet etching process to form a medium groove structure on the gate pin part; if the prepared circuit is an enhanced and depletion type integrated single chip, photoetching and etching processes are also carried out on the grid pin of the depletion type tube core, and photoresist is removed after etching;
(3) grooving: using plasma BCl3Grooving the AlGaN barrier layer as a reaction gas, and controlling the grooving time to keep the depth of the groove with the AlGaN layer of 1-2 nm or completely grooving to remove all AlGaN at the gate pin; if the circuit is provided with an enhancement type device and a depletion type device at the same time, one step of photoetching is needed to be added, the secondary grid pin of the enhancement type tube core is formed by photoetching, the depletion type device is protected by photoresist, and the line width of the secondary grid pin is larger than that of the enhancement type tube core;
(4) photoetching a gate cap: photoetching a gate cap on the enhanced tube core to form a gate cap structure glue type; performing HCL treatment on the rear surface of the photoetching gate cap;
(5) forming a Schottky contact: performing gate metal evaporation, stripping and heat treatment processes to enable gate metal to form Schottky contact with the AlGaN barrier layer; the gate metal is one of Ni, Pt and W;
the technical scheme of the invention is further described by combining the accompanying drawings as follows:
comparing with fig. 1, the GaN epitaxial layer structure includes a SiC substrate 101, a GaN high resistance buffer layer 102, a GaN channel layer 103, and an AlGaN barrier layer 104. The AlGaN barrier layer 104 has a graded structure from bottom to top, and has a high Al content at the lower part and a low Al content at the upper part; the specific Al content can be determined by the application requirements of the device, such as the gradient of 30% to 20%; in addition, the GaN epitaxial layer can be selectively inserted with other layers according to the requirements of different application environments on breakdown voltage, mobility and other characteristics. For example, an AlGaN back barrier layer 105 is inserted between the GaN channel layer 103 and the GaN high-resistance buffer layer 102, an AlN insert layer 106 is inserted inside the GaN buffer layer 104, and a GaN cap layer 107 is grown on the surface of the AlGaN barrier layer 104. Since the typical epitaxial layers include the SiC substrate 101, the GaN high resistance buffer layer 102, the GaN channel layer 103, and the AlGaN barrier layer 104, other intervening layers are not discussed at the time, and the preparation of the selective structure does not affect the implementation of the enhancement mode device of the present invention.
Comparing with fig. 2, source drain metal 201 is prepared on the GaN epitaxial material and source drain protective SiN dielectric 202 is grown.
Comparing fig. 3 and fig. 4, a gate pattern is formed on the surface by using a photolithography process 301, and then the dielectric of the gate portion is etched or etched away by using an etching process or a wet etching process 401, so that the gate portion forms a dielectric groove structure 402. If the prepared circuit is an enhancement type and depletion type integrated single chip, photoetching and etching processes are also carried out on the grid pin of the depletion type tube core, and photoresist is removed after etching.
Comparing FIG. 5, BCl was used3Grooving the gradient AlGaN barrier layer 104 for reaction gas; turn-on voltage and BCl according to enhanced die3And setting the grooving depth of the grooving machine for grooving rates of AlGaN with different Al contents. If the circuit has both enhancement type device and depletion type device, one step of photoetching is needed to be added, the secondary gate pin of the enhancement type tube core is formed by photoetching, the depletion type device is protected by photoresist, and the line width of the secondary gate pin is larger than that of the enhancement type tube core.
Comparing with fig. 6, the gate cap is etched on the sample wafer to form gate cap structure glue type 602 and 603, which is easy to strip. After the surface HCL treatment, gate metal evaporation was performed.
Comparing with fig. 7, gate metal evaporation, stripping and heat treatment processes 701 are performed to form schottky contact between the gate metal 702 of the device and the thinned AlGaN barrier layer 502. If the depletion type tube core exists, the gate cap photoetching and gate metal evaporation stripping processes are also carried out.
Example 1
The preparation method of the enhanced AlGaN/GaN high electron mobility transistor comprises the following steps:
the epitaxial material is roughly 600um of a semi-insulating SiC monocrystal substrate layer, 500nm of a GaN high-resistance buffer layer, 20nm of a GaN channel and 25nm of a gradient AlGaN barrier layer from bottom to top. The Al content of the AlGaN of the barrier layer from bottom to top is gradually changed from 32.5% to 20%, wherein the high Al content AlGaN close to the barrier layer part is 2nm, and the channel opening gate voltage after the Schottky preparation of the device is the positive gate voltage when the device is completely existed in the lowest AlGaN. In addition, the Al content of the lowest layer and the upper layer can be reduced more, so as to ensure the larger difference of the etching rate. The average Al content variation rate in the thickness direction was 0.5% nm, i.e., the Al content per nm was reduced by 0.5%.
The preparation method comprises the following steps:
1) preparing a source-drain metal system on a HEMT epitaxial material of the GaN substrate, and then growing a source-drain protection medium which also protects the surface of the AlGaN barrier layer of the active region; carrying out photoetching isolation region and carrying out injection isolation;
2) and photoetching gate pins, wherein if depletion type dies are integrated on the same wafer, the gate pins can be photoetched together. The size of the grid foot adopts a GaN process with the typical grid length of 0.5 um;
3) and a gate dielectric etching process, wherein the gate dielectric is etched to the AlGaN surface, so that the gate pin groove is formed in the dielectric. Carrying out photoresist removing process after etching the grid pin;
4) for a circuit with enhancement type and depletion type integration, a secondary gate pin is required to be etched, so that the depletion type device is protected by taking photoresist as a mask, and the enhancement type device is exposed after the secondary gate pin is etched;
5) grooving the photoetched grid feet with BCl as grooving gas3Gas, set power 3W, BCl3The flow is 30mms, the working air pressure is 30mTorr, and the verification proves that the trenching speed of 20 percent of Al content AlGaN is 8nm/min, and the trenching speed of 32.5 percent of Al content AlGaN is 0.5 nm/min. Because the Al content in the AlGaN barrier layer is changed from low to high from top to bottom, the grooving speed is gradually reduced from top to bottom. Therefore, the grooving depth can be effectively controlled by controlling the grooving time. After verification, stopping etching on the lowest layer of AlGaN with high Al content;
6) photoetching a gate cap, wherein the size of the gate cap can be controlled to be about 1.0um generally; the gate metal is prepared by adopting an electron beam evaporation system generally, and a metal system can be selected to be a NiPtAu barrier system. After the gate is stripped by evaporation, annealing treatment can be selectively carried out, and the annealing treatment temperature is about 400 ℃. If the wafer of the depletion device exists, photoetching a gate cap, evaporating gate metal and annealing;
7) and after gate annealing, a PECVD growth SiN medium is adopted for gate passivation, and for a monolithic circuit, resistors, capacitors and wiring are required to be prepared.
The process steps of the invention are compatible with the process technology for producing the depletion type GaN HEMT microwave millimeter wave chip.

Claims (1)

1. A preparation method of an enhanced AlGaN/GaN high electron mobility transistor comprises the following steps: the enhancement type AlGaN/GaN high electron mobility transistor is characterized in that the epitaxial material of the enhancement type AlGaN/GaN high electron mobility transistor is structurally 600um of a semi-insulating SiC monocrystal substrate layer, 500nm of a GaN high-resistance buffer layer, 20nm of a GaN channel and 25nm of an AlGaN barrier layer with gradually changed Al content from bottom to top;
in the AlGaN barrier layer with the gradually changed Al content, the Al content in AlGaN at an AlGaN/GaN interface is the highest, the Al content is 32.5%, and the Al content in AlGaN is gradually reduced to 20% from the AlGaN/GaN interface to the surface of AlGaN;
the AlGaN with high Al content close to the barrier layer is 2nm, so that when the device is completely provided with the AlGaN at the lowest part, the channel opening gate voltage after the Schottky preparation of the device is positive gate voltage; the average Al content change rate in the thickness direction is 0.5% nm, namely the Al content per nanometer is reduced by 0.5%;
the method comprises the following process steps:
(1) preparing a source drain metal system; preparing source drain metal on the epitaxial structure, and growing a source drain protective medium SiN;
(2) preparing a gate pin dielectric groove structure; forming a gate pin pattern on the surface of the epitaxial structure by adopting a photoetching process, and then removing a medium on the gate pin part by adopting one of an etching process and a wet etching process to form a medium groove structure on the gate pin part; if the prepared circuit is an enhanced and depletion type integrated single chip, photoetching and etching processes are also carried out on the grid pin of the depletion type tube core, and photoresist is removed after etching;
(3) digging a groove; adopting plasma BCl3 as reaction gas to dig grooves on the AlGaN barrier layer, and controlling the time of digging grooves to ensure that the depth of the digging grooves keeps 1-2 nm of the AlGaN layer, or completely digging grooves to completely remove all AlGaN at the grid feet; if the circuit is provided with an enhancement type device and a depletion type device at the same time, one step of photoetching is needed to be added, the secondary grid pin of the enhancement type tube core is formed by photoetching, the depletion type device is protected by photoresist, and the line width of the secondary grid pin is larger than that of the enhancement type tube core;
(4) photoetching a gate cap; photoetching a gate cap on the enhanced tube core to form a gate cap structure glue type; performing HCL treatment on the rear surface of the photoetching gate cap;
(5) forming a Schottky contact; performing gate metal evaporation, stripping and heat treatment processes to enable gate metal to form Schottky contact with the AlGaN barrier layer; the gate metal is one of Ni, Pt and W.
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US20090072240A1 (en) * 2007-09-14 2009-03-19 Transphorm Inc. III-Nitride Devices with Recessed Gates
CN102017160A (en) * 2008-04-23 2011-04-13 特兰斯夫公司 Enhancement mode III-N HEMTs
CN102034859A (en) * 2009-10-02 2011-04-27 富士通株式会社 Compound semiconductor device and method of manufacturing the same
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