CN107887421B - Display panel and display device - Google Patents

Display panel and display device Download PDF

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Publication number
CN107887421B
CN107887421B CN201711034081.7A CN201711034081A CN107887421B CN 107887421 B CN107887421 B CN 107887421B CN 201711034081 A CN201711034081 A CN 201711034081A CN 107887421 B CN107887421 B CN 107887421B
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display panel
display
sub
power supply
voltage signal
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CN107887421A (en
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马扬昭
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Wuhan Tianma Microelectronics Co Ltd
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Wuhan Tianma Microelectronics Co Ltd
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/131Interconnections, e.g. wiring lines or terminals

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

The invention discloses a display panel and a display device, wherein the display panel comprises a display area and a non-display area, and the display area comprises at least two sub-display areas in a first direction of the display panel; the display panel further includes: the power supply voltage signal lines extend along the first direction, and the signal routing lines are arranged in a different layer from the power supply voltage signal lines; in each sub-display area, each signal wire is electrically connected with each power supply voltage signal wire respectively; the line width of the signal wiring is larger than that of the power voltage signal line. In the display panel provided by the embodiment of the invention, the power supply voltage is input to the power supply voltage signal line in a regional mode, so that the voltage drop on the power supply voltage signal line is reduced, in addition, the line width of the signal routing is greater than that of the power supply voltage signal line, the voltage drop on the power supply voltage signal line is further reduced, and the display uniformity of the display panel is improved.

Description

Display panel and display device
Technical Field
The present invention relates to the field of display technologies, and in particular, to a display panel and a display device.
Background
In the display field, Organic Light-Emitting diodes (OLEDs) have the advantages of self-luminescence, fast response, wide viewing angle, high brightness, bright color, Light weight, and the like, and are considered as next generation display technologies.
In the OLED display panel, referring to fig. 1, a driving chip (IC) supplies power to each pixel in a display area (i.e., an area a in fig. 1) through a plurality of power voltage signal lines (PVDD) to drive light emitting diodes in each pixel to emit light, for clearer illustration. However, each power voltage signal line is connected to a row of pixels, and since the OLED display panel is driven by current, each pixel has a certain resistance, and thus a certain voltage Drop (IR-Drop) occurs when the power voltage signal line passes through each pixel, so that the voltage of the power voltage signal line is gradually reduced in a direction from the input end of the power voltage signal line to the output end, which causes the light emitting luminance in the corresponding pixel to be gradually reduced, thereby causing the OLED display panel to have non-uniform display luminance.
With the continuous improvement of the resolution of the display screen and the requirement of improving the screen occupation ratio of the display screen (such as a mobile phone screen), the number of pixels connected by one power supply voltage signal line is continuously increased, so that the voltage drop on the power supply voltage signal line is more serious, and the line width of the power supply voltage signal line is very thin due to the limitation of space, so that the difficulty of reducing the voltage drop on the power supply voltage signal line is further increased, and the display uniformity of the display panel is poorer.
Disclosure of Invention
Embodiments of the present invention provide a display panel and a display device, so as to solve the problem in the prior art that display uniformity of the display panel is poor due to a serious voltage drop on a power supply voltage signal line.
The embodiment of the invention provides a display panel, which comprises a display area and a non-display area, wherein in the first direction of the display panel, the display area comprises at least two sub-display areas;
the display panel further includes: a plurality of power supply voltage signal lines extending along the first direction, and signal routing lines arranged in a different layer from the power supply voltage signal lines;
in each sub-display area, each signal wire is electrically connected with each power supply voltage signal wire respectively;
the line width of the signal wiring is larger than that of the power voltage signal line.
In a possible implementation manner, in the display panel provided in the embodiment of the present invention, the display panel further includes: an anode layer positioned within the display area;
the signal wiring and the anode layer are on the same layer and made of the same material.
In a possible implementation manner, in the display panel provided in an embodiment of the present invention, the signal trace includes: the first routing wire extends along the first direction, and the second routing wire extends along a second direction crossed with the first direction;
each sub-display area comprises at least one second wire, the second wire is connected with each power supply voltage signal wire through a via hole in each sub-display area, and at least one end of the second wire is connected with the first wire.
In a possible implementation manner, in the display panel provided in the embodiment of the present invention, the power voltage signal lines in different sub-display regions are disconnected from each other.
In a possible implementation manner, in the display panel provided in the embodiment of the present invention, the second trace is connected to the first trace only at one end.
In a possible implementation manner, in the display panel provided in the embodiment of the present invention, at least a portion of the first traces are alternately located on two sides of the display area.
In a possible implementation manner, in the display panel provided in the embodiment of the present invention, the first trace is located on the same side of the display area.
In a possible implementation manner, in the display panel provided in the embodiment of the present invention, each of the second traces connects to the same first trace.
In a possible implementation manner, in the display panel provided in an embodiment of the present invention, the display panel further includes: a plurality of block cathodes arranged along the first direction and extending along the second direction, and a cathode trace extending along the first direction,
the cathode wire and the first wire are respectively positioned at two opposite sides of the display area.
In a possible implementation manner, in the display panel provided in the embodiment of the present invention, the cathode trace and the cathode are disposed in the same layer.
In a possible implementation manner, in the display panel provided in the embodiment of the present invention, two ends of the second trace are connected to the first trace.
In a possible implementation manner, in the display panel provided in the embodiment of the present invention, one end of each of the second traces is connected to the same first trace on the same side of the display area.
In a possible implementation manner, in the display panel provided in an embodiment of the present invention, the second trace includes: two sub-signal lines disconnected from each other;
and one end of each sub signal wire close to the edge of the display area is connected with the first routing wire.
In a possible implementation manner, in the display panel provided in the embodiment of the present invention, in a direction in which the input end of the first trace points to the output end, the line width of the first trace gradually increases.
In a possible implementation manner, in the display panel provided in the embodiment of the present invention, in a second direction intersecting the first direction, the display panel includes: at least two first sub-areas, and at least one second sub-area;
in the first direction, the number of pixels of any column in the second sub-area is smaller than the number of pixels of each column in the first sub-area.
In a possible implementation manner, in the display panel provided in the embodiment of the present invention, the second sub-area includes a hollow area.
In a second aspect, an embodiment of the present invention provides a display device, including: the display panel is provided.
In a possible implementation manner, in the display device provided in an embodiment of the present invention, the display device further includes: an image acquisition structure;
the image acquisition structure is arranged in a second sub-area of the display panel.
In a possible implementation manner, in the display device provided in an embodiment of the present invention, the display device further includes: one or a combination of an earphone, a light sensor, a distance sensor, an iris recognition sensor and a fingerprint recognition sensor;
the display device comprises one or a combination of the image acquisition structure, the camera, the receiver, the light sensor, the distance sensor, the iris recognition sensor and the fingerprint recognition sensor, wherein the orthographic projection of the display panel is respectively positioned in the orthographic projection of the second sub-area on the display panel.
The invention has the following beneficial effects:
the embodiment of the invention provides a display panel and a display device, wherein the display panel comprises a display area and a non-display area, and the display area comprises at least two sub-display areas in a first direction of the display panel; the display panel further includes: the power supply voltage signal lines extend along the first direction, and the signal routing lines are arranged in a different layer from the power supply voltage signal lines; in each sub-display area, each signal wire is electrically connected with each power supply voltage signal wire respectively; the line width of the signal wiring is larger than that of the power voltage signal line. In the display panel provided by the embodiment of the invention, the signal wires arranged in different layers with the power supply voltage signal wires are arranged, and each signal wire is electrically connected with each power supply voltage signal wire in each sub-display area, so that the power supply voltage is input to the power supply voltage signal wires in a regional mode, the voltage drop on the power supply voltage signal wires is reduced, in addition, the line width of the signal wires is greater than the line width of the power supply voltage signal wires, the voltage drop on the power supply voltage signal wires is further reduced, and the display uniformity of the display panel is improved.
Drawings
FIG. 1 is a schematic diagram of a display panel in the prior art;
FIGS. 2 and 3 are schematic structural diagrams of a display panel including two sub-display regions according to an embodiment of the present invention;
fig. 4 to 7 are schematic structural diagrams of a display panel in a first implementation manner according to an embodiment of the disclosure;
fig. 8 to 12 are schematic structural diagrams of a display panel in a second implementation manner according to an embodiment of the disclosure;
fig. 13 is a schematic structural diagram of a display panel according to an embodiment of the invention;
fig. 14 is a second schematic structural diagram of a display panel according to an embodiment of the invention;
fig. 15 is a schematic structural diagram of a display device according to an embodiment of the present invention.
Detailed Description
The embodiment of the invention provides a display panel and a display device, aiming at the problem that the display uniformity of the display panel is poor due to serious voltage drop on a power supply voltage signal wire in the prior art.
The following describes in detail a specific embodiment of a display panel and a display device according to an embodiment of the present invention with reference to the drawings. The sizes and shapes of the structures in the drawings are not to be considered true scale, but are merely illustrative of the present invention.
In a first aspect, an embodiment of the present invention provides a display panel, as shown in fig. 2, including a display area (e.g., an area a in fig. 2) and a non-display area (not shown), where the display area includes at least two sub-display areas in a first direction of the display panel (e.g., a direction indicated by an arrow x in fig. 2), and the display area a includes two sub-display areas a in fig. 21And A2For example, the display area a may also include more sub-display areas, for example, in fig. 4, the display area a includes a1、A2、A3And A4Four sub-display areas, where the number of sub-display areas is not limited;
the display panel further includes: a plurality of power supply voltage signal lines 11 extending along a first direction, and signal routing lines 12 arranged in a different layer from the power supply voltage signal lines 11;
in each sub-display area, each signal wire 12 is electrically connected with each power supply voltage signal wire 11;
the line width of the signal trace 12 is greater than the line width of the power supply voltage signal line 11.
In the display panel provided by the embodiment of the invention, the signal wires arranged in different layers with the power supply voltage signal wires are arranged, and each signal wire is electrically connected with each power supply voltage signal wire in each sub-display area, so that the power supply voltage is input to the power supply voltage signal wires in a regional mode, the voltage drop on the power supply voltage signal wires is reduced, in addition, the line width of the signal wires is greater than the line width of the power supply voltage signal wires, the voltage drop on the power supply voltage signal wires is further reduced, and the display uniformity of the display panel is improved.
It should be noted that, in the embodiment of the present invention, the first direction may refer to a column direction, for example, a direction indicated by an arrow x in fig. 2, or may refer to a direction opposite to the arrow x, or a second direction intersecting the first direction, or may refer to a row direction, for example, a direction indicated by an arrow y in fig. 2, or may refer to a direction opposite to the arrow y.
Referring to fig. 2, in the drawings of the embodiment of the present invention, the driving chip is located at the lower edge of the display panel for illustration, and the power voltage signal line 11 transmits the power signal in the direction from bottom to top, i.e. the direction indicated by the arrow x in the drawing.
In practical applications, the power supply voltage signal line 11 is preferably PVDD, and may be another signal line connected to each pixel for inputting a power supply signal to each pixel, and the type of the power supply voltage signal line 11 is not limited herein.
In the embodiment of the present invention, the display area is divided into at least two sub-display areas in the first direction, and the power signal is input to each power voltage signal line 11 through the sub-display areas, so as to reduce the voltage drop on the power voltage signal line 11, and in addition, a signal trace 12 disposed in a layer different from the power voltage signal line 11 is further provided, and the signal trace 12 is electrically connected to each power voltage signal line 11 in each sub-display area, because the signal trace 12 is disposed in a layer different from the power voltage signal line 11, the signal trace 12 is not limited by the space of the film layer where the power voltage signal line 11 is located, or a part of the signal trace 12 may be located in the non-display area, so that the line width of the signal trace 12 may be set to be greater than the line width of the power voltage signal line 11, and for the signal lines with the same length, the greater the line width, the smaller the resistance on the signal line, the smaller, therefore, the signal wiring 12 with a wider line width is used for transmitting the power supply signal to each sub-display area, and the voltage drop of power supply signal transmission can be further reduced.
For example, in the structure shown in fig. 1, if the power signal inputted to each PVDD signal line by the driving chip is 2V, if the voltage drop of the whole PVDD signal line is 0.2V, the power signal transmitted to the pixel farthest from the driving chip is 1.8V, in the embodiment of the present invention, taking the structure shown in fig. 2 as an example, also taking the power signal inputted to each PVDD signal line by the driving chip as an example, if the length of each PVDD signal line in two sub-display areas is the same, the total voltage drop of each PVDD signal line in each sub-display area is less than 0.1V, for example, the total voltage drop of each PVDD signal line in each sub-display area may be less than 0.1VSo as to be 0.08V, the sub-display area A in FIG. 22The power signal in the pixel farthest from the driving chip is about 1.92V, since it is in the sub-display area A1There is also a signal trace 12 for transmitting power signals, so that in the sub-display area A1The power signal in the pixel close to the driving chip is about 2V, and the power signal transmitted to the pixel farthest from the driving chip is about 1.92V, so that the voltage drop on the power voltage signal line 11 can be greatly reduced, and the display uniformity of the display panel is improved. It should be noted that, here, only data comparison is performed to illustrate the technical effects of the embodiments of the present invention, and the size of the power signal input into the power voltage signal line 11 and the voltage drop that may be generated in particular are not limited, in particular, in implementation, the power signals input into the respective signal traces 12 are preferably the same in size, and the particular value of the power signal may be set according to actual requirements. Or, the voltage drop possibly generated by each signal trace 12 may be estimated according to the line width of each signal trace 12, and power signals with different sizes are input to each signal trace 12 according to the voltage drop of each signal trace 12, so that the power signals on each power voltage signal line 11 are consistent, and the brightness uniformity of the display panel is improved.
In fig. 2, the display area includes two sub-display areas as an example, and in practical applications, more sub-display areas may be included, and the larger the number of sub-display areas is, the smaller the voltage drop on the power supply voltage signal line 11 is, and the better the display uniformity of the display panel is. In specific implementation, the areas of the sub-display regions in the display region are preferably the same, or may be set to different sizes, and may be set according to actual needs.
In practical applications, the voltage drop generated on the power supply voltage signal line 11 is related to the resolution of the display panel, that is, the number of pixels connected to the power supply voltage signal line 11, and table 1 shows the voltage drops on the PVDD signal line and the PVEE signal line in the display screens with different resolutions.
TABLE 1 Voltage drop on PVDD and PVEE Signal lines in displays of different resolutions
Aspect ratio Resolution ratio PVDD pressure drop PVEE pressure drop
16:9 1920*1080 0.16 0.508
18:9 2160*1080 0.185 0.629
19:9 2280*1080 0.198 0.694
20:9 2400*1080 0.211 0.763
21:9 2520*1080 0.224 0.834
22:9 2640*1080 0.238 0.909
23:9 2760*1080 0.252 0.987
Specifically, the display panel provided in the embodiment of the present invention may further include: an anode layer (RE layer) positioned within the display region;
the signal wiring and the anode layer are on the same layer and made of the same material.
In the embodiment of the invention, the signal wires and the anode layer are arranged in the same layer and made of the same material, and the patterns of the anode layer and the signal wires can be simultaneously formed by adopting the same composition process in the process of manufacturing the display panel, so that one-step manufacturing process can be saved, the manufacturing cost can be saved, and the thickness of the display panel can be reduced. The signal trace and the anode layer are arranged on the same layer, which is a preferred implementation manner of the embodiment of the present invention, and in specific implementation, the signal trace may also be arranged on the same layer as a film layer of other conductive materials, or a pattern of the signal trace may also be formed separately by using a conductive material.
Specifically, in the display panel provided in the embodiment of the present invention, as shown in fig. 2, the signal trace 12 may include: a first trace 121 extending along a first direction, and a second trace 122 extending along a second direction (e.g., y-direction in fig. 2) crossing the first direction;
each sub-display region includes at least one second trace 122, and in each sub-display region, the second trace 122 is connected to the second trace 122 of each power supply voltage signal line 11 through a via hole, and at least one end of the second trace 122 is connected to the first trace 121.
Specifically, at least one insulating layer is disposed between the film layer where the power voltage signal line 11 is located and the film layer where the signal trace 12 is located, and in each sub-display region, the second trace 122 may be connected to each corresponding power voltage signal line 11 through a via hole penetrating through the insulating layer.
Further, in the display panel provided in the embodiment of the present invention, as shown in fig. 3 and 4, the power voltage signal lines 11 located in different sub-display regions are disconnected from each other. Specifically, referring to fig. 3 and fig. 4 as well, the second trace 122 is preferably located at an edge of a side of the sub-display region close to the driving chip, that is, the second trace 122 is preferably connected to one end of each power supply voltage signal line 11 close to the driving chip, in a specific implementation, the second trace 122 may be connected to other positions of each power supply voltage signal line 11, for example, the second trace 122 may be connected to a middle position of each power supply voltage signal line 11, where a connection manner between the second trace 122 and each power supply voltage signal line 11 is not limited.
In addition, for the same power voltage signal line 11, the sub power voltage signal lines in different sub display regions are preferably the same length, so that the difference of the power signals inputted in each pixel can be smaller, and the uniformity of the brightness of the display panel can be better. In fig. 3 and 4, for the sake of better clarity, the power supply voltage signal lines 11 are disconnected, and for the same power supply voltage signal line 11, the distance between adjacent sub power supply voltage signal lines is larger, and in practical applications, the distance between adjacent sub power supply voltage signal lines is small, so that the signal transmission to each pixel is not affected.
Specifically, in the display panel provided in the embodiment of the present invention, the signal trace 12 may be implemented in the following manners:
the implementation mode is as follows:
as shown in fig. 4 to 7, the second trace 122 is connected to the first trace 121 only at one end, so that the total length of the signal trace 12 is short, and thus, after the power signal is input to the signal trace 12, the voltage drop generated on the signal trace 12 is small, and the line width of the signal trace 12 is greater than the line width of the power voltage signal line 11, so that the power signal transmitted to each power voltage signal line 11 has small variation, and the display uniformity of the display panel is good.
Specifically, as shown in fig. 4, at least a portion of the first trace 121 is alternately located at both sides of the display area. Thus, the first traces 121 are distributed uniformly, so that the signal traces 12 occupy a smaller area of the non-display area, which is beneficial to the design of a narrow frame. In practical applications, referring to fig. 4, all the first traces 121 may be alternately distributed on two sides of the display area, or one portion of the first traces 121 may be alternately distributed on two sides of the display area, and the other portion may be distributed on the same side of the display area, and may be set according to practical situations.
As shown in fig. 5, the first traces 121 may also be located on the same side of the display area, so that the driving chip may be connected to each of the first traces 121 only on one side, and the driving chip may more easily input the power signal into each of the first traces 121.
Further, as shown in fig. 6, each second trace 122 may connect to the same first trace 121. Therefore, enough space is provided to set the line width of the first trace 121 wider, so as to reduce the voltage drop on the first trace 121, for example, the line width of the first trace 121 may be 15 μm to 30 μm, the line width of the second trace 122 may be 7 μm to 9 μm, and the line width of the power voltage signal line 11 may be 5 μm to 7 μm. In addition, each second trace 122 is connected to the same first trace 121, which is also convenient for the driver chip to input power signals to the first trace 121.
In a specific implementation, as shown in fig. 7, the display panel may further include: a plurality of block cathodes 13 extending in a second direction, arranged in a first direction, and a cathode track 14 extending in the first direction, wherein,
the cathode trace 14 and the first trace 121 are respectively located at two opposite sides of the display area.
Referring to fig. 7, in a specific implementation, the power voltage signal lines 11 may be PVDD signal lines, the signal traces 12 input PVDD signals along a direction indicated by an arrow N in the figure, the block cathodes 13 and the cathode traces 14 may provide PVEE signals to the pixels as PVEE signal lines, the pattern of the block cathodes 13 may cover the pattern of the power voltage signal lines 11 in the same sub-display area, and the cathode traces 14 input PVEE signals along a direction indicated by an arrow M since the block cathodes 13 extend along the second direction. Since the line widths of the cathode trace 14 and the first trace 121 are relatively wide, when the power signal is transmitted from the near end of the driving chip to the far end, i.e. in the column direction, the voltage drop generated on the cathode trace 14 and the first trace 121 is relatively small. Meanwhile, the PVDD signal and the PVEE signal both generate voltage drops when transmitted in the column direction, and therefore the voltage drops tend to be the same. Therefore, the present embodiment also improves the brightness uniformity of the display panel in the column direction, so that the brightness uniformity of the display panel as a whole is better.
Specifically, in the display panel provided in the embodiment of the present invention, the cathode trace 14 and the cathode are disposed in the same layer. In the process of manufacturing the display panel, the same composition process can be adopted to simultaneously form the cathode wire 14, the block cathode 13 and the pattern of the cathode, so that one-step manufacturing process can be saved, the manufacturing cost can be saved, and the thickness of the display panel can be reduced. In the embodiment of the present invention, it is a preferred embodiment of the present invention that the cathode trace 14 and the cathode are disposed in the same layer, and in practical applications, the cathode trace 14 may also be disposed in the same layer as other conductive film layers, or the cathode trace 14 and the block-shaped cathode 13 may be made of a conductive material separately, which is not limited herein.
The implementation mode two is as follows:
both ends of the second trace 122 are connected to the first trace 121. Thus, the power signals can be simultaneously input to the power voltage signal lines 11 from both sides, the voltage drop on the second traces 122 can be reduced, and the power signals in the power voltage signal lines 11 connected with the same second trace 122 are substantially the same, so that the brightness uniformity of the display panel can be further improved.
Specifically, as shown in fig. 8 to 11, one end of each second trace 122 is connected to the same first trace 121 on the same side of the display area. The plurality of second traces 122 share the same first trace 121, so that an area occupied by the first trace 121 is reduced, a narrow frame design is facilitated, and a sufficient space may also be provided to set the line width of the first trace 121 to be wider, as shown in fig. 8, so as to reduce a voltage drop on the first trace 121, for example, the line width of the first trace 121 may be set to be between 15 μm and 30 μm, preferably 22 μm, the line width of the second trace 122 may be set to be between 7 μm and 9 μm, the line width of the power supply voltage signal line 11 may be set to be between 5 μm and 7 μm, in other embodiments, the size of each signal line may also be set according to an actual situation, for example, the line width of the power supply voltage signal line 11 may also be set to be between 4 μm and 6 μm, and the line width of the signal line 12 may also be set to be between 4 μm and 10 μm. In addition, it is also convenient for the driving chip to be connected to the first trace 121, so that the driving chip inputs a power signal to the first trace 121.
In one sub-display region closest to the driving chip, for example, in the sub-display region a4 in fig. 9, when the film layer in which each power voltage signal line 11 is located is patterned, each power voltage signal line 11 in the sub-display region a4 may be connected together by making a conductive line, for example, the conductive line m in fig. 9, and then the conductive line m is connected to the first traces 121 at both ends through the via hole. Or when the pattern of the film layer where the signal trace 12 is located is manufactured, a second trace 122, such as the second trace n in fig. 10, is manufactured, the power voltage signal lines 11 are connected together through the via hole, and the second trace n is connected to the first traces 121 at two ends.
As shown in fig. 12, the second trace 122 may include: two sub-signal lines disconnected from each other, such as 122a and 122b in fig. 12;
each sub-signal line is connected to the first trace 121 at one end near the edge of the display area.
Since the length of each sub-signal line is less than the length of the whole second trace 122, the second trace 122 is configured as two sub-signal lines which are disconnected from each other, so that the voltage drop on the second trace 122 can be reduced. Fig. 12 illustrates that the second trace 122 is disconnected at an intermediate position, and in a specific implementation, the second trace 122 may be disconnected at any position, which is not limited herein.
Further, as shown in fig. 9 to 11, the line width of the first trace 121 gradually increases in a direction (i.e., a direction indicated by an arrow x in the figure) in which the input end of the first trace 121 points to the output end. In the direction indicated by the arrow x, the voltage drop of the power signal in the first trace 121 is gradually reduced due to the voltage drop, and the voltage drop of the first trace 121 can be gradually reduced by gradually increasing the line width, so that the power signals input to each sub-display region are substantially the same, and the brightness uniformity of the display panel is improved. Specifically, as shown in fig. 9 and 10, by setting the line widths of the first routing lines 121 corresponding to each sub-display area to be different, the line widths are similarly gradually increased in a stepwise manner, so that the line widths of the first routing lines 121 are gradually increased in the direction indicated by the arrow x. As shown in fig. 11, the first trace 121 may gradually increase in a gradual manner in a direction indicated by an arrow x, which is only for illustration and is not limited to a specific arrangement manner of the first trace 121.
It should be noted that, in order to more clearly illustrate the structure in the embodiment of the present invention, six power supply voltage signal lines 11 are illustrated as an example in fig. 2 to 12, in practical applications, the number of the power supply voltage signal lines 11 is related to the number of columns of pixels, and the number of the power supply voltage signal lines 11 is not limited herein. In fig. 2 to fig. 12, each sub-display area includes one second trace 122 for example, in a specific implementation, the number of the second traces 122 in each sub-display area may be set according to an actual situation, and the number of the second traces 122 in each sub-display area is not limited herein.
It should be noted that the display panel provided in the embodiment of the present invention may be applied to a display screen with a regular shape, and may also be applied to a display screen with a special shape.
As shown in fig. 13, in the display panel provided in the foregoing embodiment of the present invention, in a second direction (for example, a direction indicated by an arrow y in the figure) intersecting with the first direction, the display panel may include: at least two first sub-areas (e.g. area B in FIG. 13)1) And at least one second sub-area (e.g., area B in FIG. 13)2);
In the first direction (e.g., the direction indicated by the arrow x in the figure), the number of pixels in any column in the second sub-area is smaller than the number of pixels in each column in the first sub-area.
As shown in FIG. 13, the profiled display screen typically includes at least one profiled region, such as region C in FIG. 13, which is typically located in the second sub-region B2In the region of (A), the region C is generally located in the second sub-region B2Thus in the first direction, the second sub-area B2The number of pixels in any column is less than that of the first sub-area B1The number of pixels in each column.
In a specific implementation, when the display panel provided in the embodiment of the present invention is applied to a heterogeneous display panel, when the display area is divided in the first direction, the area C is preferably divided into one sub-display area, and an edge of the area C may also be used as an edge of the sub-display area division.
In FIG. 13, the display panel includes two first sub-regions B1And a second sub-area B2For example, the first sub-area B may be more than one1And a second sub-region B2In FIG. 13, the second sub-region B2The second sub-area B is shown in the middle position as an example, in practical application2But also at an edge position, or at other positions, which are not limited herein.
In a specific implementation, in the display panel provided in the embodiment of the present invention, as shown in fig. 14, the second sub-region may include a hollow-out region, that is, the region C is located in the second sub-region B2Inside. In FIG. 14The second sub-area includes a rounded square hollow area as an example, and in specific implementation, the hollow area may also be set to other shapes, or more hollow areas may be set according to actual needs, which is not limited herein.
In a second aspect, based on the same inventive concept, an embodiment of the present invention further provides a display apparatus, including: the display panel is provided. The display device may be a liquid crystal display, a liquid crystal television, an Organic Light-Emitting Diode (OLED) display, an OLED television, or other display devices, or may be a mobile device such as a mobile phone, a tablet computer, a notebook, an intelligent watch, an intelligent bracelet, VR/AR glasses, or other mobile devices. As shown in fig. 15, a top view of the display device provided in the embodiment of the present invention is a mobile phone, wherein the display screen may adopt a structure of any one of the display panels, which is not limited herein. Since the display device provided in this embodiment includes the display panel described in the above embodiment, the display device also has the advantages associated with the display panel, and the implementation of the display device may refer to the above embodiment of the display panel, and repeated details are omitted.
In practical applications, as shown in fig. 15, in the display device provided in the embodiment of the present invention, the display device may further include: an image acquisition structure 15;
the image collecting structure 15 is arranged in the second sub-region B of the display panel2
In particular, the image acquisition structure 15 is preferably located in the second sub-region B2The hollow area (area C) in the second area can be arranged in the second area B without influencing the normal display of the display panel2Is arranged to the second sub-area B of the display panel, e.g. at an edge position2It is not necessary to truncate the entire row of pixel arrangements for the image acquisition structure 15, only in the second sub-region B2The position of the image acquisition structure 15 is reserved, so that the screen occupation ratio can be improved.
Further, in the display device provided in an embodiment of the present invention, the display device may further include: an earpiece 16; and one or a combination of a light sensor, a distance sensor, an iris recognition sensor and a fingerprint recognition sensor, which are not shown in the figure;
the display device comprises an image acquisition structure 15, a camera, a receiver 16, a light sensor, a distance sensor, an iris recognition sensor and a fingerprint recognition sensor, wherein one or a combination of the image acquisition structure, the camera, the receiver 16, the light sensor, the distance sensor, the iris recognition sensor and the fingerprint recognition sensor is respectively positioned in the second sub-area B in the orthographic projection of the display panel2Within the front projection of the display panel. Therefore, the display element (such as a pixel) and the non-display element (such as a camera) can be arranged in a partitioning mode, so that the non-display element cannot occupy too much space, the screen occupation ratio of the display area is improved, and better viewing experience can be brought.
The embodiment of the invention provides a display panel and a display device, wherein the display panel comprises a display area and a non-display area, and the display area comprises at least two sub-display areas in a first direction of the display panel; the display panel further includes: the power supply voltage signal lines extend along the first direction, and the signal routing lines are arranged in a different layer from the power supply voltage signal lines; in each sub-display area, each signal wire is electrically connected with each power supply voltage signal wire respectively; the line width of the signal wiring is larger than that of the power voltage signal line. In the display panel provided by the embodiment of the invention, the signal wires arranged in different layers with the power supply voltage signal wires are arranged, and each signal wire is electrically connected with each power supply voltage signal wire in each sub-display area, so that the power supply voltage is input to the power supply voltage signal wires in a regional mode, the voltage drop on the power supply voltage signal wires is reduced, in addition, the line width of the signal wires is greater than the line width of the power supply voltage signal wires, the voltage drop on the power supply voltage signal wires is further reduced, and the display uniformity of the display panel is improved.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.

Claims (18)

1. A display panel comprising a display area and a non-display area, the display area comprising at least two sub-display areas in a first direction of the display panel;
the display panel further includes: a plurality of power supply voltage signal lines extending along the first direction, and signal routing lines arranged in a different layer from the power supply voltage signal lines;
in each sub-display area, each signal wire is electrically connected with each power supply voltage signal wire respectively;
the line width of the signal wiring is larger than that of the power supply voltage signal line;
further comprising: an anode layer positioned within the display area;
the signal wiring and the anode layer are on the same layer and made of the same material.
2. The display panel of claim 1, wherein the signal trace comprises: the first routing wire extends along the first direction, and the second routing wire extends along a second direction crossed with the first direction;
each sub-display area comprises at least one second wire, the second wire is connected with each power supply voltage signal wire through a via hole in each sub-display area, and at least one end of the second wire is connected with the first wire.
3. The display panel according to claim 2, wherein the power supply voltage signal lines located in different sub-display regions are disconnected from each other.
4. The display panel of claim 2, wherein the second traces are connected to the first traces at only one end.
5. The display panel according to claim 4, wherein at least some of the first traces are alternately located at two sides of the display area.
6. The display panel of claim 4, wherein the first traces are on a same side of the display area.
7. The display panel according to claim 6, wherein each of the second traces connects the same one of the first traces.
8. The display panel according to claim 6, further comprising: a plurality of block cathodes arranged along the first direction and extending along the second direction, and a cathode trace extending along the first direction,
the cathode wire and the first wire are respectively positioned at two opposite sides of the display area.
9. The display panel of claim 8, wherein the cathode traces and the cathode are disposed in the same layer.
10. The display panel according to claim 2, wherein both ends of the second wire are connected to the first wire.
11. The display panel of claim 10, wherein one end of each of the second traces connects to the same one of the first traces on the same side of the display area.
12. The display panel of claim 10, wherein the second trace comprises: two sub-signal lines disconnected from each other;
and one end of each sub signal wire close to the edge of the display area is connected with the first routing wire.
13. The display panel according to any one of claims 2 to 12, wherein the line width of the first wire gradually increases in a direction in which the input end of the first wire points to the output end.
14. The display panel according to claim 1, wherein in a second direction intersecting the first direction, the display panel comprises: at least two first sub-areas, and at least one second sub-area;
in the first direction, the number of pixels of any column in the second sub-area is smaller than the number of pixels of each column in the first sub-area.
15. The display panel of claim 14, wherein the second sub-region comprises a hollowed-out region.
16. A display device, comprising: the display panel according to any one of claims 1 to 15.
17. The display device of claim 16, wherein the display device further comprises: an image acquisition structure;
the image acquisition structure is arranged in a second sub-area of the display panel.
18. The display device of claim 17, wherein the display device further comprises: one or a combination of an earphone, a light sensor, a distance sensor, an iris recognition sensor and a fingerprint recognition sensor;
one or a combination of the image acquisition structure, the receiver, the light sensor, the distance sensor, the iris recognition sensor and the fingerprint recognition sensor which are included by the display device is respectively positioned in the orthographic projection of the second sub-area on the display panel.
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