CN114143965B - Circuit board - Google Patents
Circuit board Download PDFInfo
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- CN114143965B CN114143965B CN202111440257.5A CN202111440257A CN114143965B CN 114143965 B CN114143965 B CN 114143965B CN 202111440257 A CN202111440257 A CN 202111440257A CN 114143965 B CN114143965 B CN 114143965B
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- 230000005684 electric field Effects 0.000 abstract description 24
- 230000005012 migration Effects 0.000 abstract description 9
- 238000013508 migration Methods 0.000 abstract description 9
- 239000002245 particle Substances 0.000 abstract description 9
- 230000009467 reduction Effects 0.000 abstract description 3
- 230000009286 beneficial effect Effects 0.000 description 12
- 230000008054 signal transmission Effects 0.000 description 9
- 230000005540 biological transmission Effects 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 5
- 238000009413 insulation Methods 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000014509 gene expression Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
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- 150000003071 polychlorinated biphenyls Chemical class 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/118—Printed elements for providing electric connections to or between printed circuits specially for flexible printed circuits, e.g. using folded portions
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Structure Of Printed Boards (AREA)
Abstract
The invention discloses a circuit board, which relates to the technical field of circuit boards, and comprises a first signal wire and a second signal wire which are arranged in different layers, wherein the first signal wire and the second signal wire are isolated by a first insulating layer, and the polarities of voltage signals transmitted by the first signal wire and the second signal wire are opposite. Therefore, the phenomenon that an electric field is formed between the signal lines with opposite polarities due to larger cross voltage when the signal lines with opposite polarities are arranged on the same layer in the related technology is effectively solved, and the reduction or avoidance of the short circuit risk caused by particle migration due to the electric field is facilitated.
Description
Technical Field
The invention relates to the technical field of circuit boards, in particular to a circuit board.
Background
Positive and negative voltage signal lines are widely distributed in flexible printed circuit boards (Flexible Printed Circuit, abbreviated as FPCs) or printed circuit boards (Printed Circuit Board, abbreviated as PCBs). When the positive and negative voltage signal lines are wired on the flexible printed circuit board or the printed circuit board, common wiring modes are that the positive and negative voltage signal lines are positioned on the same layer and are adjacently wired, the voltage crossing between the adjacent positive and negative voltage signal lines is larger, the voltage crossing potential difference is extremely easy to form a larger electric field, particle migration occurs between the positive and negative voltage signal lines, and the risk of short circuit occurs between the positive and negative voltage signal lines is increased.
Disclosure of Invention
In view of this, the present invention provides a circuit board, which effectively solves the problem that when signal lines with opposite polarities are arranged on the same layer in the related art, an electric field is formed between the signal lines with opposite polarities due to a larger cross voltage, so as to reduce or avoid the risk of short circuit caused by particle migration caused by the electric field.
The circuit board provided by the invention comprises a first signal wire and a second signal wire which are arranged in different layers, wherein the first signal wire and the second signal wire are isolated by a first insulating layer;
the polarities of the voltage signals transmitted by the first signal line and the second signal line are opposite.
Compared with the prior art, the circuit board provided by the invention has the following beneficial effects:
in the circuit board provided by the invention, the polarities of the voltage signals transmitted by the first signal line and the second signal line are opposite, namely, one of the first signal line and the second signal line transmits a positive voltage signal, and the other transmits a negative voltage signal. Particularly, in the embodiment of the invention, the first signal line and the second signal line are arranged on different film layers, the first signal line and the second signal line are separated by the first insulating layer, the plane of the circuit board in a flat state is assumed to be the first plane, and the first signal line and the second signal line are positioned on two sides of the first insulating layer and are not adjacent to the same layer along the direction perpendicular to the first plane, so that an electric field generated by positive and negative voltage difference is avoided, the phenomenon that an electric field is formed between the signal lines with opposite polarities due to larger cross voltage when the signal lines with opposite polarities are arranged on the same layer in the related art is solved, and the reduction or avoidance of the short circuit risk caused by particle migration caused by the electric field is facilitated.
Of course, it is not necessary for any one product embodying the invention to achieve all of the technical effects described above at the same time.
Other features of the present invention and its advantages will become apparent from the following detailed description of exemplary embodiments of the invention, which proceeds with reference to the accompanying drawings.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description, serve to explain the principles of the invention.
Fig. 1 is a top view of a circuit board according to an embodiment of the present invention;
FIG. 2 is a cross-sectional view of an AA of the wiring board of FIG. 1;
FIG. 3 is another AA cross-sectional view of the wiring board of FIG. 1;
FIG. 4 is a schematic diagram showing a magnetic field direction on the first signal line and the second signal line in FIG. 3;
FIG. 5 is another AA cross-sectional view of the wiring board of FIG. 1;
FIG. 6 is another AA cross-sectional view of the wiring board of FIG. 1;
FIG. 7 is another AA cross-sectional view of the wiring board of FIG. 1;
FIG. 8 is another AA cross-sectional view of the wiring board of FIG. 1;
FIG. 9 is another AA cross-sectional view of the wiring board of FIG. 1;
FIG. 10 is another AA cross-sectional view of the wiring board of FIG. 1;
fig. 11 is another AA cross-sectional view of the wiring board of fig. 1.
Detailed Description
Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that: the relative arrangement of the components and steps, numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention unless it is specifically stated otherwise.
The following description of at least one exemplary embodiment is merely exemplary in nature and is in no way intended to limit the invention, its application, or uses.
Techniques, methods, and apparatus known to one of ordinary skill in the relevant art may not be discussed in detail, but are intended to be part of the specification where appropriate.
In all examples shown and discussed herein, any specific values should be construed as merely illustrative, and not a limitation. Thus, other examples of exemplary embodiments may have different values.
It should be noted that: like reference numerals and letters denote like items in the following figures, and thus once an item is defined in one figure, no further discussion thereof is necessary in subsequent figures.
Fig. 1 is a top view of a circuit board according to an embodiment of the present invention, fig. 2 is a cross-sectional view AA of the circuit board of fig. 1, referring to fig. 1 and 2, a circuit board 100 according to an embodiment of the present invention includes a first signal line 10 and a second signal line 20 arranged in different layers, and the first signal line 10 and the second signal line 20 are isolated by a first insulating layer 41; the polarities of the voltage signals transmitted by the first signal line 10 and the second signal line 20 are opposite.
It should be noted that, fig. 1 only illustrates a circuit board with a rectangular structure as an example, and in other embodiments of the present invention, the shape of the circuit board may also be other, for example, a rounded rectangle, a circle, an ellipse, etc., which is not particularly limited in the present invention. In addition, fig. 2 only illustrates one relative positional relationship of the first signal line 10, the second signal line 20 and the first insulating layer 41, and does not represent an actual film layer structure on the circuit board, and alternatively, the circuit board may be provided with some other film layer structures besides the first signal line 10, the second signal line 20 and the first insulating layer 41, which is not particularly limited in the present invention. In fig. 2, the first signal line 10, the second signal line 20, and the first insulating layer 41 are only schematic, and do not represent the actual film thickness.
Specifically, please refer to fig. 1 and 2, in the circuit board provided by the embodiment of the invention, the polarities of the voltage signals transmitted by the first signal line 10 and the second signal line 20 are opposite, i.e. one of the first signal line 10 and the second signal line 20 transmits a positive voltage signal, and the other transmits a negative voltage signal. In particular, in the embodiment of the present invention, the first signal line 10 and the second signal line 20 are disposed in different film layers, and are separated by the first insulating layer 41, and the first signal line 10 and the second signal line 20 are disposed on two sides of the first insulating layer 41 along the direction perpendicular to the first plane on the assumption that the plane of the circuit board in the flat state is the first plane, so that the electric field generated by the difference between positive and negative voltages is avoided, the phenomenon that the electric field is formed between the signal lines with opposite polarities due to larger cross-voltage when the signal lines with opposite polarities are disposed in the same layer in the related art is solved, and the risk of short circuit caused by particle migration due to the electric field is reduced or avoided.
It should be noted that, the circuit board in the embodiment of the present invention may be any circuit board provided with positive and negative voltage signal lines, for example, may be embodied as a flexible printed circuit board FPC or a hard circuit board PCB, which is not particularly limited in the present invention.
Alternatively, when the first signal line 10 and the second signal line 20 are simultaneously provided on the wiring board, the extending directions of the first signal line 10 and the second signal line 20 on the wiring board may be set to be the same.
In an alternative embodiment of the present invention, both the first signal line 10 and the second signal line 20 transmit a fixed voltage signal.
Specifically, when one of the first signal line 10 and the second signal line 20 on the circuit board transmits a positive voltage signal and the other transmits a negative voltage signal, optionally, in the present invention, it is further defined that the first signal line 10 and the second signal line 20 each transmit a fixed voltage signal, that is, the transmitted voltage value is fixed, the signal line transmitting the fixed voltage signal may be, for example, a positive and negative power voltage signal line or a high and low level signal line, and when the positive and negative power voltage signal line or the high and low level signal line are disposed on different film layers, an electric field generated by the positive and negative voltage differences when the signal lines are disposed on the same layer is avoided, and a short circuit risk is avoided, thereby being beneficial to reliable transmission of the power voltage signal or the high and low level signal and improving stability and reliability of signal transmission on the circuit board.
It should be noted that, in the circuit board provided in the embodiment of the present invention, when the signal transmitted by the first signal line 10 is a positive voltage signal, the voltage signal transmitted by the second signal line 20 is a negative voltage signal; when the signal transmitted by the first signal line 10 is a negative voltage signal, the voltage signal transmitted by the second signal line 20 is a positive voltage signal, as long as the polarities of the voltage signals transmitted by the two signals are opposite.
In an alternative embodiment of the present invention, fig. 3 is a cross-sectional view of another AA of the circuit board in fig. 1, fig. 4 is a schematic view illustrating a magnetic field direction on the first signal line 10 and the second signal line 20 in fig. 3, please refer to fig. 3 and fig. 4, along the first direction D1, at least one first signal line 10 overlaps at least one second signal line 20, wherein the first direction D1 is perpendicular to the plane of the first insulating layer 41.
Specifically, when the first signal line 10 and the second signal line 20 are disposed on different film layers to solve the problem of electric field interference generated between the positive and negative voltage signal lines, the present invention further defines that the first signal line 10 and the second signal line 20 overlap in the first direction D1, and the polarity of the voltage signal transmitted by the first signal line 10 is assumed to be positive, and the polarity of the voltage signal transmitted by the second signal line 20 is assumed to be negative, according to the right-hand spiral rule, the magnetic field direction generated by the positive voltage signal (assumed to be a+) on the first signal line 10 on both sides thereof is one-in-one-out (upper-in, lower-out), and the magnetic field direction generated by the negative voltage signal (assumed to be B-) on both sides thereof is also one-in-out (upper-out, lower-in), so that the generated magnetic field is exactly opposite to one-out, and thus the generated magnetic field can be weakened to some extent, and even offset, while reducing the electric field interference, and the problem of signal interference is also facilitated.
It should be noted that, the embodiment shown in fig. 3 illustrates a scheme in which one first signal line 10 is disposed corresponding to one second signal line 20, and the first signal line 10 and the second signal line 20 overlap along the first direction D1, and when the two signals overlap in the first direction D1, it is beneficial to save the wiring space of the first signal line 10 and the second signal line 20, so that more signal lines are disposed in the same space. Of course, in other embodiments of the present invention, the first signal line 10 and the second signal line 20 may also be embodied in a scheme of overlapping in the first direction D1 without overlapping, which is also beneficial to save the wiring space of the first signal line 10 and the second signal line 20 to some extent.
In addition to the design scheme in which the first signal lines 10 and the second signal lines 20 are in one-to-one correspondence, the number of the first signal lines 10 and the second signal lines 20 may be other, for example, please refer to fig. 5, fig. 5 shows another AA cross-sectional view of the circuit board in fig. 1, and the embodiment shows a technical scheme in which one first signal line 10 and a plurality of second signal lines 20 are disposed correspondingly. It can be understood that in the cross-sectional view of the circuit board provided in the embodiment of the present invention, only the arrangement of the first signal line 10 and the second signal line 20 at the local positions on the circuit board is shown, and in implementation, in other areas on the circuit board, there are a plurality of first signal lines 10 and second signal lines 20, and the positional correspondence relationship thereof can refer to the positional relationship of the first signal lines 10 and the second signal lines 20 in the embodiment of the present invention, which is not described in detail herein.
With continued reference to fig. 5, in an alternative embodiment of the present invention, along the first direction D1, the same first signal line 10 is disposed corresponding to n second signal lines 20 located in the same film layer; in the first signal lines 10 and the second signal lines 20 which are correspondingly arranged, along the first direction D1, the first signal lines 10 and the n second signal lines 20 are overlapped, and n is more than or equal to 2. Alternatively, the embodiment of fig. 5 is illustrated with n=3 as an example.
Specifically, in the circuit board provided in the embodiment of the present invention, when one first signal line 10 and n second signal lines 20 are correspondingly disposed, the same first signal line 10 overlaps n second signal lines 20 along the first direction D1 in the cross-sectional structure. In the embodiment shown in fig. 5, one first signal line 10 is disposed corresponding to three second signal lines 20, and in some other embodiments of the present invention, the same first signal line 10 may also be disposed corresponding to two or more second signal lines 20, which is not particularly limited in the present invention. The invention sets the scheme that the same first signal line 10 and n second signal lines 20 are overlapped along the first direction D1, which not only solves the problem of electric field when the first signal line 10 and the second signal line 20 are arranged in the same layer in the related art, but also reduces the magnetic field signal interference when the first signal line 10 and the second signal line 20 are arranged in different layers, and simultaneously, the overlapping arrangement mode is beneficial to saving the wiring space of the first signal line 10 and the second signal line 20 on the circuit board and improving the space utilization rate on the circuit board.
In an alternative embodiment of the present invention, with continued reference to fig. 5, among the first signal line 10 and the second signal line 20 that are correspondingly disposed, the current of the first signal line 10 is I1, and the total current of the n second signal lines 20 is I2, where the ratio of I1-I2 to the larger one of I1 and I2 is less than or equal to 50%.
Specifically, in the circuit board provided in the embodiment of the present invention, for the first signal line 10 and the second signal line 20 that are correspondingly arranged, the relation between the current I1 on the first signal line 10 and the total current I2 on the n second signal lines 20 that correspond to the first signal line 10 is limited, and in fact, the difference between the currents that limit the two should not be excessively large. When a current flows through the signal lines, a magnetic field is generated around the corresponding signal lines, and the larger the current is, the larger the magnetic field intensity generated by the current is. When the difference between the current on the first signal line 10 and the total current on the second signal line 20 in the first signal line 10 and the second signal line 20 which are correspondingly arranged is less than or equal to 50%, the difference of the magnetic fields generated by the two is also small, and when the first signal line 10 and the second signal line 20 with opposite voltage signal polarities are arranged in different layers, at least half of the magnetic fields can be mutually counteracted, so that the problem of magnetic field signal interference can be greatly reduced, and the stability and the reliability of signal transmission on a circuit board are improved. In the present embodiment, the total current I2 of the second signal lines 20 corresponding to the first signal lines 10 refers to the sum of the currents of the three second signal lines 20 corresponding to the first signal lines 10.
In an alternative embodiment of the present invention, with continued reference to fig. 5, in the first signal line 10 and the second signal line 20 correspondingly provided, the current of the first signal line 10 and the total current of the second signal line 20 are equal, i.e. i1=i2.
Specifically, when the current of the first signal line 10 and the total current of the second signal line 20 are set equal among the first signal line 10 and the second signal line 20 which are correspondingly arranged, the magnetic field strength generated by the current on the first signal line 10 will be equal to the magnetic field strength generated by the current on the second signal line 20, and when the first signal line 10 and the second signal line 20 are arranged in different layers, since the polarities of the voltage signals transmitted by the first signal line 10 and the second signal line 20 are opposite, the magnetic field directions generated by the first signal line 10 and the second signal line 20 are just opposite; when the corresponding magnetic field intensities of the two signals are equal, the magnetic fields generated by the first signal line 10 and the second signal line 20 can be exactly offset, so that the problem of magnetic field signal interference is solved, the influence of the magnetic field signals on signal transmission on the circuit board is avoided, and the stability and the reliability of electric signal transmission on the circuit board are improved.
The embodiment shown in fig. 5 illustrates a scheme of overlapping the same first signal line 10 with three second signal lines 20 along the first direction D1, wherein the first signal line 10 is partially overlapped with two second signal lines 20, and in other embodiments of the present invention, the relative positional relationship between the first signal line 10 and the second signal line 20 corresponding thereto may be further embodied, for example, referring to fig. 6, fig. 6 is another AA cross-sectional view of the circuit board in fig. 1, and this embodiment illustrates another relative positional relationship between the first signal line 10 and the second signal line 20 corresponding thereto.
With continued reference to fig. 6, in an alternative embodiment of the present invention, n second signal lines 20 are located within the same range defined by the first signal line 10 along the first direction D1.
Specifically, in the first signal lines 10 and the plurality of second signal lines 20 that are correspondingly arranged, when the plurality of second signal lines 20 are all arranged in the range defined by the first signal lines 10, the space where the first signal lines 10 are located can be used for arranging the second signal lines 20 along the first direction D1, so that the wiring space on the circuit board is greatly saved, more signal lines can be arranged in the same space, and the space utilization on the circuit board is effectively improved.
In an alternative embodiment of the present invention, with continued reference to fig. 5 and 6, among n second signal lines 20 corresponding to the same first signal line 10, a voltage between any adjacent two second signal lines 20 is less than or equal to 20V.
Specifically, when the same first signal line 10 is provided corresponding to at least two second signal lines 20, the voltage signals transmitted by at least two second signal lines 20 corresponding to the same first signal line 10 may be the same or different. When the voltages transmitted by the two adjacent second signal lines 20 are not equal in the at least two second signal lines 20 corresponding to the same first signal line 10, the voltage between the two second signal lines is defined to be less than or equal to 20V, that is, the voltage across the two adjacent second signal lines 20 is defined to be less than or equal to 20V. When the cross-voltage between two adjacent signal lines is large, for example, greater than 20V, the risk of particle migration between the two signal lines will be greater, thereby increasing the risk of short-circuiting between the two adjacent signal lines. According to the invention, the cross voltage between the two adjacent second signal lines 20 is set to be less than or equal to 20V, and the risk of particle migration between the two adjacent second signal lines 20 can be reduced by reducing the cross voltage between the two adjacent second signal lines 20, so that the risk of short circuit of the two adjacent second signal lines 20 is reduced, and the stability and reliability of signals transmitted by the signal lines on the circuit board are further improved.
In an alternative embodiment of the present invention, with continued reference to fig. 5 and 6, of the first signal lines 10 and the second signal lines 20 that are correspondingly provided, voltages on n second signal lines 20 that correspond to the same first signal line 10 are equal.
Specifically, when the voltages on the n second signal lines 20 corresponding to the same first signal line 10 are all set to be equal, the voltage across any two adjacent second signal lines 20 among the n second signal lines 20 corresponding to the same first signal line 10 will be represented as 0, so that no particle migration phenomenon exists between any two adjacent second signal lines 20, and the risk of short circuit between any two adjacent second signal lines 20 is avoided to a great extent, so that the stability and reliability of electric signal transmission on the circuit board are improved.
In an alternative embodiment of the present invention, with continued reference to fig. 5 and 6, the thicknesses of n second signal lines 20 corresponding to the same first signal line 10 are equal. The thicknesses of the first signal line 10 and the second signal line 20 refer to the thicknesses of the first signal line 10 and the second signal line in the first direction D1.
In the embodiment of the present invention, the first signal line 10 and the second signal line 20 are disposed in different film layers, so as to avoid or reduce the influence of the electric field generated between the first signal line 10 and the second signal line 20, and at the same time, in the first direction D1, the plurality of second signal lines 20 disposed corresponding to the first signal line 10 are disposed to overlap the first signal line 10, which is also beneficial to reducing the influence of the magnetic field generated by the first signal line 10 and the second signal line 20.
In addition, the thicknesses of the n second signal lines 20 corresponding to the same first signal line 10 are set to be the same, and the second signal line 20 can be manufactured by adopting the same thickness specification as the first signal line 10 when being manufactured, so that the manufacturing difficulty of the second signal line 20 is reduced, the manufacturing process of the circuit board is simplified, and the manufacturing efficiency of the circuit board is improved.
The embodiments shown in fig. 5 and 6 show the same scheme of the widths of the plurality of second signal lines 20 corresponding to the same first signal line 10, and in other embodiments of the present invention, at least part of the widths of the second signal lines 20 corresponding to the first signal line 10 may be set to be different according to actual requirements. For example, referring to fig. 7, fig. 7 is a cross-sectional view of another AA of the circuit board in fig. 1, and this embodiment shows a solution in which at least part of the second signal lines 20 corresponding to the first signal lines 10 have different widths.
With continued reference to fig. 7, in an alternative embodiment of the present invention, at least two second signal lines 20 of the n second signal lines 20 corresponding to the same first signal line 10 have different widths. Fig. 7 illustrates an example of implementation in which the width of the signal line located in the middle among the three second signal lines 20 corresponding to the first signal line 10 is larger than the width of the signal lines located on both sides.
Specifically, the present invention can perform differential design on n second signal lines 20 corresponding to the same first signal line 10, for example, the widths of at least two second signal lines 20 are set to be different, so as to meet the voltage difference requirement that different second signal lines 20 can transmit. For the second signal lines 20 with different widths, the voltage signals that can be transmitted by the second signal lines can be set to be different, so that the different second signal lines 20 on the same layer on the circuit board can transmit voltages with the same polarity and different magnitudes, thereby being beneficial to improving the application flexibility of the circuit board. For example, it is assumed that the signal transmitted by the second signal line 20 is a negative voltage signal, at this time, part of the second signal line 20 may be used to transmit a negative power voltage signal, and part of the second signal line 20 may be used to transmit a low level signal, so as to meet the transmission requirement that the voltage value of the negative power voltage signal is different from that of the low level signal.
In the above embodiments, the circuit board includes the first signal line 10 and the second signal line 20, and the second signal line 20 are disposed on different film layers, and in some other embodiments of the present invention, other film layers may be disposed in the circuit board to dispose other signal lines besides the film layers on which the first signal line 10 and the second signal line 20 are disposed, for example, please refer to fig. 8, fig. 8 is another AA cross-sectional view of the circuit board in fig. 1, and this embodiment illustrates a scheme in which the signal lines are disposed on three different film layers.
With continued reference to fig. 8, in an alternative embodiment of the present invention, the circuit board further includes a third signal line 30, the third signal line 30 is located on a side of the first signal line 10 facing away from the first insulating layer 41, and the third signal line 30 is isolated from the first signal line 10 by a second insulating layer 42;
the polarity of the voltage signals transmitted by the third signal line 30 and the first signal line 10 is opposite; along a first direction D1, the same first signal line 10 overlaps m third signal lines 30 and s second signal lines 20, m is greater than or equal to 1, s is greater than or equal to 1, and the first direction D1 is perpendicular to a plane in which the first insulating layer 41 is located.
Specifically, in the circuit board provided by the embodiment of the invention, besides the first signal line 10 and the second signal line 20, the third signal line 30 is also provided, and along the first direction D1, the second signal line 20 and the third signal line 30 are respectively located at two sides of the first signal line 10, and the insulation layers are used for isolating the first signal line 10 from the second signal line 20 and isolating the first signal line 10 from the third signal line 30. The polarity of the voltage signals transmitted on the second signal line 20 and the third signal line 30 is opposite to the polarity of the voltage signals transmitted on the first signal line 10, and when the positive voltage signals are transmitted on the first signal line 10, the negative voltage signals are transmitted on the second signal line 20 and the third signal line 30; when a negative voltage signal is transmitted on the first signal line 10, a positive voltage signal is transmitted on the second signal line 20 and the third signal line 30. In the invention, the signal lines with opposite polarities to the voltage signals transmitted by the first signal line 10 are arranged on the film layers different from the first signal line 10 and are isolated by the insulating layers, so that the electric field interference generated by the positive and negative voltage differences of the first signal line 10 and the second signal line 20 is reduced or avoided, and the electric field interference generated by the positive and negative voltage differences of the first signal line 10 and the third signal line 30 is reduced or avoided, thus effectively reducing the influence of the electric field on the signal lines in the circuit board and being beneficial to improving the transmission stability and reliability of the electric signals in the circuit board.
In addition, the first signal line 10 is disposed separately from the second signal line 20 and the third signal line 30 to solve the problem of electric field interference generated between the positive and negative voltage signal lines, and the present invention further defines that the first signal line 10 and the second signal line 20 corresponding thereto are overlapped in the first direction D1, and also defines that the first signal line 10 and the second signal line 20 corresponding thereto are overlapped in the first direction D1. Assuming that the polarities of the voltage signals transmitted by the first signal line 10 are negative, the polarities of the voltage signals transmitted by the second signal line 20 and the third signal line 30 are positive, the directions of the magnetic fields generated by the first signal line 10 and the second signal line 20 are opposite according to the right-hand spiral rule, and the generated magnetic fields of the two can be at least partially offset; the directions of the magnetic fields generated by the first signal line 10 and the third signal line 30 are opposite, and at least a part of the magnetic fields generated by the first signal line 10 and the third signal line can be counteracted, so that the interference of the magnetic field on the circuit board on the transmission of the electric signals is reduced, and the reliability and the stability of the signal transmission on the circuit board are improved.
When the second signal line 20 and the third signal line 30 are respectively disposed on two sides of the first signal line 10, the present invention sets the same first signal line 10 and the second signal line 20 corresponding thereto and the third signal line 30 corresponding thereto to overlap, which is also beneficial to saving the space occupied by the whole of the first signal line 10, the second signal line 20 and the third signal line 30 and improving the space utilization of the circuit board.
Alternatively, when the first signal line 10, the second signal line 20, and the third signal line 30 are simultaneously provided on the wiring board, the extending directions of the first signal line 10, the second signal line 20, and the third signal line 30 on the wiring board are the same.
It should be noted that, in fig. 8, only an example is given as an illustration of a scheme in which one first signal line 10 corresponds to three second signal lines 20 and two third signal lines 30, respectively, and in some other embodiments of the present invention, the number of the second signal lines 20 and the third signal lines 30 corresponding to the same first signal line 10 may also be other, and the number of the second signal lines 20 and the third signal lines 30 may be greater than or equal to 1, and the number of the second signal lines 20 and the third signal lines 30 corresponding to the same first signal line 10 may be the same or different according to actual requirements, which is not particularly limited in the present invention.
In an alternative embodiment of the present invention, among the first signal line 10, the second signal line 20, and the third signal line 30 that are correspondingly disposed, the current of the first signal line 10 is I1, the total current of s second signal lines 20 is I2, and the total current of m third signal lines 30 is I3, where the ratio of I1- (i2+i3) I to the larger one of I1 and i2+i3 is less than or equal to 50%.
With continued reference to fig. 8, in the circuit board provided by the embodiment of the present invention, the second signal line 20 and the third signal line 30 having opposite polarities to the voltage signal transmitted by the first signal line 10 are respectively disposed in different film layers from the first signal line 10, and when a current passes through the first signal line 10, the second signal line 20 and the third signal line 30, magnetic fields are generated around the first signal line 10, the second signal line 20 and the third signal line 30 respectively, and the larger the current, the larger the magnetic field strength generated by the current will be. Since the polarities of the voltage signals transmitted by the second signal line 20 and the third signal line 30 are the same, the directions of the magnetic fields generated around the second signal line 20 and the third signal line 30 are the same, and are opposite to the directions of the magnetic fields generated around the first signal line 10. The difference between the current value on the first signal line 10 and the total current value on the second signal line 20 and the third signal line 30 will directly affect the magnitude of the magnetic field finally generated on the circuit board, and the larger the difference between the current values is, the more adverse the cancellation of the magnetic field is. When the difference of the current values is set to be less than or equal to 50%, the difference of the magnetic fields generated between the first signal line 10 and the second signal line 20 and the third signal line 30 will be small, and when the second signal line 20 and the third signal line 30 are respectively arranged on different film layers of the first signal line 10, at least half of the magnetic fields will be mutually offset, so that the problem of magnetic field signal interference in the circuit board is reduced, and the stability and reliability of signal transmission on the circuit board are improved.
In an alternative embodiment of the present invention, the relationships among the first signal line 10, the second signal line 20, and the third signal line 30, which are correspondingly disposed, are as follows: i1 =i2+i3.
Specifically, when the total currents i2+i3 of the first signal line 10, the second signal line 20, and the third signal line 30 are set to be equal among the correspondingly provided first signal line 10, second signal line 20, and third signal line 30, the magnetic field strength generated by the currents on the first signal line 10 will be equal to the magnetic field strength generated by the currents on the second signal line 20 and third signal line 30, and when the first signal line 10, second signal line 20, and third signal line 30 are respectively provided in different layers, the magnetic field directions generated by the first signal line 10 and second signal line 20 are just opposite, and the magnetic field directions generated by the first signal line 10 and third signal line 30 are just opposite, because the polarities of the voltage signals transmitted on the first signal line 10, second signal line 20, and third signal line 30 are opposite; when the magnetic field strength of the first signal line 10 is equal to the magnetic field strength of the second signal line 20 and the third signal line 30, the magnetic field generated by the first signal line 10 and the magnetic field generated by the second signal line 20 and the third signal line 30 can be exactly offset, so that the problem of magnetic field signal interference is solved, the influence of the magnetic field signal on signal transmission on the circuit board is avoided, and the stability and reliability of electric signal transmission on the circuit board are improved.
The embodiment shown in fig. 8 shows a scheme in which, among the first signal line 10, the second signal line 20, and the third signal line 30 which are disposed correspondingly, the first signal line 10 and a part of the second signal line 20 are partially overlapped, and the first signal line 10 and a part of the third signal line 30 are also partially overlapped along the first direction D1, and the wiring space on the circuit board can be saved to a certain extent by adopting the scheme of overlapping. To further reduce the wiring space on the circuit board, other relative positions of the first signal line 10, the second signal line 20 and the third signal line 30 may be adopted, for example, please refer to fig. 9, fig. 9 is another AA cross-sectional view of the circuit board in fig. 1, and this embodiment shows another relative position of the first signal line 10, the second signal line 20 and the third signal line 30.
With continued reference to fig. 9, in an alternative embodiment of the present invention, the s second signal lines 20 and the m third signal lines 30 are all located within the same range defined by the first signal line 10 along the first direction D1.
Specifically, in the first signal lines 10, the second signal lines 20 and the third signal lines 30 that are correspondingly arranged, when s second signal lines 20 and m third signal lines 30 are all arranged in the range defined by the first signal lines 10, the space where the first signal lines 10 are located can be used for arranging the second signal lines 20 and the third signal lines 30 along the first direction D1, so that the wiring space on the circuit board is greatly saved, more signal lines can be laid in the same space, and the space utilization on the circuit board is effectively improved.
Fig. 10 is another AA cross-sectional view of the circuit board of fig. 1, and this embodiment shows another relative positional relationship between the first signal line 10 and the second and third signal lines 20 and 30.
Referring to fig. 10, in an alternative embodiment of the present invention, along a first direction D1, a second signal line 20 and a third signal line 30 corresponding to the same first signal line 10 overlap.
Specifically, in the first signal lines 10, the second signal lines 20 and the third signal lines 30 that are correspondingly arranged, the number of the second signal lines 20 and the third signal lines 30 is the same, and the second signal lines 20 and the third signal lines 30 are arranged in a one-to-one correspondence along the first direction D1 and overlap, so that the arrangement of the second signal lines 20 corresponding to the first signal lines 10 is identical to the arrangement of the third signal lines 30, and the third signal lines 30 and the second signal lines 20 can be manufactured by adopting the same technological process, thereby being beneficial to simplifying the manufacturing process of the circuit board and improving the production efficiency. In addition, the second signal line 20 and the third signal line 30 are overlapped and laid along the first direction D1, and the second signal line 20 and the third signal line 30 occupy the same space in the first direction D1, which is beneficial to improving the space utilization of the circuit board.
Fig. 11 is a cross-sectional view of another AA of the circuit board in fig. 1, and this embodiment shows some other film structures on the circuit board, where a first protection layer 51 is further disposed on a side of the first signal line 10 away from the first insulating layer 41, a second protection layer 52 is further disposed on a side of the second signal line 20 away from the first insulating layer 41, and by disposing the first protection layer 51 on the surface of the first signal line 10 and disposing the second protection layer 52 on the surface 20 of the second signal line, protection effects on the first signal line 10 and the second signal line 20 can be achieved, and faults such as short circuits caused by external impurities falling onto the circuit board can be avoided.
In addition, in order to shield the influence of the external electric field on the circuit board, electromagnetic shielding layers may be disposed on the side of the first protection layer 51 away from the first insulation layer 41, and/or on the side of the second protection layer 52 away from the first insulation layer 41, respectively, so as to further improve the accuracy and stability of the transmission of the electrical signal on the circuit board.
In summary, the circuit board provided by the invention at least has the following beneficial effects:
in the circuit board provided by the invention, the polarities of the voltage signals transmitted by the first signal line and the second signal line are opposite, namely, one of the first signal line and the second signal line transmits a positive voltage signal, and the other transmits a negative voltage signal. Particularly, in the embodiment of the invention, the first signal line and the second signal line are arranged on different film layers, the first signal line and the second signal line are separated by the first insulating layer, the plane of the circuit board in a flat state is assumed to be the first plane, and the first signal line and the second signal line are positioned on two sides of the first insulating layer and are not adjacent to the same layer along the direction perpendicular to the first plane, so that an electric field generated by positive and negative voltage difference is avoided, the phenomenon that an electric field is formed between the signal lines with opposite polarities due to larger cross voltage when the signal lines with opposite polarities are arranged on the same layer in the related art is solved, and the reduction or avoidance of the short circuit risk caused by particle migration caused by the electric field is facilitated.
While certain specific embodiments of the invention have been described in detail by way of example, it will be appreciated by those skilled in the art that the above examples are for illustration only and are not intended to limit the scope of the invention. It will be appreciated by those skilled in the art that modifications may be made to the above embodiments without departing from the scope and spirit of the invention. The scope of the invention is defined by the appended claims.
Claims (15)
1. The circuit board is characterized by comprising a first signal line and a second signal line which are arranged in different layers, wherein the first signal line and the second signal line are isolated by a first insulating layer;
the polarities of the voltage signals transmitted by the first signal line and the second signal line are opposite;
the third signal line is positioned on one side of the first signal line, which is away from the first insulating layer, and the third signal line is isolated from the first signal line by a second insulating layer;
the polarities of the voltage signals transmitted by the third signal line and the first signal line are opposite; along a first direction, the same first signal line overlaps m third signal lines and overlaps s second signal lines, m is larger than or equal to 1, s is larger than or equal to 1, and the first direction is perpendicular to a plane where the first insulating layer is located.
2. The circuit board of claim 1, wherein the first signal line and the second signal line each transmit a fixed voltage signal.
3. The circuit board of claim 1, wherein at least one first signal line overlaps at least one second signal line along a first direction, wherein the first direction is perpendicular to a plane in which the first insulating layer lies.
4. The wiring board of claim 3, wherein the same first signal line is disposed corresponding to n second signal lines on the same film layer along the first direction; in the first signal lines and the second signal lines which are correspondingly arranged, along the first direction, the first signal lines and the n second signal lines are overlapped, and n is more than or equal to 2.
5. The circuit board of claim 4, wherein among the first signal lines and the second signal lines which are correspondingly arranged, a current of the first signal line is I1, and a total current of n second signal lines is I2, wherein a ratio of I1-I2 to a larger one of I1 and I2 is 50% or less.
6. The circuit board of claim 5, wherein i1=i2.
7. The circuit board of claim 4, wherein n of the second signal lines are located within a range defined by the same first signal line along the first direction.
8. The wiring board according to claim 4, wherein a voltage between any adjacent two of the n second signal lines corresponding to the same first signal line is 20V or less.
9. The wiring board according to claim 8, wherein voltages on n of the second signal lines corresponding to the same first signal line are equal.
10. The wiring board according to claim 4, wherein n of the second signal lines corresponding to the same first signal line have an equal thickness.
11. The wiring board according to claim 4, wherein at least two of the n second signal lines corresponding to the same first signal line have different widths.
12. The circuit board of claim 1, wherein among the first signal line, the second signal line, and the third signal line that are correspondingly provided, a current of the first signal line is I1, a total current of s second signal lines is I2, and a total current of m third signal lines is I3, wherein a ratio of I1- (i2+i3) I to a larger one of I1 and i2+i3 is 50% or less.
13. The circuit board of claim 12, wherein i1=i2+i3.
14. The wiring board of claim 1, wherein along the first direction, s of the second signal lines and m of the third signal lines are all located within a range defined by the same first signal line.
15. The wiring board according to claim 1, wherein m=s, along the first direction, the second signal line and the third signal line corresponding to the same first signal line overlap.
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| CN202111440257.5A CN114143965B (en) | 2021-11-30 | 2021-11-30 | Circuit board |
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| CN202111440257.5A CN114143965B (en) | 2021-11-30 | 2021-11-30 | Circuit board |
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| CN114143965A (en) | 2022-03-04 |
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