CN107707228A - A kind of automatic reciprocating cycling circuit, its application method and application - Google Patents
A kind of automatic reciprocating cycling circuit, its application method and application Download PDFInfo
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- CN107707228A CN107707228A CN201710885986.9A CN201710885986A CN107707228A CN 107707228 A CN107707228 A CN 107707228A CN 201710885986 A CN201710885986 A CN 201710885986A CN 107707228 A CN107707228 A CN 107707228A
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- 239000013256 coordination polymer Substances 0.000 claims abstract description 14
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- H—ELECTRICITY
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- H03K17/002—Switching arrangements with several input- or output terminals
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Abstract
The present invention relates to a kind of automatic reciprocating cycling circuit, its application method and application, belong to Digital Electronic Technique field.The present invention includes pulse signal CP, bidirectional shift register, trigger, NAND gate V1, V2, single-pole double-throw switch (SPDT) K1, K2, K3；The pulse signal CP accesses bidirectional shift register and trigger simultaneously, and single-pole double-throw switch (SPDT) K1, K2 and bidirectional shift register are connected, and bidirectional shift register, trigger, NAND gate V1, V2, single-pole double-throw switch (SPDT) K3 are sequentially connected.The present invention is directed to the operation principle and logic function of register, automatic reciprocating cycling circuit is realized with reference to flip-flop design, it can be used widely in fields such as digital display circuit, Industry Controls, and Digital Electronics Experiment teaching field can be applied to, student is allowed to pass through emulation or the method for voluntarily building circuit, the operation principle of more intuitive understanding register and trigger, and it is preferably applied in real life.
Description
Technical field
The present invention relates to a kind of automatic reciprocating cycling circuit, its application method and application, belong to Digital Electronic Technique field.
Background technology
At present, in fields such as digital display circuit, Industry Controls, it is necessary to have the reciprocal execution certain operations of step, order, typically
In the case of, people are wasted time and energy, existed by mobile phone or alarm clock timing, then manual controller unit equipment operation, this method
Part human error；And during content of registers of the student in study of numbers electronic technology, it can only be understood by book knowledge and posted
The working method and principle of storage, it is impossible to more intuitive understanding and understanding are carried out to it, so as to register of student
Practise more plain, it is difficult to be applied to it in real life well.
The content of the invention
In order to solve the above problems：The invention provides a kind of automatic reciprocating cycling circuit, its application method and application, pin
To the operation principle and logic function of register, automatic reciprocating cycling circuit is realized with reference to flip-flop design, can be in numeral
The fields such as system, Industry Control are used widely, and can apply to Digital Electronics Experiment teaching field, allow student to pass through
The operation principle of emulation or the method for voluntarily building circuit, more intuitive understanding register and trigger, and its is more preferable
It is applied in real life.
The technical scheme is that：A kind of automatic reciprocating cycling circuit, including pulse signal CP, 74LS194 bi-directional shift
Register 1,74LS73 triggers 2, NAND gate V1, V2, single-pole double-throw switch (SPDT) K1, K2, K3；The pulse signal CP is accessed simultaneously
74LS194 bidirectional shift registers 1 and 74LS73 triggers 2, the deposit of single-pole double-throw switch (SPDT) K1, K2 and 74LS194 bi-directional shift
Device 1 connects, and 74LS194 bidirectional shift registers 1,74LS73 triggers 2, NAND gate V1, V2, single-pole double-throw switch (SPDT) K3 connect successively
Connect；
+ 5V the power supplys are connected with single-pole double-throw switch (SPDT) K1, K2, K3 1 pin simultaneously by resistance R1, single-pole double-throw switch (SPDT)
K1, K2, K3 3 pin are grounded；Described single-pole double-throw switch (SPDT) K1, K2 2 pin respectively with 74LS194 bidirectional shift registers 1
RDEnd connects with A ends, single-pole double-throw switch (SPDT) K1, K2, K3 2 pin also anode company with indicator lamp LED1, LED2, LED7 respectively
Connect, LED1, LED2, LED7 minus earth；The B ends of 74LS194 bidirectional shift registers 1, C-terminal, D ends, DSLEnd, DSRTermination
Ground, the output end Q of 74LS194 bidirectional shift registers 1A、QB、QC、QDEnd passes through resistance R2, R3, R4, R5 and indicator lamp respectively
LED3, LED4, LED5, LED6 anode connection, it is grounded after indicator lamp LED3, LED4, LED5, LED6 negative electrode connection；
The output end Q of 74LS194 bidirectional shift registers 1A、QDEnd is connected with the 1K ends of 74LS73 triggers 2 and 1J ends respectively, pulse
Signal CP is connected with the CP ends of 74LS194 bidirectional shift registers 1 and the C1 ends of 74LS73 triggers 2 simultaneously, 74LS73 triggerings
The Q ends of device 2 and Q ' ends respectively connected an input of NAND gate V1, V2, and another input of NAND gate V1, V2 is mutual
The 1R of 74LS73 triggers 2 is connected to after connection simultaneouslyDEnd and single-pole double-throw switch (SPDT) K3 2 pin, the output end of NAND gate V1, V2
It is connected respectively with the S0 ends of 74LS194 bidirectional shift registers 1 and S1 ends.
A kind of application method of described automatic reciprocating cycling circuit, the application method comprise the following steps that：
A, single pulse signal source is accessed；
B, switch on power, single-pole double-throw switch (SPDT) K1, K2 are allocated to 1 pin, i.e. high level end, indicator lamp LED1, LED2 are by point
Bright, input A, B, C, D end signals of 74LS194 bidirectional shift registers 1 is high level signal for 1000,1, and 0 is low level
Signal；Single-pole double-throw switch (SPDT) K3 is allocated to 3 pin, and indicator lamp LED7 extinguishes, NAND gate V1, V2 export high level signal to
The S0 ends and S1 ends of 74LS194 bidirectional shift registers 1, the working condition of 74LS194 bidirectional shift registers 1 be and deposit, its
Output end signal is consistent with input end signal, i.e. QA、QB、QC、QDEnd signal is 1000, and indicator lamp LED3 is lit, indicator lamp
LED4, LED5, LED6 extinguish；The 1K ends of 74LS73 triggers 2 and 1J ends difference input high level signal and low level signal,
74LS73 triggers 2 reset, and the Q ends of 74LS73 triggers 2 and Q ' ends export low level signal and high level signal respectively；
C, single-pole double-throw switch (SPDT) K3 is allocated to 1 pin, i.e. high level end, indicator lamp LED7 is lit, NAND gate V1, V2 difference
Export the S0 ends and S1 ends of high level signal and low level signal to 74LS194 bidirectional shift registers 1, the two-way shiftings of 74LS194
The working condition of bit register 1 is to move to right；The single pulse signal of a low height is accessed, when the rising edge of pulse signal arrives wink
Between, the output end of 74LS194 bidirectional shift registers 1 moves to right one, QA、QB、QC、QDEnd signal is 0100, indicator lamp LED4 quilts
Light, indicator lamp LED3, LED5, LED6 extinguish；The 1K ends of 74LS73 triggers 2 and 1J ends difference input low level signal and low
Level signal, when trailing edge comes interim, the holding Last status of 74LS73 triggers 2, i.e. the Q ends of 74LS73 triggers 2 and Q '
End exports low level signal and high level signal respectively；NAND gate V1, V2 export respectively high level signal and low level signal to
The S0 ends and S1 ends of 74LS194 bidirectional shift registers 1, the working condition of 74LS194 bidirectional shift registers 1 are to move to right；
D, the single pulse signal of second low height is accessed, when the rising edge of pulse signal arrives moment, 74LS194 is two-way
The output end of shift register 1 moves to right one, QA、QB、QC、QDEnd signal is 0010, and indicator lamp LED5 is lit, indicator lamp
LED3, LED4, LED6 extinguish；The 1K ends of 74LS73 triggers 2 and 1J ends difference input low level signal and low level signal, when
Trailing edge comes temporarily, and 74LS73 triggers 2 keep Last status, i.e. the Q ends of 74LS73 triggers 2 and Q ' ends exports low respectively
Level signal and high level signal；NAND gate V1, V2 exports high level signal and low level signal and gives 74LS194 two-way shiftings respectively
The S0 ends and S1 ends of bit register 1, the working condition of 74LS194 bidirectional shift registers 1 are to move to right；
E, the single pulse signal of the 3rd low height is accessed, when the rising edge of pulse signal arrives moment, 74LS194 is two-way
The output end of shift register 1 moves to right one, QA、QB、QC、QDEnd signal is 0001, and indicator lamp LED6 is lit, indicator lamp
LED3, LED4, LED5 extinguish；The 1K ends of 74LS73 triggers 2 and 1J ends difference input low level signal and high level signal, when
Trailing edge come it is interim, the Q ends of the set of 74LS73 triggers 2, i.e. 74LS73 triggers 2 and Q ' ends export respectively high level signal and
Low level signal；NAND gate V1, V2 exports low level signal and high level signal to 74LS194 bidirectional shift registers 1 respectively
S0 ends and S1 ends, the working conditions of 74LS194 bidirectional shift registers 1 is moves to left；
F, the single pulse signal of the 4th low height is accessed, when the rising edge of pulse signal arrives moment, 74LS194 is two-way
The output end of shift register 1 moves to left one, QA、QB、QC、QDEnd signal is 0010, and indicator lamp LED5 is lit, indicator lamp
LED3, LED4, LED6 extinguish；The 1K ends of 74LS73 triggers 2 and 1J ends difference input low level signal and low level signal, when
Trailing edge comes interim, and 74LS73 triggers 2 are kept, i.e., the Q ends of 74LS73 triggers 2 and Q ' ends export respectively high level signal and
Low level signal；NAND gate V1, V2 exports low level signal and high level signal to 74LS194 bidirectional shift registers 1 respectively
S0 ends and S1 ends, the working conditions of 74LS194 bidirectional shift registers 1 is moves to left；
G, the single pulse signal of the 5th low height is accessed, when the rising edge of pulse signal arrives moment, 74LS194 is two-way
The output end of shift register 1 moves to left one, QA、QB、QC、QDEnd signal is 0100, and indicator lamp LED4 is lit, indicator lamp
LED3, LED5, LED6 extinguish；The 1K ends of 74LS73 triggers 2 and 1J ends difference input low level signal and low level signal, when
Trailing edge comes interim, and 74LS73 triggers 2 are kept, i.e., the Q ends of 74LS73 triggers 2 and Q ' ends export respectively high level signal and
Low level signal；NAND gate V1, V2 exports low level signal and high level signal to 74LS194 bidirectional shift registers 1 respectively
S0 ends and S1 ends, the working conditions of 74LS194 bidirectional shift registers 1 is moves to left；
H, the single pulse signal of the 6th low height is accessed, when the rising edge of pulse signal arrives moment, 74LS194 is two-way
The output end of shift register 1 moves to left one, QA、QB、QC、QDEnd signal is 1000, and indicator lamp LED3 is lit, indicator lamp
LED4, LED5, LED6 extinguish；The 1K ends of 74LS73 triggers 2 and 1J ends difference input high level signal and low level signal, when
Trailing edge comes interim, and 74LS73 triggers 2 reset, i.e., the Q ends of 74LS73 triggers 2 and Q ' ends export respectively low level signal and
High level signal；NAND gate V1, V2 exports high level signal and low level signal to 74LS194 bidirectional shift registers 1 respectively
S0 ends and S1 ends, the working conditions of 74LS194 bidirectional shift registers 1 is moves to right.
Pulse signal is continually entered according to above-mentioned steps, you can realizes automatic reciprocating cycling circuit, pulse signal here
Can be continuous impulse or single pulse signal；If single-pole double-throw switch (SPDT) K1 is allocated into 3 pin, i.e. earth terminal, 74LS194 bi-directional shifts are posted
The circuit of storage 1 is in the working condition reset, its QA、QB、QC、QDEnd signal is 0000, indicator lamp LED3, LED4, LED5,
LED6 is in OFF state.
A kind of described automatic reciprocating cycling circuit is applied in digital display circuit, industrial control field, when needing step
When back and forth performing operation, order, line-pulse signal timing is entered by the automatic reciprocating cycling circuit, register output end provides
The working condition of signal control other instruments equipment adds corresponding raw material, reagent, so as to realizing industrial automatic control.
A kind of application method of described automatic reciprocating cycling circuit is applied in Digital Electronics Experiment room, by taking
Automatic reciprocating cycling circuit is built, using application method step observation experiment phenomenon, for intuitively understanding register and trigger
Operation principle.
The beneficial effects of the invention are as follows：The present invention is directed to the operation principle and logic function of register, is set with reference to trigger
Meter realizes automatic reciprocating cycling circuit, can be used widely in fields such as digital display circuit, Industry Controls, and can apply to
Digital Electronics Experiment teaching field, student is allowed to be posted by emulation or the method for voluntarily building circuit, more intuitive understanding
The operation principle of storage and trigger, and it is preferably applied in real life.
Brief description of the drawings
Fig. 1 is schematic structural view of the invention.
Each label in Fig. 1：1-74LS194 bidirectional shift registers, 2-74LS73 triggers, K1~K3- single-pole double throws are opened
Close, CP- pulse signals, R1~R5- resistance, V1~V2- NAND gates, LED1~LED7- indicator lamps.
Embodiment
Below in conjunction with the accompanying drawings and specific embodiment, the invention will be further described.
Embodiment 1：As shown in figure 1, a kind of automatic reciprocating cycling circuit, including pulse signal CP, 74LS194 bi-directional shift
Register 1,74LS73 triggers 2, NAND gate V1, V2, single-pole double-throw switch (SPDT) K1, K2, K3；The pulse signal CP is accessed simultaneously
74LS194 bidirectional shift registers 1 and 74LS73 triggers 2, the deposit of single-pole double-throw switch (SPDT) K1, K2 and 74LS194 bi-directional shift
Device 1 connects, and 74LS194 bidirectional shift registers 1,74LS73 triggers 2, NAND gate V1, V2, single-pole double-throw switch (SPDT) K3 connect successively
Connect；
+ 5V the power supplys are connected with single-pole double-throw switch (SPDT) K1, K2, K3 1 pin simultaneously by resistance R1, single-pole double-throw switch (SPDT)
K1, K2, K3 3 pin are grounded；Described single-pole double-throw switch (SPDT) K1, K2 2 pin respectively with 74LS194 bidirectional shift registers 1
RDEnd connects with A ends, single-pole double-throw switch (SPDT) K1, K2, K3 2 pin also anode company with indicator lamp LED1, LED2, LED7 respectively
Connect, LED1, LED2, LED7 minus earth；The B ends of 74LS194 bidirectional shift registers 1, C-terminal, D ends, DSLEnd, DSRTermination
Ground, the output end Q of 74LS194 bidirectional shift registers 1A、QB、QC、QDEnd passes through resistance R2, R3, R4, R5 and indicator lamp respectively
LED3, LED4, LED5, LED6 anode connection, it is grounded after indicator lamp LED3, LED4, LED5, LED6 negative electrode connection；
The output end Q of 74LS194 bidirectional shift registers 1A、QDEnd is connected with the 1K ends of 74LS73 triggers 2 and 1J ends respectively, pulse
Signal CP is connected with the CP ends of 74LS194 bidirectional shift registers 1 and the C1 ends of 74LS73 triggers 2 simultaneously, 74LS73 triggerings
The Q ends of device 2 and Q ' ends respectively connected an input of NAND gate V1, V2, and another input of NAND gate V1, V2 is mutual
The 1R of 74LS73 triggers 2 is connected to after connection simultaneouslyDEnd and single-pole double-throw switch (SPDT) K3 2 pin, the output end of NAND gate V1, V2
It is connected respectively with the S0 ends of 74LS194 bidirectional shift registers 1 and S1 ends.
A kind of application method of described automatic reciprocating cycling circuit, the application method comprise the following steps that：
A, single pulse signal source is accessed；
B, switch on power, single-pole double-throw switch (SPDT) K1, K2 are allocated to 1 pin, i.e. high level end, indicator lamp LED1, LED2 are by point
Bright, input A, B, C, D end signals of 74LS194 bidirectional shift registers 1 is high level signal for 1000,1, and 0 is low level
Signal；Single-pole double-throw switch (SPDT) K3 is allocated to 3 pin, and indicator lamp LED7 extinguishes, NAND gate V1, V2 export high level signal to
The S0 ends and S1 ends of 74LS194 bidirectional shift registers 1, the working condition of 74LS194 bidirectional shift registers 1 be and deposit, its
Output end signal is consistent with input end signal, i.e. QA、QB、QC、QDEnd signal is 1000, and indicator lamp LED3 is lit, indicator lamp
LED4, LED5, LED6 extinguish；The 1K ends of 74LS73 triggers 2 and 1J ends difference input high level signal and low level signal,
74LS73 triggers 2 reset, and the Q ends of 74LS73 triggers 2 and Q ' ends export low level signal and high level signal respectively；
C, single-pole double-throw switch (SPDT) K3 is allocated to 1 pin, i.e. high level end, indicator lamp LED7 is lit, NAND gate V1, V2 difference
Export the S0 ends and S1 ends of high level signal and low level signal to 74LS194 bidirectional shift registers 1, the two-way shiftings of 74LS194
The working condition of bit register 1 is to move to right；The single pulse signal of a low height is accessed, when the rising edge of pulse signal arrives wink
Between, the output end of 74LS194 bidirectional shift registers 1 moves to right one, QA、QB、QC、QDEnd signal is 0100, indicator lamp LED4 quilts
Light, indicator lamp LED3, LED5, LED6 extinguish；The 1K ends of 74LS73 triggers 2 and 1J ends difference input low level signal and low
Level signal, when trailing edge comes interim, the holding Last status of 74LS73 triggers 2, i.e. the Q ends of 74LS73 triggers 2 and Q '
End exports low level signal and high level signal respectively；NAND gate V1, V2 export respectively high level signal and low level signal to
The S0 ends and S1 ends of 74LS194 bidirectional shift registers 1, the working condition of 74LS194 bidirectional shift registers 1 are to move to right；
D, the single pulse signal of second low height is accessed, when the rising edge of pulse signal arrives moment, 74LS194 is two-way
The output end of shift register 1 moves to right one, QA、QB、QC、QDEnd signal is 0010, and indicator lamp LED5 is lit, indicator lamp
LED3, LED4, LED6 extinguish；The 1K ends of 74LS73 triggers 2 and 1J ends difference input low level signal and low level signal, when
Trailing edge comes temporarily, and 74LS73 triggers 2 keep Last status, i.e. the Q ends of 74LS73 triggers 2 and Q ' ends exports low respectively
Level signal and high level signal；NAND gate V1, V2 exports high level signal and low level signal and gives 74LS194 two-way shiftings respectively
The S0 ends and S1 ends of bit register 1, the working condition of 74LS194 bidirectional shift registers 1 are to move to right；
E, the single pulse signal of the 3rd low height is accessed, when the rising edge of pulse signal arrives moment, 74LS194 is two-way
The output end of shift register 1 moves to right one, QA、QB、QC、QDEnd signal is 0001, and indicator lamp LED6 is lit, indicator lamp
LED3, LED4, LED5 extinguish；The 1K ends of 74LS73 triggers 2 and 1J ends difference input low level signal and high level signal, when
Trailing edge come it is interim, the Q ends of the set of 74LS73 triggers 2, i.e. 74LS73 triggers 2 and Q ' ends export respectively high level signal and
Low level signal；NAND gate V1, V2 exports low level signal and high level signal to 74LS194 bidirectional shift registers 1 respectively
S0 ends and S1 ends, the working conditions of 74LS194 bidirectional shift registers 1 is moves to left；
F, the single pulse signal of the 4th low height is accessed, when the rising edge of pulse signal arrives moment, 74LS194 is two-way
The output end of shift register 1 moves to left one, QA、QB、QC、QDEnd signal is 0010, and indicator lamp LED5 is lit, indicator lamp
LED3, LED4, LED6 extinguish；The 1K ends of 74LS73 triggers 2 and 1J ends difference input low level signal and low level signal, when
Trailing edge comes interim, and 74LS73 triggers 2 are kept, i.e., the Q ends of 74LS73 triggers 2 and Q ' ends export respectively high level signal and
Low level signal；NAND gate V1, V2 exports low level signal and high level signal to 74LS194 bidirectional shift registers 1 respectively
S0 ends and S1 ends, the working conditions of 74LS194 bidirectional shift registers 1 is moves to left；
G, the single pulse signal of the 5th low height is accessed, when the rising edge of pulse signal arrives moment, 74LS194 is two-way
The output end of shift register 1 moves to left one, QA、QB、QC、QDEnd signal is 0100, and indicator lamp LED4 is lit, indicator lamp
LED3, LED5, LED6 extinguish；The 1K ends of 74LS73 triggers 2 and 1J ends difference input low level signal and low level signal, when
Trailing edge comes interim, and 74LS73 triggers 2 are kept, i.e., the Q ends of 74LS73 triggers 2 and Q ' ends export respectively high level signal and
Low level signal；NAND gate V1, V2 exports low level signal and high level signal to 74LS194 bidirectional shift registers 1 respectively
S0 ends and S1 ends, the working conditions of 74LS194 bidirectional shift registers 1 is moves to left；
H, the single pulse signal of the 6th low height is accessed, when the rising edge of pulse signal arrives moment, 74LS194 is two-way
The output end of shift register 1 moves to left one, QA、QB、QC、QDEnd signal is 1000, and indicator lamp LED3 is lit, indicator lamp
LED4, LED5, LED6 extinguish；The 1K ends of 74LS73 triggers 2 and 1J ends difference input high level signal and low level signal, when
Trailing edge comes interim, and 74LS73 triggers 2 reset, i.e., the Q ends of 74LS73 triggers 2 and Q ' ends export respectively low level signal and
High level signal；NAND gate V1, V2 exports high level signal and low level signal to 74LS194 bidirectional shift registers 1 respectively
S0 ends and S1 ends, the working conditions of 74LS194 bidirectional shift registers 1 is moves to right.
Pulse signal is continually entered according to above-mentioned steps, you can realizes automatic reciprocating cycling circuit, pulse signal here
Can be continuous impulse or single pulse signal；If single-pole double-throw switch (SPDT) K1 is allocated into 3 pin, i.e. earth terminal, 74LS194 bi-directional shifts are posted
The circuit of storage 1 is in the working condition reset, its QA、QB、QC、QDEnd signal is 0000, indicator lamp LED3, LED4, LED5,
LED6 is in OFF state.
A kind of described automatic reciprocating cycling circuit is applied in digital display circuit, industrial control field, when needing step
When back and forth performing operation, order, line-pulse signal timing is entered by the automatic reciprocating cycling circuit, register output end provides
The working condition of signal control other instruments equipment adds corresponding raw material, reagent, so as to realizing industrial automatic control.
A kind of application method of described automatic reciprocating cycling circuit is applied in Digital Electronics Experiment room, by taking
Automatic reciprocating cycling circuit is built, using application method step observation experiment phenomenon, for intuitively understanding register and trigger
Operation principle.
The specific embodiment of the present invention is explained in detail above in conjunction with accompanying drawing, but the present invention is not limited to above-mentioned reality
Example is applied, can also be on the premise of present inventive concept not be departed from those of ordinary skill in the art's possessed knowledge
Various changes can be made.
Claims (4)
- A kind of 1. automatic reciprocating cycling circuit, it is characterised in that：Including pulse signal CP, 74LS194 bidirectional shift register (1), 74LS73 triggers (2), NAND gate V1, V2, single-pole double-throw switch (SPDT) K1, K2, K3；The pulse signal CP is accessed simultaneously 74LS194 bidirectional shift registers (1) and 74LS73 triggers (2), single-pole double-throw switch (SPDT) K1, K2 and 74LS194 bi-directional shift Register (1) is connected, and 74LS194 bidirectional shift registers (1), 74LS73 triggers (2), NAND gate V1, V2, single-pole double throw are opened K3 is closed to be sequentially connected；+ 5V the power supplys are connected with single-pole double-throw switch (SPDT) K1, K2, K3 1 pin simultaneously by resistance R1, single-pole double-throw switch (SPDT) K1, K2, K3 3 pin are grounded；Described single-pole double-throw switch (SPDT) K1, K2 2 the pin R with 74LS194 bidirectional shift registers (1) respectivelyD End is connected with A ends, and the anode of single-pole double-throw switch (SPDT) K1, K2, K3 2 pin also respectively with indicator lamp LED1, LED2, LED7 is connected, LED1, LED2, LED7 minus earth；The B ends of 74LS194 bidirectional shift registers (1), C-terminal, D ends, DSLEnd, DSRTermination Ground, the output end Q of 74LS194 bidirectional shift registers (1)A、QB、QC、QDEnd passes through resistance R2, R3, R4, R5 and instruction respectively Lamp LED3, LED4, LED5, LED6 anode connection, it is grounded after indicator lamp LED3, LED4, LED5, LED6 negative electrode connection； The output end Q of 74LS194 bidirectional shift registers (1)A、QDEnd is connected with the 1K ends of 74LS73 triggers (2) and 1J ends respectively, Pulse signal CP is connected with the CP ends of 74LS194 bidirectional shift registers (1) and the C1 ends of 74LS73 triggers (2) simultaneously, The Q ends of 74LS73 triggers (2) and Q ' ends respectively connected an input of NAND gate V1, V2, NAND gate V1, V2 it is another Individual input is connected to the 1R of 74LS73 triggers (2) simultaneously after being connected with each otherDEnd and single-pole double-throw switch (SPDT) K3 2 pin, it is and non- Door V1, V2 output end are connected with the S0 ends of 74LS194 bidirectional shift registers (1) and S1 ends respectively.
- 2. the application method of the automatic reciprocating cycling circuit described in claim 1, it is characterised in that：The application method it is specific Step is as follows：A, single pulse signal source is accessed；B, switching on power, single-pole double-throw switch (SPDT) K1, K2 are allocated to 1 pin, i.e. high level end, indicator lamp LED1, LED2 are lit, Input A, B, C, D end signal of 74LS194 bidirectional shift registers (1) are high level signal for 1000,1, and 0 is that low level is believed Number；Single-pole double-throw switch (SPDT) K3 is allocated to 3 pin, and indicator lamp LED7 extinguishes, and NAND gate V1, V2 exports high level signal to 74LS194 The S0 ends and S1 ends of bidirectional shift register (1), the working condition of 74LS194 bidirectional shift registers (1) are and deposited that it is exported End signal is consistent with input end signal, i.e. QA、QB、QC、QDEnd signal is 1000, and indicator lamp LED3 is lit, indicator lamp LED4, LED5, LED6 extinguish；The 1K ends of 74LS73 triggers (2) and 1J ends difference input high level signal and low level signal, 74LS73 triggers (2) reset, and the Q ends of 74LS73 triggers (2) and Q ' ends export low level signal and high level signal respectively；C, single-pole double-throw switch (SPDT) K3 is allocated to 1 pin, i.e. high level end, indicator lamp LED7 is lit, and NAND gate V1, V2 exports respectively The S0 ends and S1 ends of high level signal and low level signal to 74LS194 bidirectional shift registers (1), 74LS194 bi-directional shifts The working condition of register (1) is to move to right；The single pulse signal of a low height is accessed, when the rising edge of pulse signal arrives wink Between, the output end of 74LS194 bidirectional shift registers (1) moves to right one, QA、QB、QC、QDEnd signal is 0100, indicator lamp LED4 It is lit, indicator lamp LED3, LED5, LED6 extinguish；The 1K ends of 74LS73 triggers (2) and 1J ends difference input low level signal And low level signal, it is interim when trailing edge, 74LS73 triggers (2) holding Last status, i.e. 74LS73 triggers (2) Q ends and Q ' ends export low level signal and high level signal respectively；NAND gate V1, V2 exports high level signal and low level respectively S0 end and S1 end of the signal to 74LS194 bidirectional shift registers (1), the working condition of 74LS194 bidirectional shift registers (1) To move to right；D, the single pulse signal of second low height is accessed, when the rising edge arriving moment of pulse signal, 74LS194 bi-directional shifts The output end of register (1) moves to right one, QA、QB、QC、QDEnd signal is 0010, and indicator lamp LED5 is lit, indicator lamp LED3, LED4, LED6 extinguish；The 1K ends of 74LS73 triggers (2) and 1J ends difference input low level signal and low level signal, instantly Drop is interim along coming, and 74LS73 triggers (2) keep Last status, i.e. the Q ends of 74LS73 triggers (2) and Q ' ends exports respectively Low level signal and high level signal；NAND gate V1, V2 exports high level signal respectively and low level signal is two-way to 74LS194 The S0 ends and S1 ends of shift register (1), the working condition of 74LS194 bidirectional shift registers (1) are to move to right；E, the single pulse signal of the 3rd low height is accessed, when the rising edge arriving moment of pulse signal, 74LS194 bi-directional shifts The output end of register (1) moves to right one, QA、QB、QC、QDEnd signal is 0001, and indicator lamp LED6 is lit, indicator lamp LED3, LED4, LED5 extinguish；The 1K ends of 74LS73 triggers (2) and 1J ends difference input low level signal and high level signal, instantly Drop is interim along coming, and 74LS73 triggers (2) set, i.e. the Q ends of 74LS73 triggers (2) and Q ' end export high level signal respectively And low level signal；NAND gate V1, V2 exports low level signal and high level signal and gives 74LS194 bidirectional shift registers respectively (1) S0 ends and S1 ends, the working condition of 74LS194 bidirectional shift registers (1) are to move to left；F, the single pulse signal of the 4th low height is accessed, when the rising edge arriving moment of pulse signal, 74LS194 bi-directional shifts The output end of register (1) moves to left one, QA、QB、QC、QDEnd signal is 0010, and indicator lamp LED5 is lit, indicator lamp LED3, LED4, LED6 extinguish；The 1K ends of 74LS73 triggers (2) and 1J ends difference input low level signal and low level signal, instantly Drop is interim along coming, and 74LS73 triggers (2) are kept, i.e. the Q ends of 74LS73 triggers (2) and Q ' ends exports high level signal respectively And low level signal；NAND gate V1, V2 exports low level signal and high level signal and gives 74LS194 bidirectional shift registers respectively (1) S0 ends and S1 ends, the working condition of 74LS194 bidirectional shift registers (1) are to move to left；G, the single pulse signal of the 5th low height is accessed, when the rising edge arriving moment of pulse signal, 74LS194 bi-directional shifts The output end of register (1) moves to left one, QA、QB、QC、QDEnd signal is 0100, and indicator lamp LED4 is lit, indicator lamp LED3, LED5, LED6 extinguish；The 1K ends of 74LS73 triggers (2) and 1J ends difference input low level signal and low level signal, instantly Drop is interim along coming, and 74LS73 triggers (2) are kept, i.e. the Q ends of 74LS73 triggers (2) and Q ' ends exports high level signal respectively And low level signal；NAND gate V1, V2 exports low level signal and high level signal and gives 74LS194 bidirectional shift registers respectively (1) S0 ends and S1 ends, the working condition of 74LS194 bidirectional shift registers (1) are to move to left；H, the single pulse signal of the 6th low height is accessed, when the rising edge arriving moment of pulse signal, 74LS194 bi-directional shifts The output end of register (1) moves to left one, QA、QB、QC、QDEnd signal is 1000, and indicator lamp LED3 is lit, indicator lamp LED4, LED5, LED6 extinguish；The 1K ends of 74LS73 triggers (2) and 1J ends difference input high level signal and low level signal, instantly Drop is interim along coming, and 74LS73 triggers (2) reset, i.e. the Q ends of 74LS73 triggers (2) and Q ' ends exports low level signal respectively And high level signal；NAND gate V1, V2 exports high level signal and low level signal and gives 74LS194 bidirectional shift registers respectively (1) S0 ends and S1 ends, the working condition of 74LS194 bidirectional shift registers (1) are to move to right.Pulse signal is continually entered according to above-mentioned steps, you can realizes automatic reciprocating cycling circuit, pulse signal here can be Continuous impulse or single pulse signal；If single-pole double-throw switch (SPDT) K1 is allocated to 3 pin, i.e. earth terminal, 74LS194 bidirectional shift registers (1) circuit is in the working condition reset, its QA、QB、QC、QDEnd signal is 0000, indicator lamp LED3, LED4, LED5, LED6 It is in OFF state.
- 3. the automatic reciprocating cycling circuit described in a kind of claim 1 is applied in digital display circuit, industrial control field, when needing Step it is reciprocal perform operation, order when, by the automatic reciprocating cycling circuit enter line-pulse signal timing, register output The working condition that end provides signal control other instruments equipment adds corresponding raw material, reagent, so as to realizing industrial automation Control.
- 4. a kind of application method of the automatic reciprocating cycling circuit described in claim 2 is applied in Digital Electronics Experiment room In, by building automatic reciprocating cycling circuit, using application method step observation experiment phenomenon, for intuitively understand register and The operation principle of trigger.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112924848A (en) * | 2021-01-25 | 2021-06-08 | 英孚康（浙江）工业技术有限公司 | Method and system for improving safety of FCT test platform |
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