CN107656828B

CN107656828B - Method and device for detecting program running deviation path

Info

Publication number: CN107656828B
Application number: CN201710752722.6A
Authority: CN
Inventors: 苏孟豪
Original assignee: Loongson Technology Corp Ltd
Current assignee: Loongson Technology Corp Ltd
Priority date: 2017-08-28
Filing date: 2017-08-28
Publication date: 2021-03-26
Anticipated expiration: 2037-08-28
Also published as: CN107656828A

Abstract

The embodiment of the invention provides a method and a device for detecting a program running deviation path, wherein the method comprises the following steps: extracting, decoding and executing a block identifier setting and detecting instruction, so as to acquire a second block identifier of a second precursor program basic block which is executed in advance from the block identifier register, and determining a program running deviation path according to the first block identifier and the second block identifier, if the block identifier matched with the second block identifier does not exist in the first block identifier, the program operation deviation path is confirmed, the program basic block is taken as a unit, before the first sentence of instructions of each basic block is executed, if it is checked that the basic block is not executed in the correct path, confirming the program operation deviation path, so that the program operation deviation path phenomenon can be discovered early, therefore, error processing is carried out, and serious consequences that key data are deleted or code segments are erased and the like which are difficult to recover caused by the fact that the program runs off a path are avoided.

Description

Method and device for detecting program running deviation path

Technical Field

The present invention relates to the field of secure microcontroller technology, and in particular, to a method for detecting a program deviation path, an apparatus for detecting a program deviation path, an electronic device, and a readable storage medium.

Background

Microcontrollers are single-chip microcomputers in which the major part of the microcomputer is integrated on one chip, and have an extremely large number of applications in various fields, from general civil and industrial control to some places where safety and reliability are emphasized, such as financial payment, space control, and the like.

In the case of external strong interference injection, the operation of the CPU inside the microcontroller may be abnormal, so that a so-called program runaway phenomenon occurs, which causes the program operation to deviate from a normal operation path. These disturbances include power supply disturbances, light disturbances, pulse disturbances artificially added to crack the microcontroller, and high energy particles present in space, among others. The program run-off factor and the program run-off result are often unpredictable, and in many cases, after the program runs off a normal running path (namely, the program runs off), a system enters a dead loop to cause a dead halt.

The general method is that a chip specially used for monitoring the running state of a singlechip program is relied on to cause the microcontroller to reset after the program runs off a normal running path, namely, the program is executed from the initial position of a program memory to cause the system to work normally again. However, if the CPU runs to a section of key code due to program runaway, and the key data inside the microcontroller is erroneously modified, even a code section is erased, the result will be catastrophic, and the chip cannot solve the problem.

Disclosure of Invention

The technical problem to be solved by the embodiments of the present invention is to provide a method and an apparatus for detecting a program running deviation path, so that the program running deviation path can be found as early as possible, and serious consequences that key data is deleted or code segments are erased and the like are difficult to recover due to the program running deviation path are avoided.

In order to solve the above problem, the present invention discloses a method for detecting a program running deviation path, which is applied to a processor newly added with a block identification register, and comprises:

extracting a block identifier setting and detecting instruction, wherein the block identifier setting and detecting instruction comprises a first block identifier of at least one first precursor program basic block specified by a current program basic block;

decoding the block identifier setting and detection instruction;

and executing the decoded block identifier setting and detecting instruction, so that a second block identifier of a second precursor program basic block which is executed previously is obtained from the block identifier register, and determining a program running deviation path according to the first block identifier and the second block identifier.

Optionally, the executing the decoded block identification setting and detecting instruction further comprises:

and if the program operation does not deviate from the path or all the first block identifiers are zero, updating the second block identifier in the block identifier register by using the block identifier of the current program basic block.

Optionally, before the extracting the block identifier setting and detecting instruction, the method further includes:

and adding a block identifier setting and detecting instruction newly added by a processor at the inlet of the current program basic block, and acquiring the first block identifier when the block identifier setting and detecting instruction is compiled.

Optionally, the first block id is stored by a compiler into a first set instruction bit field in the block id set and detect instruction.

Optionally, the block identifier setting and detecting instruction further includes a block identifier of the current program basic block, and the block identifier of the current program basic block is stored in a second setting instruction bit field in the block identifier setting and detecting instruction by a compiler.

Optionally, when the processor switches to execute the first basic block, the method further includes:

extracting a block identifier saving instruction, wherein the block identifier saving instruction comprises a first set general register identifier, and the first set general register identifier specifies a register position;

decoding the block identification save instruction;

executing the block identification saving instruction to read the second block identification in the block identification register into the register position specified by the first setting general register identification.

Optionally, the method further comprises:

fetching a block identity recovery instruction, the block identity recovery instruction including a second set general register identity, wherein the second set general register identity specifies a register location storing a block identity of a predecessor basic block that has previously executed for the first program basic block.

Decoding the block identification recovery instruction;

executing the block identification restore instruction to cause the value in the register location specified by the second set general register identification to be written into the block identification register.

Correspondingly, an embodiment of the present invention further provides a method for detecting a deviation path of program running, where before starting to execute a current basic block of a program, the method includes:

acquiring a first block identifier of at least one first precursor basic block specified for the current basic block;

acquiring a second block identifier of a second precursor program basic block which is executed in advance from the register;

and determining a program running deviation path according to the first block identifier and the second block identifier.

Optionally, the method further comprises:

and if the program operation does not deviate from the path or all the first block identifiers are zero, updating the second block identifier in the register by using the block identifier of the current program basic block.

Optionally, when the register is a general register, the method further includes:

at the entry of the current program basic block, an instruction sequence is inserted by the compiler, the instruction sequence specifying a general purpose register for storing a second block identification.

Optionally, before the inserting by the compiler the instruction sequence, the method further comprises:

and judging that the current program basic block comprises a data modification operation or a code segment deletion operation.

Correspondingly, an embodiment of the present invention further provides an apparatus for detecting a program running deviation path, which is applied to a processor to which a block identifier register is newly added, and the apparatus includes:

the detection instruction extracting module is used for extracting block identification setting and detection instructions, and the block identification setting and detection instructions comprise first block identifications of at least one first precursor program basic block specified by a current program basic block;

a detection instruction decoding module for decoding the block identifier setting and detection instruction;

and the detection instruction execution module is used for executing the decoded block identifier setting and detection instruction, so that a second block identifier of a second precursor program basic block which is executed in advance is obtained from the block identifier register, and a program running deviation path is determined according to the first block identifier and the second block identifier.

Optionally, the detection instruction execution module further includes:

and the identifier updating submodule is used for updating the second block identifier in the block identifier register by using the block identifier of the current program basic block if the program runs on a non-deviated path or all the first block identifiers are zero.

Optionally, the apparatus further comprises:

and the instruction adding module is used for adding a block identifier setting and detecting instruction newly added by the processor into the entry of the current program basic block before the block identifier setting and detecting instruction is extracted, and the first block identifier is acquired when the block identifier setting and detecting instruction is compiled.

Optionally, the apparatus further comprises:

a storage instruction extracting module, configured to extract a block identifier storage instruction when the processor switches to execute a first program basic block, where the block identifier storage instruction includes a first set general register identifier, and the first set general register identifier specifies a register location;

a save instruction decoding module for decoding the block identifier save instruction;

a saving instruction execution module, configured to execute the block identifier saving instruction, so as to read a second block identifier in the block identifier register into a register location specified by the first set general register identifier;

a recovery instruction fetch module configured to fetch a block identifier recovery instruction, where the block identifier recovery instruction includes a second set general register identifier, where the second set general register identifier specifies a register location in which a block identifier of a predecessor basic block that has been executed previously for the first program basic block is stored;

a recovery instruction decoding module, configured to decode the block identifier recovery instruction;

and the recovery instruction execution module is used for executing the block identifier recovery instruction so as to write the value in the register position specified by the second set general register identifier into the block identifier register.

Correspondingly, the embodiment of the present invention further provides a device for detecting a deviation path of program operation, including:

a first block identifier obtaining module, configured to obtain, before starting execution of a current basic block, a first block identifier of at least one first predecessor basic block specified for the current basic block;

a second block identifier obtaining module, configured to obtain, from the register, a second block identifier of a second precursor program basic block that has been executed previously;

and the deviation determining module is used for determining a deviation path for program operation according to the first block identifier and the second block identifier.

Optionally, when the register is a general register, the apparatus further includes:

and the sequence insertion module is used for inserting an instruction sequence into an entry of the current program basic block by a compiler, wherein the instruction sequence specifies a general register for storing the second block identifier.

Optionally, the apparatus further comprises:

and the operation judging module is used for judging that the current program basic block comprises a data modification operation or a code segment deletion operation before the instruction sequence is inserted by the compiler.

Accordingly, the embodiment of the present invention further provides a readable storage medium, and when instructions in the storage medium are executed by a processor of an electronic device, the electronic device is enabled to execute one or more of the above methods for detecting a program running off a path.

According to the embodiment of the invention, the second block identifier of the basic block of the second precursor program which is executed in advance is obtained from the block identifier register by extracting, decoding and executing the block identifier setting and detecting instruction, and the program running deviation path is determined according to the first block identifier and the second block identifier, if the block identifier matched with the second block identifier does not exist in the first block identifier, the program operation deviation path is confirmed, the program basic block is taken as a unit, before the first sentence of instructions of each basic block is executed, if it is checked that the basic block is not executed in the correct path, confirming the program operation deviation path, so that the program operation deviation path phenomenon can be discovered early, therefore, error processing is carried out, and serious consequences that key data are deleted or code segments are erased and the like which are difficult to recover caused by the fact that the program runs off a path are avoided.

Drawings

FIG. 1 is a flowchart illustrating steps of a method for detecting a deviation path of a program run according to a first embodiment of the present invention;

FIG. 2 is a flowchart illustrating steps of a method for detecting a deviation path of a program run according to a second embodiment of the present invention;

fig. 3 shows a schematic diagram of a block identification setting and detection instruction IDTS;

FIG. 4 is a flowchart illustrating steps of a method for detecting a deviation path of a program run according to a third embodiment of the present invention;

FIG. 5 is a flowchart illustrating steps of a method for detecting a deviation path of a program run according to a fourth embodiment of the present invention;

FIG. 6 illustrates a block identification setting and detection flow diagram;

FIG. 7 is a diagram illustrating a block identification save instruction IDRD;

FIG. 8 illustrates a schematic diagram of a block identification restore instruction IRWR;

fig. 9 is a block diagram illustrating an embodiment of an apparatus for detecting a deviation path of a program run according to a fifth embodiment of the present invention;

fig. 10 is a block diagram illustrating an embodiment of an apparatus for detecting a deviation path of a program run according to a sixth embodiment of the present invention;

fig. 11 is a block diagram illustrating an electronic device for detecting a deviation path of a program run according to an exemplary embodiment.

Detailed Description

In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in further detail below.

Referring to fig. 1, a flowchart illustrating steps of a method for detecting a program running deviation path according to an embodiment of the present invention is shown, and applied to a processor with a block identifier register added thereto, the method specifically includes the following steps:

step 101, extracting a block identifier setting and detecting instruction.

A basic block of a program is a sequence of sequentially executed statements in the program, where there is only one entry and one exit, the entry being the first statement, and the exit being the last statement. For a basic block, execution only enters from its entry and exits from its exit, also called a basic block.

The current basic block and the predecessor basic block are relative concepts, the current basic block is the basic block currently being executed, and the predecessor basic block is the basic block executed before the current basic block. The first predecessor basic block specified for the current basic block, i.e., the first predecessor basic block that is legitimate according to the code execution path, is available from the program code. For a basic block, there may be one or more of the first predecessor basic blocks specified.

In the embodiment of the present invention, the block id is an id assigned to each basic block of the program, for example, a block number representing an execution order. The block identification of the first predecessor basic block specified for the current basic block is the first block identification. Before the current program basic block is started to be executed, the first block identifier of the first precursor program basic block specified by the current program basic block can be obtained through static analysis of the program, so as to be used for detecting whether the program is executed according to a correct execution path.

In the embodiment of the present invention, a block identification register is added to the processor, and specifically, a register may be added to the register file and allocated with a code different from a general-purpose register. In the connection relation, the block identifier register may be physically connected to the general purpose register, and the block identifier setting and detecting instruction fixedly calls the register when decoding. The processor can directly realize the logic of the block identifier setting and the detection instruction without being realized by modifying the instruction sequence of the processor before modification, the inserted instructions are few, and the processor overhead is small.

The processor may retrieve instructions (as a value or series of values) from a Program memory, the location of which is specified by a Program Counter (PC) that holds a value identifying the current Program location. For example, the search instructions are fetched from the memory or the instruction cache according to the sequence of the search instructions for the target number appearing in the program, and sent to the instruction decoding stage. The current instruction is typically fetched into an instruction register.

In the embodiment of the present invention, the block id setting and detecting instruction includes a first block id of at least one first predecessor basic block specified by the current basic block.

Step 102, decoding the block identifier setting and detecting instruction.

In an embodiment of the invention, the processor decode block identifies the set and detect instructions, which are broken down into meaningful pieces that are interpreted into instructions according to the instruction set architecture of the processor. The block identifier setting and detection instruction is decoded, and the first block identifier can be obtained from the block identifier setting and detection instruction.

And 103, executing the decoded block identifier setting and detecting instruction, so that a second block identifier of a second precursor program basic block which is executed previously is obtained from the block identifier register, and determining a program running deviation path according to the first block identifier and the second block identifier.

In this embodiment of the present invention, before the current basic block of the program is executed, the block identifier of the second basic block of the predecessor program that has been executed is the second block identifier, and the second block identifier is stored in the register, for example, a block identifier register dedicated to the storage of the second block identifier is added in the processor, and any suitable register may be specifically used to store the second block identifier, which is not limited in this embodiment of the present invention.

In the embodiment of the present invention, the decoded block identifier setting and detecting instruction may obtain a second block identifier of a second precursor basic block that has been executed previously from the block identifier register, and determine whether a block identifier matching the second block identifier exists in the first block identifier, for example, whether each first block identifier is the same as the second block identifier may be compared. If the basic block does not exist, the fact that the first precursor program basic block specified by the current program basic block is different from the second precursor program basic block which is executed previously is shown, and the program is not executed according to the correct execution path, and the fact that the program operation deviates from the path is confirmed.

In a preferred embodiment of the present invention, the executing the decoded block identification setting and detecting instruction may further include: and if the program operation does not deviate from the path or all the first block identifiers are zero, updating the second block identifier in the block identifier register by using the block identifier of the current program basic block.

In a preferred embodiment of the present invention, when the processor switches to execute the first basic block, the method may further include: and extracting a block identifier saving instruction, wherein the block identifier saving instruction comprises a first setting general register identifier, and the first setting general register identifier specifies a register position. The block identification save instruction is then decoded. Executing the block identification saving instruction to read the second block identification in the block identification register into the register position specified by the first setting general register identification.

When the processor switches to execute the first basic program block, namely the processor does not execute the current basic program block, namely the processor switches to execute other tasks from the current basic program block, in order to save the field, the basic program block for other tasks can use the block identification register, when the processor switches back to the current basic program block for execution, the block identification of the basic program block which is a precursor of the current basic program block can be read, so the block identification reading instruction is executed, and the field saving is realized.

In a preferred embodiment of the present invention, the method may further include: fetching a block identity recovery instruction, the block identity recovery instruction including a second set general register identity, wherein the second set general register identity specifies a register location storing a block identity of a predecessor basic block that has previously executed for the first program basic block. Decoding the block identification restore instruction and executing the block identification restore instruction such that the value in the register location specified by the second set general register identification is written into the block identification register.

Referring to fig. 2, a flowchart illustrating steps of a method for detecting a program running deviation path according to a second embodiment of the present invention is applied to a processor with a block identifier register, and specifically includes the following steps:

step 201, adding a new block identifier setting and detecting instruction added by the processor at the entry of the current program basic block.

In the embodiment of the present invention, a block identifier setting and detecting instruction is added to an entry of a current program basic block, and when the block identifier setting and detecting instruction is compiled, a step of acquiring a first block identifier of at least one first predecessor program basic block specified for the current program basic block is performed, and specifically, the at least one first block identifier may be acquired through static analysis.

In a preferred embodiment of the present invention, the first block id is stored by a compiler into a first set instruction bit field in the block id set and detect instruction. The first set instruction bit field is determined according to the instruction format of the block identifier setting and detecting instruction, specifically, the first block identifier is written into a bit field which is defined by the instruction format and comprises a plurality of instruction bits in the instruction.

In a preferred embodiment of the present invention, the block id setting and detecting instruction further includes a block id of the current basic block, and the block id of the current basic block is stored into the second setting instruction bit field in the block id setting and detecting instruction by the compiler. The second set instruction bit field is determined according to the instruction format of the block identifier setting and detecting instruction, specifically, the second block identifier is written into a bit field which is defined by the instruction format and comprises a plurality of instruction bits in the instruction.

The block id detect instruction is described below using the MIPS32 bit processor as an example.

As shown in fig. 3, the block id setting and detecting instruction IDTS is a schematic diagram, the added IDTS instruction uses a register type encoding format, 32 0 and 1 encodings are concatenated to represent an instruction, and the upper 6 bits (31 bits: 26 bits) of the 32-bit instruction code is an opcode field. Wherein the specific 2 (opcode 011100) instruction slot is user-definable autonomously as specified by MIPS. Embodiments of the present invention are defined by the value of the reserved SPECIAL2 empty slot in the existing MIPS instruction set. Followed by two 5-bit source operand register fields instead for storing two immediate first block identifiers PID1 and PID2, respectively, followed by a 5-bit destination operand register field instead for storing the block identifier CID of one immediate current program basic block. Followed by a 5-bit opcode, which, because it is not used, may be set to null (00000). The last 6 bits of IDTS (operation code 110000) are functional codes. The operation of the instruction is determined by both the specific 2 code and the IDTS code.

In step 202, a block identifier setting and detection instruction is extracted.

In the embodiment of the present invention, specific implementation manners may refer to descriptions in the foregoing embodiments, and details are not described herein.

Step 203, decoding the block identifier setting and detecting instruction.

And 204, executing the decoded block identifier setting and detecting instruction, so that a second block identifier of a second precursor program basic block which is executed previously is obtained from the block identifier register, and determining a program running deviation path according to the first block identifier and the second block identifier.

According to the embodiment of the invention, by adding a new block identifier setting and detecting instruction added by a processor at the entry of the current program basic block, extracting, decoding and executing the block identifier setting and detecting instruction, so that a second block identifier of a second precursor program basic block which is executed previously is obtained from the block identifier register, and a program running deviation path is determined according to the first block identifier and the second block identifier, if the first block identifier does not have a block identifier which is matched with the second block identifier, the program running deviation path is determined in units of program basic blocks, and before the first sentence instruction of each program basic block is executed, if the program basic block is checked not to be executed according to a correct path, the program running deviation path is determined, so that the phenomenon that the program running deviation path can be found early, and error processing is carried out, the serious consequences that key data are deleted or code segments are erased and the like which are difficult to recover caused by the fact that the program runs off a path are avoided.

Referring to fig. 4, a flowchart illustrating steps of a method for detecting a program running deviation path according to a third embodiment of the present invention is shown, where before starting to execute a current basic block of the program, the method may specifically include the following steps:

in step 301, a first block id of at least one first predecessor basic block specified for the current basic block is obtained.

In step 302, a second block identification of a second predecessor basic block that has been previously executed is obtained from a register.

In this embodiment of the present invention, the second block identifier is stored in a register, for example, a general register may be designated for storing the second block identifier, for example, an s7 register in an MIPS (Microprocessor without interlocked pipeline) processor, or a block identifier register dedicated to storing the second block identifier is added in the processor, and specifically, any suitable register may be used to store the second block identifier, which is not limited in this embodiment of the present invention.

In a specific implementation manner, a hardware design is not modified, and a compiler inserts an instruction sequence before a first statement of a current program basic block, and executes the instruction sequence to read a second block identifier from a specified general register. Another implementation may be to modify the processor design, add a block identification register, and add a dedicated operation instruction that is executed to read a second block identification from the block identification register.

And step 303, determining a deviation path for program operation according to the first block identifier and the second block identifier.

In the embodiment of the present invention, it is determined whether a block identifier matching the second block identifier exists in the first block identifiers, for example, whether each first block identifier is the same as the second block identifier may be compared. If the basic block does not exist, the fact that the first precursor program basic block specified by the current program basic block is different from the second precursor program basic block which is executed previously is shown, and the program is not executed according to the correct execution path, and the fact that the program operation deviates from the path is confirmed.

In a specific implementation manner, a hardware design may not be modified, and a compiler inserts an instruction sequence before a first statement of a current program basic block, and executes the instruction sequence to determine whether a block identifier matching a second block identifier exists in the first block identifier. Another implementation may be to modify the processor design, add a block identifier register, add a dedicated operation instruction, and execute the instruction to determine whether a block identifier matching the second block identifier exists in the first block identifier.

According to the embodiment of the invention, before the current program basic block is started to be executed, the first block identifier of at least one first precursor program basic block specified by the current program basic block is acquired, the second block identifier of a second precursor program basic block which is executed previously is acquired from a register, the program operation deviation path is determined according to the first block identifier and the second block identifier, if the first block identifier does not have a block identifier matched with the second block identifier, the program operation deviation path is confirmed by taking the program basic block as a unit, and if the program basic block is checked not to be executed according to a correct path before the first sentence instruction of each program basic block is executed, the program operation deviation path is confirmed, so that the phenomenon that the program operation deviation path can be found early, error processing is carried out, and the serious consequences that key data caused by the program operation deviation path is deleted or code segments are erased and the like and difficult to recover are avoided .

In a preferred embodiment of the present invention, the method may further include: and if the program operation does not deviate from the path or all the first block identifiers are zero, updating the second block identifier in the register by using the block identifier of the current program basic block.

The first block is identified as having a non-zero value as well as a zero value. When the first block flag is non-zero, it represents that there is a predecessor basic block specified for the current program basic block, and the current program basic block is not the first one to be executed in the currently executed program path. When the first block flag is zero, it represents that there is no pre-existing basic block specified for the current basic block, and the current basic block is the first basic block to be executed in the current execution program path, and there is no need for a previously executed basic block.

If the block identifier matched with the second block identifier exists in the first block identifier, the first precursor program basic block specified by the current program basic block is the same as the second precursor program basic block which is executed previously, the program is executed according to the correct execution path, and the program does not run away. Or all the first block identifiers are zero, which indicates that the current program basic block in the currently executed program path is the first program basic block to be executed, and the program is not confirmed to run away. Therefore, if the first block identifiers exist or all the first block identifiers are zero, the second block identifiers in the register are updated with the block identifiers of the current program basic block, in the concrete implementation, if the second block identifiers are stored in the specified general-purpose register, the second block identifiers stored in the specified general-purpose register are replaced with the block identifiers of the current program basic block, and if the second block identifiers are stored in the block identifier register which is specially used for storing the block identifiers, the second block identifiers stored in the block identifier register are replaced with the block identifiers of the current program basic block to serve as the second block identifiers of the precursor program basic block when the next program basic block is executed.

In a preferred embodiment of the present invention, when the register is a general register, the method may further include: at the entry of the current program basic block, an instruction sequence is inserted by the compiler, the instruction sequence specifying a general purpose register for storing a second block identification. The instruction sequence is used to perform the detection steps 302 and 303 described above, and when the instruction sequence is compiled, step 301 is performed.

In one implementation of the present invention, the method described in

steps

302 and 303 can be implemented by inserting, by a compiler, an instruction sequence into an entry of each current basic block when the current basic block is executed, without modifying the hardware design.

For example, the following instruction sequence (MIPS32 instruction) is inserted at the program basic block entry:

and instructions xori t0, s7 and PID1, wherein the instructions are used for performing exclusive or (xori) operation on the value (second block identifier) in the s7 register and the immediate PID1 (first block identifier), and storing the result into a target register t0, wherein the result is 0 in common and 1 in non-common.

An instruction clz t1, t0, which is a count of the leading 0 of execution (clz), how many 0 s before the first 1 to the right of the value in the t0 register, saves the result in the t1 register.

Instructions xori t0, s7, PID2, which are instructions that perform exclusive or (xori) operations on the value in the s7 register and the immediate PID2 (first block id), and save the result to a destination register t0, which is equal to 0 and different from 1.

An instruction clz t0, t0, which is a count of the leading 0 of execution (clz), how many 0 s before the first 1 to the right of the value in the t0 register, saves the result in the t0 register.

Instructions or t1, t1, t0, which are to perform an OR operation on the values in the t1 register and the values in the t0 register, saving the results to the t1 register.

An instruction srl t1, t1,5 that logically right shifts (srl) the value in the t1 register by 5 bits, saving the result in the t1 register.

A command teq t1, $0, which is to perform a test comparison operation (teq) on the value in the t1 register and the arithmetic value 0, and if the value in the t1 register is equivalent to the arithmetic value 0, confirm the program run, and trigger a TRAP (TRAP interrupt) exception signal.

An instruction ori s7, $0, CID, which is a logical or instruction (ori), writes the value (constant 0) in logical register # 0 ($0) and the immediate CID (block id of the current program basic block) into the s7 register after performing a bit or operation.

Wherein PID1 or PID2 is the block number of the basic block of the predecessor program, and CID is the block number of the basic block of the current program, which are both 16-bit binary numbers. When entering the program basic block, if the value in s7 is not equal to PID1 or PID2, an exception is made, and the program operation is confirmed to deviate from the path. If there is equality s7 is changed to the block number of the current program basic block.

When the instruction sequence is compiled, the step of obtaining the first block identifier of at least one first predecessor basic block specified for the current basic block of the program is performed, and specifically, the at least one first block identifier, for example, an immediate PID1 and a PID2, may be obtained through static analysis. And compiled into the instruction sequence when the instruction sequence is compiled.

In a preferred embodiment of the present invention, before the inserting of the instruction sequence by the compiler, the method may further include: and judging that the current program basic block comprises a data modification operation or a code segment deletion operation.

Because the hardware design is not modified, the number of the inserted instructions is relatively large, when the current program basic block is judged to comprise operations of modifying set data or deleting code segments and the like, an instruction sequence can be inserted, the set data can be set according to actual needs, and the program basic block insertion instruction sequence which has great influence on modifying key data or deleting code segments and the like of the current program basic block is realized in such a way, so that the irrecoverable consequence caused by program runaway is avoided.

Referring to fig. 5, a flowchart illustrating steps of a method for detecting a program running deviation path according to a fourth embodiment of the present invention is shown, where before starting to execute a current basic block, the method specifically includes the following steps:

step 401, obtaining a first block identifier of at least one first predecessor basic block specified for the current basic block.

And 402, adding a new block identifier setting and detecting instruction added by the processor at the entry of the basic block of the current program.

In the embodiment of the invention, when the register is a block identifier register newly added for the processor, the design of the processor is modified, the block identifier setting and detecting instruction can be newly added for the processor, the processor can directly realize the logic of the block identifier setting and detecting instruction without the need of realizing the logic by modifying the instruction sequence of the processor, the inserted instructions are few, and the processor overhead is small.

The block identification register is used to store a second block identification of a second predecessor basic block that has been previously executed, and may include a block identification set and detect instruction by modifying the processor design, e.g., adding the block identification register in the decode module, and adding a dedicated operation instruction. The block id setting and detecting instruction is used to perform the detecting

steps

403 and 404, and when the block id setting and detecting instruction is compiled, step 401 is performed.

In the embodiment of the present invention, a block identifier setting and detecting instruction is added to an entry of a current program basic block, and when the block identifier setting and detecting instruction is compiled, a step of acquiring a first block identifier of at least one first predecessor program basic block specified for the current program basic block is performed, and specifically, the at least one first block identifier may be acquired through static analysis. Then, executing a block identifier setting and detecting instruction, and acquiring a second block identifier of a second precursor program basic block which is executed in advance from the register; then judging whether a block identifier matched with a second block identifier exists in the first block identifier; if the first block identifiers exist or all the first block identifiers are zero, updating a second block identifier in a register by using the block identifier of the current program basic block; if not, the program is confirmed to run off-path.

In a preferred embodiment of the present invention, the block id setting and detecting instruction includes at least one first block id, and the first block id is stored in a first setting instruction bit field of the block id setting and detecting instruction by a compiler.

Specifically, after the first block identifier is obtained, when the block identifier setting and detection instruction is compiled, the compiler stores the first block identifier in a first set instruction bit field in the block identifier setting and detection instruction. The first set instruction bit field is determined according to the instruction format of the block identifier setting and detecting instruction, specifically, the first block identifier is written into a bit field which is defined by the instruction format and comprises a plurality of instruction bits in the instruction.

In a preferred embodiment of the present invention, the block id setting and detecting instruction further includes a block id of the current basic block, and the block id of the current basic block is stored in the second setting instruction bit field in the block id setting and detecting instruction by the compiler.

Specifically, when the block id setting and detecting instruction is compiled, the compiler stores the block id of the current basic block of the program into the second setting instruction bit field in the block id setting and detecting instruction. The second set instruction bit field is determined according to the instruction format of the block identifier setting and detecting instruction, specifically, the second block identifier is written into a bit field which is defined by the instruction format and comprises a plurality of instruction bits in the instruction.

In step 403, a second block identifier of a second predecessor basic block that has been previously executed is retrieved from a register.

And step 404, determining a deviation path for program operation according to the first block identifier and the second block identifier.

In the embodiment of the present invention, specific implementation manners may refer to descriptions in the foregoing embodiments, and are not described herein again.

The specific implementation flowchart may refer to the block identifier setting and detecting flowchart shown in fig. 6. Respectively judging whether the first block identifier PID1 is equivalent to 0, whether the value in the block identifier register BID is equivalent to PID1, whether the first block identifier PID2 is equivalent to 0, and whether the value in the block identifier register BID is equivalent to PID2 according to the logical relationship in the flow chart, if the non-zero first block identifier does not have the same block identifier as the second block identifier, sending out a TRAP exception signal to confirm the deviation path of program operation, and if the block identifier same as the second block identifier exists or all the first block identifiers are equivalent to 0, setting the value in the block identifier register as the block identifier CID of the current program basic block.

In a preferred embodiment of the present invention, when the register is a block identification register newly added to the processor, the method may further include: and when the processor switches to execute the first program basic block, executing a block identifier saving instruction newly added by the processor, wherein the block identifier saving instruction is used for reading out a second block identifier in the block identifier register to the first set general register.

By modifying the design of the processor, a block identifier storage instruction can be newly added to the processor, the processor can directly realize the logic of the block identifier storage instruction, and the block identifier storage instruction is used for reading out the second block identifier in the block identifier register to the first set general register, so that the field is stored when the context is switched.

In a preferred embodiment of the present invention, the block id save instruction includes an id of the first setting general register. The position of the identifier of the first setting general register in the instruction, which is determined according to the instruction format of the block identifier saving instruction, is specifically a bit field defined by the instruction format and including a plurality of instruction bits in the instruction where the identifier of the first setting general register is located.

The block id saving instruction is used to read out the value in the block id register to a first general-purpose setting register, for example, as shown in fig. 7, which is a schematic diagram of the block id saving instruction IDRD, the added IDRD instruction uses a register type encoding format, and the specific 2 (opcode 011100) instruction slot is user-defined according to MIPS specifications. Embodiments of the present invention are defined by the value of the reserved SPECIAL2 empty slot in the existing MIPS instruction set. Two 5-bit source operand register fields follow, which may be set to a null value (00000) since they are not used, followed by a 5-bit destination operand register field, which instead holds the first set general register identification rd of the block identification. Followed by a 5-bit opcode, which, because it is not used, may be set to null (00000). The last 6 bits of IDRD (operation code 110001) are functional codes. The operation of the instruction is determined by the specific 2 code and the IDRD code together.

In a preferred embodiment of the present invention, the method may further include: and executing a block identifier recovery instruction newly added by the processor, wherein the block identifier recovery instruction is used for writing the value in a second setting general register into the block identifier register, and the second setting general register is stored with the block identifier of the precursor program basic block which is executed in advance aiming at the first program basic block.

When the processor switches to execute the first basic block, after the scene of the current basic block is saved, the block identifier of the predecessor basic block which is executed previously in the first basic block can be written into the block identifier register to restore the scene of the first basic block.

The processor can directly realize the logic of the block identifier recovery instruction, the block identifier recovery instruction is used for writing the value in the second set general register into the block identifier register, and the second set general register is stored with the block identifier of the precursor program basic block which is executed in advance aiming at the first program basic block, so that the field of the first program basic block is recovered when the context is switched.

In a preferred embodiment of the present invention, the block id restore instruction includes an id of the second setting general register. The position of the identifier of the second setting general-purpose register in the instruction, which may be determined according to the instruction format of the block identifier recovery instruction, is specifically a bit field defined by the instruction format and including a plurality of instruction bits in the instruction in which the identifier of the second setting general-purpose register is located.

The block id restore instruction is used to write the second block id stored in the second general-purpose register into the block id register, for example, as shown in fig. 8, which is a schematic diagram of the block id restore instruction IDWR, the added IDWR instruction uses an encoding format of a register type, and a specific 2 (opcode 011100) instruction slot is autonomously definable by a user according to MIPS specifications. Embodiments of the present invention are defined by the value of the reserved SPECIAL2 empty slot in the existing MIPS instruction set. Followed by a 5-bit source operand register field for holding the second set general register identification rs, and a next 5-bit source operand register field, which is unused, may be set to a null value (00000). Followed by a 5-bit destination operand register field, which may be set to a null value (00000) since it is not used. Followed by a 5-bit opcode, which, because it is not used, may be set to null (00000). The last 6 bits of IDWR (operation code 110010) are function codes. The operation of the instruction is determined by the specific 2 code and the IDWR code.

According to the embodiment of the invention, before the current basic block is started to execute, the first block identification of at least one first precursor basic block specified for the current basic block is acquired, adding a new block identifier setting and detecting instruction of a processor at the inlet of the current program basic block, acquiring a second block identifier of a second precursor program basic block which is executed previously from a register, determining a program running deviation path according to the first block identifier and the second block identifier, if the block identifier matched with the second block identifier does not exist in the first block identifier, the program operation deviation path is confirmed, so that the phenomenon that the program operation deviates from the path can be discovered early, therefore, error processing is carried out, and serious consequences that key data are deleted or code segments are erased and the like which are difficult to recover caused by the fact that the program runs off a path are avoided. And the design of the processor is modified, the block identification register and the corresponding special instruction are added, and the detection overhead is reduced.

Further, when the processor switches to execute the first program basic block, the new block identifier saving instruction of the processor is executed, and the new block identifier restoring instruction of the processor is executed, so that the saving and restoring of the scene during context switching are realized.

It should be noted that, for simplicity of description, the method embodiments are described as a series of acts or combination of acts, but those skilled in the art will recognize that the present invention is not limited by the illustrated order of acts, as some steps may occur in other orders or concurrently in accordance with the embodiments of the present invention. Further, those skilled in the art will appreciate that the embodiments described in the specification are presently preferred and that no particular act is required to implement the invention.

Referring to fig. 9, a block diagram of an embodiment of a device for detecting a program running deviation path according to a fifth embodiment of the present invention is shown, and is applied to a processor to which a block identifier register is newly added, where the block identifier register specifically includes the following modules:

a detection instruction extracting module 501, configured to extract a block identifier setting and detection instruction, where the block identifier setting and detection instruction includes a first block identifier of at least one first predecessor program basic block specified by a current program basic block;

a detection instruction decoding module 502, configured to decode the block identifier setting and detection instruction;

a detection instruction executing module 503, configured to execute the decoded block identifier setting and detection instruction, so as to obtain a second block identifier of a second precursor program basic block that has been executed previously from the block identifier register, and determine a program running deviation path according to the first block identifier and the second block identifier.

In a preferred embodiment of the present invention, the detection instruction execution module further includes:

In a preferred embodiment of the present invention, the apparatus further comprises:

In a preferred embodiment of the present invention, the first block id is stored by a compiler into a first set instruction bit field in the block id set and detect instruction.

In a preferred embodiment of the present invention, the block id setting and detecting instruction further includes a block id of the current basic block, and the block id of the current basic block is stored into the second setting instruction bit field in the block id setting and detecting instruction by the compiler.

and the saving instruction execution module is used for executing the block identifier saving instruction so as to read the second block identifier in the block identifier register into the register position specified by the first setting general register identifier.

Referring to fig. 10, a block diagram of an embodiment of a device for detecting a program running deviation path according to a sixth embodiment of the present invention is shown, and specifically, the device may include the following modules:

a first block identifier obtaining module 601, configured to obtain, before starting execution of a current basic block, a first block identifier of at least one first predecessor basic block specified for the current basic block;

a second block id obtaining module 602, configured to obtain, from the register, a second block id of a second previous basic block of the second previous program that has been executed previously;

and a deviation determining module 603, configured to determine a deviation path for program running according to the first block identifier and the second block identifier.

and the identifier updating module is used for updating the second block identifier in the register by using the block identifier of the current program basic block if the program runs on a non-deviated path or all the first block identifiers are zero.

In a preferred embodiment of the present invention, when the register is a general-purpose register, the apparatus further comprises:

In a preferred embodiment of the present invention, when the register is a block identification register newly added for the processor, the apparatus further comprises:

and the instruction adding module is used for adding a block identifier setting and detecting instruction newly added by the processor at the entrance of the current program basic block.

For the device embodiment, since it is basically similar to the method embodiment, the description is simple, and for the relevant points, refer to the partial description of the method embodiment.

Fig. 11 is a block diagram illustrating an electronic device 700 for detecting a deviation path of a program run according to an exemplary embodiment. For example, the electronic device 700 may be a mobile phone, a computer, a digital broadcast terminal, a messaging device, a game console, a tablet device, a medical device, an exercise device, a personal digital assistant, and the like.

Referring to fig. 11, electronic device 700 may include one or more of the following components: a processing component 702, a memory 704, a power component 706, a multimedia component 708, an audio component 710, an input/output (I/O) interface 712, a sensor component 714, and a communication component 716.

The processing component 702 generally controls overall operation of the electronic device 700, such as operations associated with display, telephone calls, data communications, camera operations, and recording operations. The processing element 702 may include one or more processors 720 to execute instructions to perform all or part of the steps of the methods described above. Further, the processing component 702 may include one or more modules that facilitate interaction between the processing component 702 and other components. For example, the processing component 702 can include a multimedia module to facilitate interaction between the multimedia component 708 and the processing component 702.

The memory 704 is configured to store various types of data to support operation at the device 700. Examples of such data include instructions for any application or method operating on the electronic device 700, contact data, phonebook data, messages, pictures, videos, and so forth. The memory 704 may be implemented by any type or combination of volatile or non-volatile memory devices such as Static Random Access Memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic or optical disks.

The power component 704 provides power to the various components of the electronic device 700. Power components 704 may include a power management system, one or more power sources, and other components associated with generating, managing, and distributing power for electronic device 700.

The multimedia component 708 includes a screen that provides an output interface between the electronic device 700 and a user. In some embodiments, the screen may include a Liquid Crystal Display (LCD) and a Touch Panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive an input signal from a user. The touch panel includes one or more touch sensors to sense touch, slide, and gestures on the touch panel. The touch sensor may not only sense the boundary of a touch or slide action, but also detect the duration and pressure associated with the touch or slide operation. In some embodiments, the multimedia component 708 includes a front facing camera and/or a rear facing camera. The front camera and/or the rear camera may receive external multimedia data when the electronic device 700 is in an operation mode, such as a photographing mode or a video mode. Each front camera and rear camera may be a fixed optical lens system or have a focal length and optical zoom capability.

The audio component 710 is configured to output and/or input audio signals. For example, the audio component 710 includes a Microphone (MIC) configured to receive external audio signals when the electronic device 700 is in an operational mode, such as a call mode, a recording mode, and a voice recognition mode. The received audio signal may further be stored in the memory 704 or transmitted via the communication component 716. In some embodiments, audio component 710 also includes a speaker for outputting audio signals.

The I/O interface 712 provides an interface between the processing component 702 and peripheral interface modules, which may be keyboards, click wheels, buttons, etc. These buttons may include, but are not limited to: a home button, a volume button, a start button, and a lock button.

The sensor assembly 714 includes one or more sensors for providing various aspects of status assessment for the electronic device 700. For example, the sensor assembly 714 may detect an open/closed state of the device 700, the relative positioning of components, such as a display and keypad of the electronic device 700, the sensor assembly 714 may also detect a change in the position of the electronic device 700 or a component of the electronic device 700, the presence or absence of user contact with the electronic device 700, orientation or acceleration/deceleration of the electronic device 700, and a change in the temperature of the electronic device 700. The sensor assembly 714 may include a proximity sensor configured to detect the presence of a nearby object without any physical contact. The sensor assembly 714 may also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, the sensor assembly 714 may also include an acceleration sensor, a gyroscope sensor, a magnetic sensor, a pressure sensor, or a temperature sensor.

The communication component 716 is configured to facilitate wired or wireless communication between the electronic device 700 and other devices. The electronic device 700 may access a wireless network based on a communication standard, such as WiFi, 2G or 3G, or a combination thereof. In an exemplary embodiment, the communication component 714 receives a broadcast signal or broadcast related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component 714 further includes a Near Field Communication (NFC) module to facilitate short-range communications. For example, the NFC module may be implemented based on Radio Frequency Identification (RFID) technology, infrared data association (IrDA) technology, Ultra Wideband (UWB) technology, Bluetooth (BT) technology, and other technologies.

In an exemplary embodiment, the electronic device 700 may be implemented by one or more Application Specific Integrated Circuits (ASICs), Digital Signal Processors (DSPs), Digital Signal Processing Devices (DSPDs), Programmable Logic Devices (PLDs), Field Programmable Gate Arrays (FPGAs), controllers, micro-controllers, microprocessors or other electronic components for performing the above-described methods.

In an exemplary embodiment, a non-transitory computer readable storage medium comprising instructions, such as the memory 704 comprising instructions, executable by the processor 720 of the electronic device 700 to perform the above-described method is also provided. For example, the non-transitory computer readable storage medium may be a ROM, a Random Access Memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, and the like.

A non-transitory computer readable storage medium having instructions that, when executed by a processor of a terminal, enable the terminal to perform a method of detecting off-path program execution, applied to a processor to which a block identification register is newly added, the method comprising: extracting a block identifier setting and detecting instruction, wherein the block identifier setting and detecting instruction comprises a first block identifier of at least one first precursor program basic block specified by a current program basic block;

decoding the block identifier setting and detection instruction;

decoding the block identification save instruction;

Optionally, the method further comprises:

Decoding the block identification recovery instruction;

The embodiments in the present specification are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.

As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, apparatus, or computer program product. Accordingly, embodiments of the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, embodiments of the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.

Embodiments of the present invention are described with reference to flowchart illustrations and/or block diagrams of methods, terminal devices (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing terminal to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing terminal, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing terminal to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be loaded onto a computer or other programmable data processing terminal to cause a series of operational steps to be performed on the computer or other programmable terminal to produce a computer implemented process such that the instructions which execute on the computer or other programmable terminal provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

While preferred embodiments of the present invention have been described, additional variations and modifications of these embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all such alterations and modifications as fall within the scope of the embodiments of the invention.

Finally, it should also be noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or terminal that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or terminal. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or terminal that comprises the element.

The method for detecting the program operation deviation path and the device for detecting the program operation deviation path provided by the invention are described in detail, a specific example is applied in the text to explain the principle and the implementation mode of the invention, and the description of the embodiment is only used for helping to understand the method and the core idea of the invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.

Claims

1. A method for detecting a deviation path of a program running, applied to a processor to which a block identification register is newly added, the method comprising:

extracting a block identifier setting and detecting instruction, wherein the block identifier setting and detecting instruction comprises a first block identifier of at least one first precursor program basic block specified by a current program basic block; decoding the block identifier setting and detection instruction;

executing the decoded block identifier setting and detecting instruction, so that a second block identifier of a second precursor program basic block which is executed previously is obtained from the block identifier register, and determining a program running deviation path according to the first block identifier and the second block identifier;

the block identification register is a newly-added register in the register file and is distributed with codes different from general registers;

determining a program running deviation path according to the first block identifier and the second block identifier, specifically comprising:

performing an exclusive-or operation on the second block identifier and a first immediate to obtain a first exclusive-or result, and storing the first exclusive-or result in a first target register, where the first immediate represents a first block identifier; calculating the leading zero number corresponding to the first XOR result stored in the first target register to obtain a first counting result, and storing the first counting result into a second target register;

performing an exclusive-or operation on the second block identifier and a second immediate to obtain a second exclusive-or result, and storing the second exclusive-or result in a first target register, where the second immediate represents another first block identifier, and the first immediate is different from the second immediate; calculating the leading zero number corresponding to a second XOR result stored in the first target register to obtain a second counting result, and storing the second counting result into the first target register;

executing OR operation on the first counting result and the second counting result, and saving the OR operation result into the second target register;

in the second target register, after the OR operation result is shifted to the right by the specified number of bits, the right shift result is stored;

comparing the right shift result with an arithmetic value of 0; and when the comparison operation results are the same, determining that the program runs on a deviated path.

2. The method of claim 1, wherein the performing the decoded block identification setup and detect instruction further comprises:

3. The method of claim 1, wherein prior to the fetching the block identification set and detect instruction, the method further comprises:

4. The method of claim 3, wherein the first block identification is stored by a compiler in a first set instruction bit field of the block identification set and detect instruction.

5. The method of claim 1 or 2, wherein the block id set and detect instruction further comprises a block id of the current basic block, and the block id of the current basic block is stored into the second set instruction bit field of the block id set and detect instruction by the compiler.

6. The method according to any one of claims 1-3, wherein when the processor switches execution of a first basic block, the method further comprises:

decoding the block identification save instruction;

7. The method of claim 6, further comprising:

fetching a block identification recovery instruction, the block identification recovery instruction including a second set general register identification, wherein the second set general register identification specifies a register location storing a block identification of a predecessor basic block that has previously executed for the first program basic block;

decoding the block identification recovery instruction;

8. A method for detecting a deviation path of program operation, comprising, before starting execution of a current basic block:

determining a program running deviation path according to the first block identifier and the second block identifier, wherein if the first block identifier does not have a block identifier matched with the second block identifier, the program deviation path is determined;

wherein the register storing the second block identifier is a newly added register in a register file and is allocated with a code different from a general register;

9. The method of claim 8, further comprising:

10. The method according to claim 8 or 9, wherein when the register is a general-purpose register, the method further comprises:

11. The method of claim 10, wherein prior to said inserting by the compiler the sequence of instructions, the method further comprises:

12. An apparatus for detecting a deviation path of a program run, applied to a processor to which a block identification register is newly added, the apparatus comprising:

a detection instruction execution module, configured to execute the decoded block identifier setting and detection instruction, so as to obtain a second block identifier of a second precursor program basic block that has been executed previously from the block identifier register, and determine a program running deviation path according to the first block identifier and the second block identifier, where if a block identifier that matches the second block identifier does not exist in the first block identifier, the program running deviation path is determined;

when the instruction execution module determines that the program runs along the deviated path according to the first block identifier and the second block identifier, the instruction execution module is specifically configured to:

comparing the right shift result with an arithmetic value of 0; when the comparison operation results are the same, determining the program operation deviation path;

wherein the block identification register is a newly added register in the register file and is allocated with a code different from a general register.

13. The apparatus of claim 12, wherein the detection instruction execution module further comprises:

14. The apparatus of claim 12, further comprising:

15. The apparatus according to any one of claims 12-14, further comprising:

16. An apparatus for detecting a deviation path of a program run, comprising:

the deviation determining module is used for determining a program running deviation path according to the first block identifier and the second block identifier, wherein if the first block identifier does not have a block identifier matched with the second block identifier, the program running deviation path is determined;

the deviation determining module, when determining the deviation path for program operation according to the first block identifier and the second block identifier, is specifically configured to:

17. The apparatus of claim 16, wherein when the register is a general purpose register, the apparatus further comprises:

18. The apparatus of claim 16, further comprising:

19. A readable storage medium, wherein instructions in the storage medium, when executed by a processor of an electronic device, enable the electronic device to perform a method of detecting a deviation path traveled by a program as claimed in any of method claims 1-11.