CN107479857A - Random number produces and post processing circuitry - Google Patents
Random number produces and post processing circuitry Download PDFInfo
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- CN107479857A CN107479857A CN201710574602.1A CN201710574602A CN107479857A CN 107479857 A CN107479857 A CN 107479857A CN 201710574602 A CN201710574602 A CN 201710574602A CN 107479857 A CN107479857 A CN 107479857A
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- random number
- processing circuitry
- generation circuit
- post processing
- hash algorithm
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/58—Random or pseudo-random number generators
- G06F7/588—Random number generators, i.e. based on natural stochastic processes
Abstract
The present invention relates to information security field, to propose a kind of true random number generation and its post processing circuitry implementation method so that the random sequence finally exported has the characteristics that uniformity is good, independence is high, improves the security of encryption technology.For this, the technical solution adopted by the present invention is that random number produces and post processing circuitry, and true random number generation circuit 1 realizes that random number exports using sampling method is vibrated, the random number of output passes through loop coding resume module, ensures that in random sequence 0 and 1 probability is close；True random number generation circuit 2 realizes that another way random number exports using metastable state method, with same loop coding resume module is also passed through as random number generation circuit 1, then two-way random number produces final true random number into Secure Hash Algorithm module after the resume module.Present invention is mainly applied to information security field occasion.
Description
Technical field
The present invention relates to information security field, produces true random number using the method for totally digital circuit, and random number is entered
Gone post processing, make its random number evenly, randomness it is more preferable.Concretely relate to new random number generation and post processing circuitry.
Background technology
Since the 1990s, information technology develops rapidly at an unprecedented rate, and information industry has led the 3rd
The secondary industrial revolution, it may be said that the every field of economic society all be unable to do without information technology.In recent years, a large amount of propagation of information with exchange
Fully change our mode of production and life.However, information also brings many safety problems while propagation.It is close
It is the core technology for solving information security issue that code, which is learned, and unique technology.In cryptography, almost all of cryptographic algorithm
It must be secret data for attacker that will use some with agreement, and these secret data (such as key) are necessary
It is random number.Therefore for system design have superperformance randomizer (Random Number Generator,
RNG) must consider first.
Divide from the source for producing data, random number can be divided into two kinds, first, the random sequence obtained with determination algorithm
Referred to as pseudo random number (Pseudo Random Number Generator, PRNG), its sequence length are limited and with predictable
Property；Second, the sequence extracted during physical accidental be referred to as true random number (True Random Number Generator,
TRNG), also known as physical random number, its randomness are good and unpredictable.Because true random number is excellent good, it extensively should
For information security field.
Hardware approach realizes that real random number generator depends on the random character of physical component, such as arc lamp, original
The ray decay of daughter nucleus, noise of resistance or diode etc..Real random number generator needs unlike pseudorandom number generator
Initial seed is set, caused random number derives from real random physical process, thus thoroughly eliminates pseudorandom
Several periodic problems, only real random number generator could provide real forever unduplicated random number sequence.At present, can
The real random number generator design method compatible with integrated circuit is roughly divided into following several classes：Amplifying circuit noise, chaotic maps
Metastable state in circuit, oscillator sample and utilization circuit etc..
Although based on true random number caused by physical accidental source in random aspect of performance than caused by pseudorandom number generator
Quality of random numbers is higher, but the randomness of its caused true random number sequence is not sufficiently stable, random number it is of low quality, it is impossible to
Meet application demand well, generally also stochastic source is post-processed, make the true random sequence of its outputting high quality.After locate
Reason can play two effects：First, eliminating the correlation between 0/1 deviation and adjacent bit, make output that there is preferably statistics spy
Property；Second, increase entropy entrained by each output bit by the mode such as compressing, converting.
Bibliography
1. Hu Tao, Guo Li, Huang Hao, a kind of new chaos random number generator implementation [J] application of electronic technology of is waited,
2006,32 (6):51-53.
2. design [D] the China Science ＆ Technology University of the beautiful high-speed, true random-number generators of Luo Chun, 2013.
3. insertion type robust real random number generator mechanism is with realizing the industry of technical research [D] Harbin on week virgin pieces
University, 2008.
4.Zhang X,Nie Y Q,Liang H,et al.FPGA implementation of Toeplitz
hashing extractor for real time post-processing of raw random numbers[C]//
Ieee-Npss Real Time Conference.IEEE,2016:1-5。
The content of the invention
For overcome the deficiencies in the prior art, the present invention is directed to propose a kind of true random number produces and its post processing circuitry is realized
Method so that the random sequence finally exported has the characteristics that uniformity is good, independence is high, improves the safety of encryption technology
Property.Therefore, the technical solution adopted by the present invention is, random number produces and post processing circuitry, and true random number generation circuit 1, which utilizes, to shake
Swing sampling method and realize that random number exports, the random number of output passes through loop coding resume module, ensures 0 and 1 in random sequence
Probability is close；True random number generation circuit 2 realizes that another way random number exports using metastable state method, and random number generation circuit
1 equally also passes through same loop coding resume module, and then two-way random number passes through the mould into Secure Hash Algorithm module
Final true random number is produced after block processing.
True random number generation circuit 1 realizes that ring oscillator is linked to be using odd number phase inverter using ring oscillator
One endless chain is formed, and the number of phase inverter is odd number, and with 2 × T × N periodic vibration, N is phase inverter in endless chain here
Number, T are the propagation delays of each phase inverter, produce high and low frequency signal respectively using above-mentioned ring oscillator, make low
For frequency signal as d type flip flop clock, high ordinary mail number is used as d type flip flop data input, and output is true random number.
True random number generation circuit 2 is based on metastable state principle, is realized using rest-set flip-flop, and R and S are two of rest-set flip-flop
Input, Q and QB are two complementary output ends of rest-set flip-flop.R, S end of rest-set flip-flop are all connected into clock signal Clk, work as Clk
When=0, the stable output of trigger is (Q, QB)=(1,1)；As Clk=1, exported after the experience resolution time it is stable (Q,
QB)=(1,0) or (0,1), further, when Clk rising edges arrive, trigger enters metastable state, defeated by making a decision the time
It is finally stable 0 or 1 to go out Q, output quantity Q has randomness.
By reducing the phase offset of clock signal, the process variations of inner member are minimized, output sequence can be realized
Randomness, random number expected from generation.
In loop coding module, random sequence step-by-step is input in d type flip flop chain, and post-processing module will according to growth equation
Data tap in d type flip flop chain on relevant position simultaneously carries out xor operation, obtains new random sequence after treatment.
Secure Hash Algorithm module is realized according to Secure Hash Algorithm, and specifically the data of different length are calculated by Hash
Two groups of treated random numbers of Certain function summary that method is converted into the output of regular length enter Secure Hash Algorithm module, and this two
Result is carried out XOR by group random number after Secure Hash Algorithm computing respectively, and XOR result is logical as the output of final random number
Crossing Secure Hash Algorithm processing can make random number have more preferable statistical property, improve the randomness of random number.
The features of the present invention and beneficial effect are：
The present invention utilizes totally digital circuit method, proposes a kind of true random number generation and its post processing circuitry implementation method,
So that the random sequence finally exported has the characteristics that uniformity is good, independence is high, the security of encryption technology is improved, logical
Letter, information security etc. have higher application value.
Using the present invention digital circuit can be relied on to produce the true random number that uniformity is good, independence is high, it is caused random
Number can be applied in information security field and cryptography, have very high application value.
Brief description of the drawings：
Fig. 1 integrated circuit schematic diagrams.
The schematic diagram of Fig. 2 true random numbers generation circuit 1.
The schematic diagram of Fig. 3 true random numbers generation circuit 2.
Fig. 4 loop coding module principle figures.
Embodiment
Circuit block diagram of the present invention is as shown in figure 1, true random number generation circuit 1 realizes random number using sampling method is vibrated
Output, the random number of output pass through loop coding resume module, ensure that in random sequence 0 and 1 probability is close.True random number
Generation circuit 2 realizes that another way random number exports using metastable state method, and same follow is also passed through as random number generation circuit 1
The processing of ring coding module.Then two-way random number enter Secure Hash Algorithm module produced after the resume module it is final true
Random number, there can be better quality by random number caused by circuit of the present invention, randomness, uniformity are more preferable.Below
Illustrate modules.
True random number generation circuit 1 realizes that ring oscillator is linked to be using odd number phase inverter using ring oscillator
One endless chain is formed.Because the number of phase inverter is odd number, circuit is not present the operating point of any stabilization, but with 2 × T ×
N periodic vibration, N is the number of phase inverter in endless chain here, and T is the propagation delay of each phase inverter.Using above-mentioned
Ring oscillator produces high and low frequency signal respectively, makes low frequency signal be triggered as d type flip flop clock, high ordinary mail number as D
Device data input, output are true random number, and principle is as shown in Figure 2.
True random number generation circuit 2 is based on metastable state principle, is realized using rest-set flip-flop, and R and S are two of rest-set flip-flop
Input, Q and QB are two complementary output ends of rest-set flip-flop, as shown in Figure 3.R, S end connection clock signal of rest-set flip-flop
Clk, as Clk=0, the stable output of trigger is (Q, QB)=(1,1)；As Clk=1, experience exports after the resolution time
Stabilization is in (Q, QB)=(1,0) or (0,1).More Accurate Points, when Clk rising edges arrive, trigger enters metastable state, by certainly
Disconnected time output Q is finally stable 0 or 1, and output quantity Q has randomness.By reducing the phase offset of clock signal, minimize
The process variations of inner member, it is ensured that the randomness of output sequence, produce the random number of better quality.
In the ideal case, although the signal that true random number generation circuit 1,2 is gathered has random statistical property,
It is that the circuit of chip internal is inevitably influenceed by outside environmental elements such as temperature, voltages, so as to cause oscillation rings
Biasing in random signal obtained by sample circuit be present, that is, occur continuous 0 or 1, influence the statistical property institutes of final result
To have to carry out depolarized processing to data after random signal is collected into, to ensure the 0 or 1 frequency phase occurred in random sequence
When being post-processed in the design using loop coding mode.This coding can pass through linear feedback shift register
(LFSR) realize, therefore be especially suitable for for carrying out correction process to signal in digital circuit.The realization of loop coding module
Mode random sequences step-by-step as shown in Figure 4 is input in d type flip flop chain, and post-processing module is according to growth equation by d type flip flop chain
Data tap on middle relevant position simultaneously carries out xor operation, obtains new random sequence after treatment.The sequence elimination
The deviation that may be present during random number generation, makes random performance more preferable.
Secure Hash Algorithm module realizes that Secure Hash Algorithm is that the data of different length are led to according to Secure Hash Algorithm
The Certain function summary that hash algorithm is converted into the output of regular length is crossed, relatively easily can be exported from input, and will be from defeated
Go out it is counter push away input it is highly difficult, the random number after the algorithm process has good statistical property.Two groups of warps according to Fig. 1
The random number for crossing processing enters Secure Hash Algorithm module, and this two groups of random numbers respectively will knot after Secure Hash Algorithm computing
Fruit carries out XOR, and XOR result exports to handle by Secure Hash Algorithm as final random number can be such that random number has more preferably
Statistical property, improve the randomness of random number.
Claims (6)
1. a kind of random number produces and post processing circuitry, it is characterized in that, true random number generation circuit 1 is realized using sampling method is vibrated
Random number exports, and the random number of output passes through loop coding resume module, ensures that in random sequence 0 and 1 probability is close；Very
Random number generation circuit 2 realizes that another way random number exports using metastable state method, is also passed through as random number generation circuit 1 same
The loop coding resume module of sample, then two-way random number produced most after the resume module into Secure Hash Algorithm module
Whole true random number.
2. random number as claimed in claim 1 produces and post processing circuitry, it is characterized in that, true random number generation circuit 1 utilizes
Ring oscillator realizes that ring oscillator is to be linked to be an endless chain using odd number phase inverter to form, and the number of phase inverter is
Odd number, with 2 × T × N periodic vibration, N is the number of phase inverter in endless chain here, and T is that the propagation of each phase inverter is prolonged
When, high and low frequency signal is produced respectively using above-mentioned ring oscillator, makes low frequency signal as d type flip flop clock, high ordinary mail
Number be used as d type flip flop data input, output be true random number.
3. random number as claimed in claim 1 produces and post processing circuitry, it is characterized in that, true random number generation circuit 2 is based on
Metastable state principle, is realized using rest-set flip-flop, R and two inputs that S is rest-set flip-flop, and Q and QB are that rest-set flip-flop two is mutual
Mend output end.R, S end of rest-set flip-flop are all connected into clock signal Clk, as Clk=0, the stable output of trigger for (Q,
QB)=(1,1)；As Clk=1, exported after the experience resolution time it is stable in (Q, QB)=(1,0) or (0,1), further,
When Clk rising edges arrive, trigger enters metastable state, by finally stable 0 or 1, output quantity Q tools of making a decision time output Q
There is randomness.
4. random number as claimed in claim 3 produces and post processing circuitry, it is characterized in that, by the phase for reducing clock signal
Skew, the process variations of inner member are minimized, realize the randomness of output sequence, random number expected from generation.
5. random number as claimed in claim 1 produces and post processing circuitry, it is characterized in that, in loop coding module, stochastic ordering
Row step-by-step is input in d type flip flop chain, and post-processing module takes out the data in d type flip flop chain on relevant position according to growth equation
Head simultaneously carries out xor operation, obtains new random sequence after treatment.
6. random number as claimed in claim 1 produces and post processing circuitry, it is characterized in that, Secure Hash Algorithm module is according to peace
Full hash algorithm realizes, specifically the data of different length is converted into by hash algorithm a kind of letter of the output of regular length
Several two groups of treated random numbers enter Secure Hash Algorithm module, and this two groups of random numbers are transported by Secure Hash Algorithm respectively
Result is subjected to XOR after calculation, XOR result exports to handle by Secure Hash Algorithm as final random number can make random number
With more preferable statistical property, the randomness of random number is improved.
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Cited By (3)
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| CN110336536A (en) * | 2019-07-29 | 2019-10-15 | 深圳大学 | The circuit and equipment of real random number generator |
| CN111124363A (en) * | 2019-12-28 | 2020-05-08 | 武汉瑞纳捷电子技术有限公司 | True random number generation method and true random number generator |
| CN113517888A (en) * | 2021-04-21 | 2021-10-19 | 中科亿海微电子科技（苏州）有限公司 | Circuit device and method for synthesizing arbitrary waveform with optimized spectral purity |
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| CN103455306A (en) * | 2013-09-12 | 2013-12-18 | 西南交通大学 | Double-line parallel high-speed random number generating device based on semiconductor ring laser |
| CN105354008A (en) * | 2015-12-14 | 2016-02-24 | 武汉芯昌科技有限公司 | Output circuit and output method of random number generator |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110336536A (en) * | 2019-07-29 | 2019-10-15 | 深圳大学 | The circuit and equipment of real random number generator |
| CN110336536B (en) * | 2019-07-29 | 2023-07-07 | 深圳大学 | Circuit and device for true random number generator |
| CN111124363A (en) * | 2019-12-28 | 2020-05-08 | 武汉瑞纳捷电子技术有限公司 | True random number generation method and true random number generator |
| CN113517888A (en) * | 2021-04-21 | 2021-10-19 | 中科亿海微电子科技（苏州）有限公司 | Circuit device and method for synthesizing arbitrary waveform with optimized spectral purity |
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Application publication date: 20171215 |