CN106557441A - A kind of low-speed interface interruption processing method and system based on interrupt control unit - Google Patents
A kind of low-speed interface interruption processing method and system based on interrupt control unit Download PDFInfo
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- CN106557441A CN106557441A CN201510629995.2A CN201510629995A CN106557441A CN 106557441 A CN106557441 A CN 106557441A CN 201510629995 A CN201510629995 A CN 201510629995A CN 106557441 A CN106557441 A CN 106557441A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/24—Interrupt
- G06F2213/2408—Reducing the frequency of interrupts generated from peripheral to a CPU
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Abstract
The present invention discloses a kind of low-speed interface interruption processing method based on interrupt control unit and system, and the method includes：First routine always interrupts transmission first interrupt signal to peripheral hardware when receiving the interruption service signal of operation task of CPLD transmissions and interrupting the type of service signal；First routine is after by peripheral hardware total impeding shutdown, service signal will be interrupted to send to the second routine corresponding with the type for interrupting service signal, so that the second routine is interrupted to interrupting the corresponding operation task of service signal according to the interruption service signal, and after the interruption, always interrupt the first open signal of transmission so that peripheral hardware always interrupts unlatching to peripheral hardware.Originally process in the first routine is interrupted and is closed peripheral interrupt and processed by the second routine by said method, avoid due to being low-speed device in external interrupt equipment, when not also being disposed to interruption, always interruption has turned on its peripheral hardware, is caused equipment that the problem of deadlock occurs by high-frequency down trigger.
Description
Technical field
The present invention relates to embedded system technology field, and in particular to a kind of based on interruption control
The low-speed interface interruption processing method of device and system.
Background technology
Interrupt, refer to when occurring needing, central processing unit (Central Processing Unit,
Abbreviation CPU) temporarily cease current program performing transfer perform process new situation program and
Implementation procedure.I.e. in program operation process, in system, occur in that one must be stood by CPU
Situation about processing, now, the execution of the temporary transient terminators of CPU transfers to process this new feelings
The process of condition.Interruption is broadly divided into, external interrupt and internal interrupt, most of CPU now
A programmable interrupt control unit is integrated with all, the depositor group energy that the control unit is provided
Control various types of interrupt sources.The major responsibility of controller is responsible for receiving and management interrupt
The hardware interrupts (include internal interrupt and external interrupt) that source produces, and timely respond to interrupt please
Ask and interrupt processing process, it can by certain prioritization with delivering specific interruption
To CPU core, interruption service is responded by CPU core.For example, interrupt control unit energy
The various types of control units with CPU mountings are distinguished and manage, such as Double Data Rate is synchronously dynamic
State random access memory (Double Data Rate, abbreviation DDR), local bus Local Bus,
Interconnecting bus devices for peripheral equipment (Peripheral Component Interconnect, abbreviation PCI),
DMA, universal asynchronous receiving-transmitting transmitter (Universal Asynchronous
Receiver/Transmitter, abbreviation UART), USB (universal serial bus) (Universal Serial
Bus, abbreviation USB), real-time clock (Real-Time Clock, abbreviation RTC), guard the gate
Canis familiaris L. Watchdog, IC bus (Inter-Integrated Circuit, abbreviation IIC), string
Row Peripheral Interface (Serial Peripheral Interface, abbreviation SPI), universal input/output
(General Purpose Input Output, abbreviation GPIO), interrupt requests (Interrupt
Request, abbreviation IRQ) etc..
Here does not enumerate all control units of the integrated interrupt control units of CPU, only enumerates which
In control unit IRQ, CPLD (Complex
Programmable Logic Device, abbreviation CPLD) belong to outside one of them of CPU
If module, in the design of PowerPC, CPLD is articulated in the Local of Power PC Processor
In Bus buses, peripheral access speed, and then interrupt ISR response speeds be exceedingly fast.Its
Interrupt processing flow process is：As shown in figure 1, processing in function in ISR, peripheral hardware is first closed total
Interrupt, then mounting processes hook, and then open peripheral hardware and always interrupt.And in ARM etc.
Design, peripheral hardware CPLD is articulated on GPIO, and local bus are simulated by GPIO
Bus so that CPLD becomes poling slow devices, when there is external interrupt, visits in ISR
Just it is easy to be interrupted during slow interface CPLD asked altofrequency triggering lethal, causes equipment
Generation is crashed.
The content of the invention
The invention provides a kind of low-speed interface interruption processing method based on interrupt control unit and
System, solves when external interrupt equipment is low-speed device, by high-frequency down trigger
The problem for causing equipment to occur to crash.
In a first aspect, the present invention proposes a kind of low-speed interface interrupt processing based on interrupt control unit
Method, including：
Interruption service of first routine in the operation task for receiving interrupt control unit CPLD transmissions
During the type of signal and the interruption service signal, always interrupt transmission first to peripheral hardware and interrupt letter
Number so that the total impeding shutdown of the peripheral hardware；
First routine after by the peripheral hardware total impeding shutdown, by the interruption service signal
Send to the second routine corresponding with the type for interrupting service signal, so that the second case
Journey is carried out to the corresponding operation task of the interruption service signal according to the interruption service signal
Interrupt, and after the interruption, always interrupt the first open signal of transmission so that the peripheral hardware is total to peripheral hardware
Interrupt and open.
Optionally, first routine by it is described interruption service signal send to the second routine it
Before, methods described also includes：
Hook Function on the interrupt line of the first routine call peripheral hardware interconnection PCI, leads to
Cross the interrupt line that the type for interrupting service signal is registered to the Hook Function PCI
On, the interruption service signal is sent to the second routine by the interrupt line of the PCI.
Second aspect, present invention also offers a kind of low-speed interface based on interrupt control unit interrupts
Processing method, including：
Second routine receives the interruption service signal that the first routine sends, to second routine
Interrupt the second interrupt signal is sent so that the impeding shutdown of second routine；
Second routine interrupts service to described after by the impeding shutdown of second routine
The corresponding operation task of signal sends the interruption service signal；
The interruption service signal corresponding operation task is being interrupted by second routine
Afterwards, the second open signal is sent to the interruption of second routine, and always interrupt transmission to peripheral hardware
First open signal is so that the peripheral hardware always interrupts unlatching.
The third aspect, present invention also offers a kind of low-speed interface based on interrupt control unit interrupts
Processing meanss, including：
First sending module, in the operation task for receiving interrupt control unit CPLD transmissions
Interrupt service signal and the interruption service signal type when, always interrupt transmission to peripheral hardware
First interrupt signal is so that the total impeding shutdown of the peripheral hardware；
Second sending module, for, after by the peripheral hardware total impeding shutdown, described interruption being taken
Business signal is sent to the second routine corresponding with the type for interrupting service signal, so that described
Second routine is appointed to the corresponding operation of the interruption service signal according to the interruption service signal
Business is interrupted, and after the interruption, always interrupts the first open signal of transmission so that described to peripheral hardware
Peripheral hardware always interrupts unlatching.
Optionally, described device also includes：
Calling module, for calling the Hook Function on the interrupt line of peripheral hardware interconnection PCI；
Second sending module, for by the Hook Function by the interruption service signal
Type be registered on the interrupt line of the PCI, by the interrupt line of the PCI by the interruption
Service signal is sent to the second routine.
Fourth aspect, present invention also offers a kind of low-speed interface based on interrupt control unit interrupts
Processing meanss, including：
Receiver module, for receiving the interruption service signal that the first routine sends；
3rd sending module, for second routine interruption send the second interrupt signal with
Make the impeding shutdown of second routine；
4th sending module, for after by the impeding shutdown of second routine, in described
The corresponding operation task of disconnected service signal sends the interruption service signal；
5th sending module, for the interruption service signal corresponding operation task is being carried out
In have no progeny, to second routine interruption send the second open signal；
6th sending module, for interruption from the 5th sending module to second routine
After sending the second open signal, always interrupt the first open signal of transmission to peripheral hardware so that described outer
If total interruption is opened.
In terms of 5th, present invention also offers a kind of low-speed interface based on interrupt control unit interrupts
Processing system, including：Low-speed interface interrupt processing of above-mentioned first based on interrupt control unit is filled
Put, the above-mentioned second low-speed interface interrupt processing device based on interrupt control unit, and interrupt control
At device CPLD processed, the CPLD and the described first low-speed interface interruption based on interrupt control unit
Reason device is connected, the described first low-speed interface interrupt processing device based on interrupt control unit and institute
State the second low-speed interface interrupt processing device based on interrupt control unit to be connected；
The CPLD, for receiving the interruption service signal of the operation task of external equipment triggering,
The type for interrupting service signal is obtained according to the service signal that interrupts, the operation is appointed
The type of the interruption service signal and the interruption service signal of business is sent to first in being based on
The low-speed interface interrupt processing device of disconnected controller.
Optionally, the CPLD, is additionally operable to deposit the type for interrupting service signal
Storage.
Optionally, the CPLD, is additionally operable to converge the interruption service signal for receiving
It is poly-, and interruption is based on to described first according to the time sequencing of the interruption service signal for receiving
The low-speed interface interrupt processing device of controller sends the interruption service signal.
Optionally, the described second low-speed interface interrupt processing device based on interrupt control unit is many
It is individual.
The invention provides a kind of low-speed interface interruption processing method based on interrupt control unit and
System, receives the terminal of the operation task of interrupt control unit CPLD transmissions in the first routine
During the type of service signal and terminal service signal, first by peripheral hardware total impeding shutdown, so
Afterwards by terminal service signal is sent the second course, and by place originally in the first routine
Reason is interrupted and is closed peripheral interrupt and processed by the second routine, it is to avoid due to outside
It is low-speed device that equipment is interrupted in portion, when not also being disposed to interruption, during its peripheral hardware is total
It is disconnected to have turned on, caused equipment that the problem of deadlock occurs by high-frequency down trigger.
Description of the drawings
Fig. 1 is the schematic flow sheet of interruption processing method of the prior art；
Fig. 2 interrupts for the low-speed interface based on interrupt control unit that one embodiment of the invention is provided
The schematic flow sheet of processing method；
In the low-speed interface based on interrupt control unit that Fig. 3 is provided for another embodiment of the present invention
The schematic flow sheet of disconnected processing method；
In the low-speed interface based on interrupt control unit that Fig. 4 is provided for another embodiment of the present invention
The schematic flow sheet of disconnected processing method；
Fig. 5 interrupts for the low-speed interface based on interrupt control unit that one embodiment of the invention is provided
The structural representation of processing meanss；
In the low-speed interface based on interrupt control unit that Fig. 6 is provided for another embodiment of the present invention
The structural representation of disconnected processing meanss；
Fig. 7 interrupts for the low-speed interface based on interrupt control unit that one embodiment of the invention is provided
The structural representation of processing system.
Specific embodiment
To make purpose, technical scheme and the advantage of the embodiment of the present invention clearer, below will
With reference to the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clearly
Chu's ground description, it is clear that described embodiment is a part of embodiment of the invention, rather than
Whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art are not having
There is the every other embodiment obtained under the premise of making creative work, belong to the present invention
The scope of protection.
The application scenarios of the present invention are in the case where being limited by cpu resource, when some uses
The equipment of interrupt mechanism, when being located on low-speed interface outward, if it is desired to using interrupting, needing to adopt
Use interruption processing method proposed by the present invention, the condition that the method is limited is：1. external interrupt is believed
Breath is not that altofrequency occurs；2. external interrupt information is not particular importance, even if losing,
Also affect little；3. this realization will not produce impact to the external interrupt of other high speeds.This
It doesn't matter with CPU processing speeds itself for the interruption processing method of bright proposition, specifically with CPU
On the piece of manufacturer the characteristics of rich hardware resource and board design make full use of for design mesh
's.In this way, not only design on can make full use of CPU limited resources, and
And the execution efficiency of CPU in program performing, is also improved, instead of the CPU of conventional inefficiencies
By way of task poll processes event, in normal course of operation, idle CPU is made
Other things can fully be processed, it is not necessary to carried out spent by the scanning of task poll in real time
Time.
The process of interrupt processing is described in detail below by specific embodiment.Need
Illustrate, the first routine for mentioning in the present embodiment, the second routine can be understood as CPU
The specific application program for interrupting is processed, wherein the first routine is received interrupt, and according to interruption
Type be issued to and corresponding second routine of type interrupted, the second routine receives interruption
When, which is processed.Specifically include following steps：
Fig. 2 shows that a kind of low speed based on interrupt control unit that one embodiment of the invention is provided connects
The schematic flow sheet of mouth interruption processing method, as shown in Fig. 2 the method is comprised the following steps：
201st, interruption of first routine in the operation task for receiving interrupt control unit CPLD transmissions
During the type of service signal and the interruption service signal, always interrupt in transmission first to peripheral hardware
Break signal is so that the total impeding shutdown of the peripheral hardware；
202nd, described interruption is taken after by the peripheral hardware total impeding shutdown by first routine
Business signal is sent to the second routine corresponding with the type for interrupting service signal, so that described
Second routine is appointed to the corresponding operation of the interruption service signal according to the interruption service signal
Business is interrupted, and after the interruption, always interrupts the first open signal of transmission so that described to peripheral hardware
Peripheral hardware always interrupts unlatching.
In above-mentioned steps 202, first routine by it is described interruption service signal send to
Before second routine, the step of methods described is also including not shown in Fig. 2：
Hook Function on the interrupt line of the first routine call peripheral hardware interconnection PCI, leads to
Cross the interrupt line that the type for interrupting service signal is registered to the Hook Function PCI
On, the interruption service signal is sent to the second routine by the interrupt line of the PCI.
Fig. 3 shows a kind of low speed based on interrupt control unit that another embodiment of the present invention is provided
The schematic flow sheet of interface interrupt processing method, as shown in figure 3, the method is comprised the following steps：
301st, the second routine receives the interruption service signal that the first routine sends, to described second
The interruption of routine sends the second interrupt signal so that the impeding shutdown of second routine；
302nd, second routine is after by the impeding shutdown of second routine, in described
The corresponding operation task of disconnected service signal sends the interruption service signal；
303rd, the interruption service signal corresponding operation task is being carried out by second routine
In have no progeny, send the second open signal to the interruption of second routine, and always interrupt to peripheral hardware
The first open signal is sent so that the peripheral hardware always interrupts unlatching.
As shown in figure 1, in prior art, during interrupt processing process is all responded in ISR
Disconnected service, the present invention is adjusted to the interruption ISR of BSP, in the BSP of the first routine
In disconnected initialization function, interrupt in the interrupt vector of RTOS in connection BSP, employing
It is that PCI interrupts connecting interface function, ISR is processed in function, first sets total interruption outside the Pass, then
Mounting ISR processes Hook Function, removes and originally open peripheral hardware immediately in this interface and always interrupt
Action, the action is put in the second routine of the concrete service for interrupting subtype and is located
Reason.Handling process in second routine of the concrete service for interrupting subtype：First by subtype
Interruption is closed, and is interrupted service function and is processed, and is removed subtype and is interrupted, opens in subtype
It is disconnected, then over set total interruption.
The non-timely process part interrupted is distributed in task and is processed, in being conducive to distinguishing
Disconnected timely respond to part and the non-part that timely responds to separately is processed, i.e. only process in ISR
In time part release interrupt signal, is conducive to the limited buffer on PCI interrupt lines can be quick
The addition and process of ground response chained list, waits for interrupt trigger signal in interrupting subtask, closes immediately
Subtype interruption is closed, is continued with and time is timely responded to part, peripheral hardware is always interrupted and is slowed down,
To avoid the limited resources on PCI interrupt lines from being destroyed by the interruption of subsequent triggers.
Below the detailed process that above-mentioned first routine and the second Routine mechanism interrupt is carried out in detail
Illustrate, as shown in figure 4, specifically including following steps：
401st, during system start-up, in the BSP initialization procedures of software according to compiling option come
Then processor, such as arm processor, and the installation interrupted are selected, by CPLD's
Interrupt signal is mapped in the interrupt vector of CPU.
After interrupting installation standard and be complete, the interrupt service routine ISR in ISR CPLD
Waiting for the arrival of interruption, it is not necessary to take the execution time of CPU, now CPU can be with
Continue with the operation of other tasks.
402nd, external equipment triggering is interrupted, when the subcard of external equipment such as switch is plugged
When, slot equipment can send an interrupt request singal to CPLD.
403rd, CPLD records interrupt type, now I/Os of the CPLD according to pin specific distribution
The concrete equipment of resource connection, identifies the external equipment that request is interrupted, and will occur what is interrupted
Subtype is recorded in depositor.
404th, CPLD receive interrupt, when CPLD receiving records to subtype equipment generation
In have no progeny, by FIFO algorithms converge interrupt, and by arrive first first sequential algorithm to CPU
Connected interrupt pin sends interrupt signal.
405th, interrupt ISR process, when the first routine in CPU receives CPLD transmissions
After the interrupt signal for coming over, ISR makes an immediate response interruption, first by peripheral hardware total impeding shutdown,
To close IRQ interrupt signals, the arrival of CPLD next signals is shielded.
406th, hook is processed, and calls the Hook Function on PCI interrupt lines, is occurred interrupting
Type is registered on PCI interrupt lines.
407th, PCI interrupt lines automatically process the task corresponding second that function is run in system
Routine sends interrupt signal.
408th, the subtype task in the second routine receives interrupt signal.
409th, after group type tasks receive interrupt signal, subtype is closed immediately and is interrupted,
Received with informing that CPLD this subtype is interrupted, will have been processed.
410th, service disruption is processed, responds the subtype interruption service work(that CPLD sends
Energy.
411st, subtype interruption is opened, when CPU has been responded in the subtype that CPLD sends
During disconnected service function, subtype interruption can be opened immediately, to inform CPLD equipment
The interruption sent has been processed and has been completed, and can continue to next interruption.
412nd, open peripheral hardware always to interrupt, the total interruption is wanted for the response that CPLD is connected with CPU
Seek external interrupt not in time.
It should be noted that above-mentioned steps 401-405 can be understood as interrupt control unit execution
, step 405-408 can be understood as what the first routine in CPU was performed, step 409-412
The execution of the second routine is can be understood as, due to interrupt type difference, therefore according to interrupt type
Different second routines include multiple, correspond with interrupt type, for processing corresponding class
The interruption of type, certainly due to not including in the first routine that opening peripheral hardware always interrupts, therefore per one the
The step of including in two routines that opening peripheral hardware always interrupts.
Said method receives the operation task of interrupt control unit CPLD transmissions in the first routine
Terminal service signal and terminal service signal type when, peripheral hardware is always interrupted pass first
Close, then by terminal service signal is sent the second course, and will originally in the first routine
Process interrupt and close peripheral interrupt and processed by the second routine, it is to avoid due to
External interrupt equipment is low-speed device, when not also being disposed to interruption, during its peripheral hardware is total
It is disconnected to have turned on, caused equipment that the problem of deadlock occurs by high-frequency down trigger.
Fig. 5 shows the first structure based on the low-speed interface interrupt processing device of interrupt control unit
Schematic diagram, as shown in figure 5, including：
First sending module 51, for appointing in the operation for receiving interrupt control unit CPLD transmissions
During the type of the interruption service signal and the interruption service signal of business, always interrupt to peripheral hardware and send out
The first interrupt signal is sent so that the total impeding shutdown of the peripheral hardware；
Second sending module 52, for after by the peripheral hardware total impeding shutdown, by the interruption
Service signal is sent to the second routine corresponding with the type for interrupting service signal, so that institute
The second routine is stated according to the interruption service signal to the corresponding operation of the interruption service signal
Task is interrupted, and after the interruption, always interrupts the first open signal of transmission so that institute to peripheral hardware
State peripheral hardware and always interrupt unlatching.
Described device is also including not shown in Fig. 5：
Calling module 53, for calling the Hook Function on the interrupt line of peripheral hardware interconnection PCI；
Second sending module 52, for interrupting service letter by described by the Hook Function
Number type be registered on the interrupt line of the PCI, will be described by the interrupt line of the PCI in
Disconnected service signal is sent to the second routine.
Fig. 6 shows the provided in an embodiment of the present invention second low-speed interface based on interrupt control unit
The structural representation of interrupt processing device, as shown in fig. 6, including：
Receiver module 61, for receiving the interruption service signal that the first routine sends；
3rd sending module 62, sends the second interrupt signal for the interruption to second routine
So that the impeding shutdown of second routine；
4th sending module 63, for after by the impeding shutdown of second routine, to described
Interrupt the corresponding operation task of service signal and send the interruption service signal；
5th sending module 64, for the interruption service signal corresponding operation task is being entered
Have no progeny in row, the second open signal is sent to the interruption of second routine；
6th sending module 65, in the 5th sending module in second routine
After the second open signal of disconnected transmission, always interrupt the first open signal of transmission so that described to peripheral hardware
Peripheral hardware always interrupts unlatching.
It should be noted that the above-mentioned first low-speed interface interrupt processing based on interrupt control unit is filled
It is one-to-one to put with the method in above-mentioned Fig. 2, and above-mentioned second based on the low of interrupt control unit
Fast interface interrupt processing meanss are one-to-one with the method in above-mentioned Fig. 3, and the present embodiment is not
Again the above-mentioned first low-speed interface interrupt processing device based on interrupt control unit and second are based on
The specific implementation details of the low-speed interface interrupt processing device of interrupt control unit are described in detail.
Fig. 7 shows a kind of low-speed interface based on interrupt control unit provided in an embodiment of the present invention
The structural representation of interrupt processing system, as shown in fig. 7, comprises：Described above first is based on
The low-speed interface interrupt processing device (the first processing meanss 71) of interrupt control unit, above-mentioned
The two low-speed interface interrupt processing devices (second processing device 72) based on interrupt control unit, and
Interrupt control unit CPLD73, the CPLD are connect based on the low speed of interrupt control unit with described first
Mouth interrupt processing device is connected, the described first low-speed interface interrupt processing based on interrupt control unit
Device is connected based on the low-speed interface interrupt processing device of interrupt control unit with described second；
CPLD is connected with external equipment 74.
The CPLD73, for receiving the interruption service of the operation task of the triggering of external equipment 74
Signal, obtains the type for interrupting service signal according to the service signal that interrupts, will be described
The type of the interruption service signal and the interruption service signal of operation task is sent to first
Low-speed interface interrupt processing device 71 based on interrupt control unit.
One of the present embodiment preferred embodiment in, the CPLD73, it is right to be additionally operable to
The type for interrupting service signal is stored.
One of the present embodiment preferred embodiment in, the CPLD73, it is right to be additionally operable to
The interruption service signal for receiving is converged, and according to the interruption service signal for receiving
Time sequencing to the described first low-speed interface interrupt processing device based on interrupt control unit send out
Send the interruption service signal.
One of the present embodiment preferred embodiment in, described second based on interrupting control
The low-speed interface interrupt processing device of device is multiple.
The first routine and multiple second routines in said system is not only designed can be fully sharp
With the execution efficiency that CPU is also improved on the limited resources and program performing of CPU, replace
The CPU of generation conventional inefficiencies is normally being run by way of task poll processes event
During, allow idle CPU fully to process other things, it is not necessary to carry out in real time
The task poll scanning spent time.
Although additionally, it will be appreciated by those of skill in the art that some enforcements described herein
Example includes some included features rather than further feature in other embodiments, but different
The combination of the feature of embodiment means to be within the scope of the present invention and formed different
Embodiment.
Although being described in conjunction with the accompanying embodiments of the present invention, those skilled in the art
Various modifications and variations are made without departing from the spirit and scope of the present invention can,
Within the scope of such modification and modification each fall within and are defined by the appended claims.
Claims (10)
1. a kind of low-speed interface interruption processing method based on interrupt control unit, it is characterised in that
Including：
Interruption service of first routine in the operation task for receiving interrupt control unit CPLD transmissions
During the type of signal and the interruption service signal, always interrupt transmission first to peripheral hardware and interrupt letter
Number so that the total impeding shutdown of the peripheral hardware；
First routine after by the peripheral hardware total impeding shutdown, by the interruption service signal
Send to the second routine corresponding with the type for interrupting service signal, so that the second case
Journey is carried out to the corresponding operation task of the interruption service signal according to the interruption service signal
Interrupt, and after the interruption, always interrupt the first open signal of transmission so that the peripheral hardware is total to peripheral hardware
Interrupt and open.
2. method according to claim 1, it is characterised in that first routine will be will
The interruption service signal is sent to before the second routine, and methods described also includes：
Hook Function on the interrupt line of the first routine call peripheral hardware interconnection PCI, leads to
Cross the interrupt line that the type for interrupting service signal is registered to the Hook Function PCI
On, the interruption service signal is sent to the second routine by the interrupt line of the PCI.
3. a kind of low-speed interface interruption processing method based on interrupt control unit, it is characterised in that
Including：
Second routine receives the interruption service signal that the first routine sends, to second routine
Interrupt the second interrupt signal is sent so that the impeding shutdown of second routine；
Second routine interrupts service to described after by the impeding shutdown of second routine
The corresponding operation task of signal sends the interruption service signal；
The interruption service signal corresponding operation task is being interrupted by second routine
Afterwards, the second open signal is sent to the interruption of second routine, and always interrupt transmission to peripheral hardware
First open signal is so that the peripheral hardware always interrupts unlatching.
4. a kind of low-speed interface interrupt processing device based on interrupt control unit, it is characterised in that
Including：
First sending module, in the operation task for receiving interrupt control unit CPLD transmissions
Interrupt service signal and the interruption service signal type when, always interrupt transmission to peripheral hardware
First interrupt signal is so that the total impeding shutdown of the peripheral hardware；
Second sending module, for, after by the peripheral hardware total impeding shutdown, described interruption being taken
Business signal is sent to the second routine corresponding with the type for interrupting service signal, so that described
Second routine is appointed to the corresponding operation of the interruption service signal according to the interruption service signal
Business is interrupted, and after the interruption, always interrupts the first open signal of transmission so that described to peripheral hardware
Peripheral hardware always interrupts unlatching.
5. device according to claim 4, it is characterised in that described device also includes：
Calling module, for calling the Hook Function on the interrupt line of peripheral hardware interconnection PCI；
Second sending module, for by the Hook Function by the interruption service signal
Type be registered on the interrupt line of the PCI, by the interrupt line of the PCI by the interruption
Service signal is sent to the second routine.
6. a kind of low-speed interface interrupt processing device based on interrupt control unit, it is characterised in that
Including：
Receiver module, for receiving the interruption service signal that the first routine sends；
3rd sending module, for second routine interruption send the second interrupt signal with
Make the impeding shutdown of second routine；
4th sending module, for after by the impeding shutdown of second routine, in described
The corresponding operation task of disconnected service signal sends the interruption service signal；
5th sending module, for the interruption service signal corresponding operation task is being carried out
In have no progeny, to second routine interruption send the second open signal；
6th sending module, for interruption from the 5th sending module to second routine
After sending the second open signal, always interrupt the first open signal of transmission to peripheral hardware so that described outer
If total interruption is opened.
7. a kind of low-speed interface interrupt processing system based on interrupt control unit, it is characterised in that
Including：As described in claim 4 or 5 first based on the low-speed interface interruption of interrupt control unit at
Reason device, as claimed in claim 6 second based on the low-speed interface interruption of interrupt control unit at
Device is managed, and interrupt control unit CPLD, the CPLD are based on interrupt control unit with described first
Low-speed interface interrupt processing device be connected, the described first low-speed interface based on interrupt control unit
Interrupt processing device and the described second low-speed interface interrupt processing device based on interrupt control unit
It is connected；
The CPLD, for receiving the interruption service signal of the operation task of external equipment triggering,
The type for interrupting service signal is obtained according to the service signal that interrupts, the operation is appointed
The type of the interruption service signal and the interruption service signal of business is sent to first in being based on
The low-speed interface interrupt processing device of disconnected controller.
8. system according to claim 7, it is characterised in that the CPLD, also uses
Store in the type to the interruption service signal.
9. system according to claim 7, it is characterised in that the CPLD, also uses
Converge in the interruption service signal to receiving, and according to the interruption service for receiving
The time sequencing of signal is filled to the described first low-speed interface interrupt processing based on interrupt control unit
Put the transmission interruption service signal.
10. system according to claim 7, it is characterised in that during described second is based on
The low-speed interface interrupt processing device of disconnected controller is multiple.
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| CN106557441B (en) | 2019-03-19 |
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