CN106250235A - Multi-task scheduling methods based on many core chip and system - Google Patents

Multi-task scheduling methods based on many core chip and system Download PDF

Info

Publication number
CN106250235A
CN106250235A CN201610594824.5A CN201610594824A CN106250235A CN 106250235 A CN106250235 A CN 106250235A CN 201610594824 A CN201610594824 A CN 201610594824A CN 106250235 A CN106250235 A CN 106250235A
Authority
CN
China
Prior art keywords
task
new task
core
new
peak power
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201610594824.5A
Other languages
Chinese (zh)
Inventor
张升泽
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to CN201610594824.5A priority Critical patent/CN106250235A/en
Publication of CN106250235A publication Critical patent/CN106250235A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5061Partitioning or combining of resources
    • G06F9/5066Algorithms for mapping a plurality of inter-dependent sub-tasks onto a plurality of physical CPUs
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/48Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806Task transfer initiation or dispatching
    • G06F9/4843Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mobile Radio Communication Systems (AREA)

Abstract

The invention provides a kind of multi-task scheduling method based on many core chip, described method comprises the steps: to obtain peak power and the current task number of each core in multinuclear;According to this peak power and current task number determine if can be new task;If receiving new task, then by new task uniform distribution to the core being able to receive that new task.The technical scheme that the present invention provides has task and distributes rational advantage.

Description

Multi-task scheduling methods based on many core chip and system
Technical field
The present invention relates to electronic chip field, particularly relate to a kind of multi-task scheduling method based on many core chip and be System.
Background technology
Chip also has the place of its uniqueness, broadly, as long as use the semiconductor chip that microfabrication means manufacture Son, can be called chip, and might not there be circuit the inside.Such as semiconductor light source chips;Such as machinery chip, such as MEMS top Spiral shell instrument;Or biochip such as DNA chip.In communication with information technology, when scope is confined to silicon integrated circuit, chip It is exactly on " circuit on silicon wafer " with the common factor of integrated circuit.Chipset, then be a series of chip portfolios that are mutually related, They interdepend, and combine and can play the processor inside bigger effect, such as computer and south north bridge chipset, Radio frequency, base band and power management chip group inside mobile phone.
The existing chip unreasonable distribution to task, causes multinuclear work inequality.
Summary of the invention
A kind of multi-task scheduling method based on many core chip is provided, which solves prior art task unreasonable distribution Shortcoming.
On the one hand, it is provided that a kind of multi-task scheduling methods based on many core chip, described method comprises the steps:
Obtain peak power and the current task number of each core in multinuclear;
According to this peak power and current task number determine if can be new task;
If receiving new task, then by new task uniform distribution to the core being able to receive that new task.
Optionally, described method also includes:
All can not receive new task such as all kernels, then stop the new task outside receiving.
Optionally, described method also includes:
The operating frequency of each core is adjusted according to this task quantity.
Second aspect, it is provided that a kind of multiple tasks dispatching systems based on many core chip, described system includes:
Acquiring unit, for obtaining peak power and the current task number of each core in multinuclear;
Judging unit, for according to this peak power and current task number determine if can be new task;
Allocation unit, for if receiving new task, then by new task uniform distribution to being able to receive that new appointing The core of business.
Optionally, described system also includes:
Stop element, all can not receive new task for such as all kernels, then stop the new task outside receiving.
Optionally, described system also includes:
Adjustment unit, for adjusting the operating frequency of each core according to this task quantity.
The technical scheme that the specific embodiment of the invention provides obtains the peak power of each core in multinuclear and as predecessor Business number, according to this peak power and current task number determine if can be new task, if receiving new appointing Business, then by new task uniform distribution to being able to receive that the core of new task, so it has task distributes rational advantage.
Accompanying drawing explanation
In order to be illustrated more clearly that the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing In having technology to describe, the required accompanying drawing used is briefly described, it should be apparent that, the accompanying drawing in describing below is only this Some embodiments of invention, for those of ordinary skill in the art, on the premise of not paying creative work, it is also possible to Other accompanying drawing is obtained according to these accompanying drawings.
The flow chart of a kind of based on many core chip the multi-task scheduling methods that Fig. 1 provides for the present invention;
The structure chart of a kind of based on many core chip the multiple tasks dispatching systems that Fig. 2 provides for the present invention.
Detailed description of the invention
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete Describe, it is clear that described embodiment is only a part of embodiment of the present invention rather than whole embodiments wholely.Based on Embodiment in the present invention, it is every other that those of ordinary skill in the art are obtained under not making creative work premise Embodiment, broadly falls into the scope of protection of the invention.
A kind of based on many core chip the multitasks provided for the present invention the first better embodiment refering to Fig. 1, Fig. 1 are adjusted The flow chart of degree method, the method is completed by electronic chip, and the method is as it is shown in figure 1, comprise the steps:
Step S101, the peak power obtaining each core in multinuclear and current task number;
Step S102, according to this peak power and current task number determine if can be new task;
Step S103 is if receiving new task, then by new task uniform distribution to being able to receive that new task Core.
The technical scheme that the specific embodiment of the invention provides obtains the peak power of each core in multinuclear and as predecessor Business number, according to this peak power and current task number determine if can be new task, if receiving new appointing Business, then by new task uniform distribution to being able to receive that the core of new task, so it has task distributes rational advantage.
Optionally, said method can also include after step s 103:
All can not receive new task such as all kernels, then stop the new task outside receiving.
Optionally, said method can also include after step s 103:
The operating frequency of each core is adjusted according to this task quantity.
A kind of based on many core chip the multitasks provided for the present invention the first better embodiment refering to Fig. 2, Fig. 2 are adjusted Degree system, this system includes:
Acquiring unit 201, for obtaining peak power and the current task number of each core in multinuclear;
Judging unit 202, for according to this peak power and current task number determine if can be new appoint Business;
Allocation unit 203 is for if receiving new task, then new to being able to receive that by new task uniform distribution The core of task.
The technical scheme that the specific embodiment of the invention provides obtains the peak power of each core in multinuclear and as predecessor Business number, according to this peak power and current task number determine if can be new task, if receiving new appointing Business, then by new task uniform distribution to being able to receive that the core of new task, so it has task distributes rational advantage.
Optionally, said system can also include:
Stop element 204, all can not receive new task for such as all kernels, then stop the new task outside receiving.
Optionally, said system can also include:
Adjustment unit 205, for adjusting the operating frequency of each core according to this task quantity.
It should be noted that for aforesaid each method embodiment or embodiment, in order to be briefly described, therefore by its all table Stating as a series of combination of actions, but those skilled in the art should know, the present invention is not by described sequence of movement Restriction, because of according to the present invention, some step can use other orders or carry out simultaneously.Secondly, people in the art Member also should know, embodiment described in the specification or embodiment belong to preferred embodiment, involved action and list Necessary to the unit not necessarily present invention.
In the above-described embodiments, the description to each embodiment all emphasizes particularly on different fields, and does not has the portion described in detail in certain embodiment Point, may refer to the associated description of other embodiments.
Step in embodiment of the present invention method can carry out order according to actual needs and adjust, merges and delete.
Unit in embodiment of the present invention device can merge according to actual needs, divides and delete.This area The feature of the different embodiments described in this specification and different embodiment can be combined or combine by technical staff.
Through the above description of the embodiments, those skilled in the art it can be understood that to the present invention permissible Realize with hardware, or firmware realizes, or combinations thereof mode realizes.When implemented in software, can be by above-mentioned functions It is stored in computer-readable medium or is transmitted as the one or more instructions on computer-readable medium or code.Meter Calculation machine computer-readable recording medium includes computer-readable storage medium and communication media, and wherein communication media includes being easy to from a place to another The individual local any medium transmitting computer program.Storage medium can be any usable medium that computer can access.With As a example by this but be not limited to: computer-readable medium can include random access memory (Random Access Memory, RAM), read only memory (Read-Only Memory, ROM), EEPROM (Electrically Erasable Programmable Read-Only Memory, EEPROM), read-only optical disc (Compact Disc Read- Only Memory, CD-ROM) or other optical disc storage, magnetic disk storage medium or other magnetic storage apparatus or can be used in Carry or store and there is instruction or the desired program code of data structure form can be by any other of computer access Medium.In addition.Any connection can be suitable become computer-readable medium.Such as, if software is to use coaxial cable, light Fine optical cable, twisted-pair feeder, Digital Subscriber Line (Digital Subscriber Line, DSL) or such as infrared ray, radio and The wireless technology of microwave etc from website, server or other remote source, then coaxial cable, optical fiber cable, double The wireless technology of twisted wire, DSL or such as infrared ray, wireless and microwave etc be included in affiliated medium fixing in.Such as this Bright used, dish (Disk) and dish (disc) include compress laser disc (CD), laser dish, laser disc, Digital Versatile Disc (DVD), Floppy disk and Blu-ray Disc, the duplication data of the usual magnetic of its mid-game, dish then carrys out the duplication data of optics with laser.Group above Close within should also be as being included in the protection domain of computer-readable medium.
In a word, the foregoing is only the preferred embodiment of technical solution of the present invention, be not intended to limit the present invention's Protection domain.All within the spirit and principles in the present invention, any modification, equivalent substitution and improvement etc. made, should be included in Within protection scope of the present invention.

Claims (6)

1. a multi-task scheduling method based on many core chip, it is characterised in that described method comprises the steps:
Obtain peak power and the current task number of each core in multinuclear;
According to this peak power and current task number determine if can be new task;
If receiving new task, then by new task uniform distribution to the core being able to receive that new task.
Method the most according to claim 1, it is characterised in that described method also includes:
All can not receive new task such as all kernels, then stop the new task outside receiving.
Method the most according to claim 1, it is characterised in that described method also includes:
The operating frequency of each core is adjusted according to this task quantity.
4. a multiple tasks dispatching system based on many core chip, it is characterised in that described system includes:
Acquiring unit, for obtaining peak power and the current task number of each core in multinuclear;
Judging unit, for according to this peak power and current task number determine if can be new task;
Allocation unit, for if receiving new task, then by new task uniform distribution to being able to receive that new task Core.
System the most according to claim 4, it is characterised in that described system also includes:
Stop element, all can not receive new task for such as all kernels, then stop the new task outside receiving.
System the most according to claim 4, it is characterised in that described system also includes:
Adjustment unit, for adjusting the operating frequency of each core according to this task quantity.
CN201610594824.5A 2016-07-26 2016-07-26 Multi-task scheduling methods based on many core chip and system Pending CN106250235A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201610594824.5A CN106250235A (en) 2016-07-26 2016-07-26 Multi-task scheduling methods based on many core chip and system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201610594824.5A CN106250235A (en) 2016-07-26 2016-07-26 Multi-task scheduling methods based on many core chip and system

Publications (1)

Publication Number Publication Date
CN106250235A true CN106250235A (en) 2016-12-21

Family

ID=57603743

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201610594824.5A Pending CN106250235A (en) 2016-07-26 2016-07-26 Multi-task scheduling methods based on many core chip and system

Country Status (1)

Country Link
CN (1) CN106250235A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018018427A1 (en) * 2016-07-26 2018-02-01 张升泽 Multi-task scheduling method and system based on multi-kernel chip
CN111158868A (en) * 2018-11-07 2020-05-15 三星电子株式会社 Computing system and method for operating a computing system

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1732447A (en) * 2002-12-26 2006-02-08 英特尔公司 Mechanism for processor power state aware distribution of lowest priority interrupt
CN101076770A (en) * 2004-09-28 2007-11-21 英特尔公司 Method and apparatus for varying energy per instruction according to the amount of available parallelism
CN101916209A (en) * 2010-08-06 2010-12-15 华东交通大学 Cluster task resource allocation method for multi-core processor
CN102822801A (en) * 2010-03-25 2012-12-12 国际商业机器公司 Allocating computing system power levels responsive to service level agreements

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1732447A (en) * 2002-12-26 2006-02-08 英特尔公司 Mechanism for processor power state aware distribution of lowest priority interrupt
CN101076770A (en) * 2004-09-28 2007-11-21 英特尔公司 Method and apparatus for varying energy per instruction according to the amount of available parallelism
CN102822801A (en) * 2010-03-25 2012-12-12 国际商业机器公司 Allocating computing system power levels responsive to service level agreements
CN101916209A (en) * 2010-08-06 2010-12-15 华东交通大学 Cluster task resource allocation method for multi-core processor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018018427A1 (en) * 2016-07-26 2018-02-01 张升泽 Multi-task scheduling method and system based on multi-kernel chip
CN111158868A (en) * 2018-11-07 2020-05-15 三星电子株式会社 Computing system and method for operating a computing system

Similar Documents

Publication Publication Date Title
CN106250235A (en) Multi-task scheduling methods based on many core chip and system
CN106056837A (en) Noise alarm method and system of electronic chip
CN106201726A (en) Many core chip thread distribution method and system
CN106294063A (en) Temperature-controlled process based on chip and system
CN106227606A (en) The method and system of many interval distribution electronic chip voltages
CN106227603A (en) The power calculation algorithms of multiple core chip and system
CN106202773A (en) The noise modulated method and system of electronic chip
CN106201725A (en) The power realization method and system of multi core chip
CN106093522A (en) The electric current method for drafting of electronic chip and system
CN106227602A (en) The distribution method being supported between multi core chip and system
CN106200740A (en) The voltage modulated method and system of electronic chip
CN106199149A (en) The electric current alarm method of electronic chip and system
CN106292976A (en) Electronic chip builtin voltage distribution method and system
CN106227639A (en) Multi core chip voltage calculates method and system
CN106155862A (en) Current calculation method in electronic chip and system
CN106018933A (en) Electronic chip voltage alarming method and system
CN106295818A (en) Customization method and system when of English course
CN106292950A (en) Many interval temperature values are in the application process of multi core chip and system
CN106254662A (en) Interior of mobile phone control method and system
CN106095343A (en) The power storage method and system of electronic chip
CN106096174A (en) The noise method for drafting of electronic chip and system
CN106124877A (en) The noise information sending method of electronic chip and system
CN106126120A (en) The noise storage method and system of electronic chip
CN106199134A (en) The information of voltage sending method of electronic chip and system
CN106201359A (en) The electric current storage method and system of electronic chip

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication

Application publication date: 20161221

RJ01 Rejection of invention patent application after publication