CN105471514A - High-speed fully-differential noise reduction device for CMOS optical receivers - Google Patents

High-speed fully-differential noise reduction device for CMOS optical receivers Download PDF

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CN105471514A
CN105471514A CN201510789052.6A CN201510789052A CN105471514A CN 105471514 A CN105471514 A CN 105471514A CN 201510789052 A CN201510789052 A CN 201510789052A CN 105471514 A CN105471514 A CN 105471514A
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circuit
noise
voltage signal
output
noise reduction
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谢生
高谦
毛陆虹
吴思聪
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Tianjin University
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Tianjin University
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/60—Receivers
    • H04B10/66—Non-coherent receivers, e.g. using direct detection
    • H04B10/69—Electrical arrangements in the receiver
    • H04B10/697—Arrangements for reducing noise and distortion

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  • Electromagnetism (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
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Abstract

The invention discloses a high-speed fully-differential noise reduction device for CMOS optical receivers. The noise reduction device comprises a low-noise trans-impedance amplifier which is used for converting a current signal output by a photoelectric detector into a voltage signal and preliminarily amplifying the voltage signal and has low equivalent input noise current, a single-ended to differential circuit which is used for realizing conversion from single-ended to differential output, increasing the circuit bandwidth, amplifying the voltage signal, effectively reducing equivalent input noise current introduced by a back-end circuit and eliminating common-mode noise introduced by a power supply and the like, a two-stage three-order differential limiting amplifier which adopts a staggered active feedback and capacitance degeneration circuit and is used for amplifying the voltage signal to a voltage level needed for a digital processing unit, and an output buffer stage which is used for converting an output differential voltage signal into a single-ended output voltage signal. On the premise of keeping the overall gain and bandwidth of the circuit, the introduced noise is reduced, and the sensitivity of optical receivers is improved.

Description

A kind of high speed fully differential noise reduction apparatus for CMOS optical receiver
Technical field
The present invention relates to optical fiber telecommunications system and light network field, particularly relate to a kind of high speed fully differential noise reduction apparatus for CMOS optical receiver.
Background technology
In the current era of network information technology develop rapidly, show with the short range network communication technology that electrical interconnection is main connected mode the shortcoming being difficult to avoid gradually, the aspects such as the speed that is mainly manifested in is low, crosstalk is large, power consumption is large.And Fibre Optical Communication Technology with it at a high speed, this defect of electrical interconnection can be made up without the feature of crosstalk and good confidentiality.Therefore, Fibre Optical Communication Technology is subject to extensive concern in the application of short distance and very short distance network service in recent years.Such as, between rack room, circuit board and chip chamber, between the remote circuitry module of even chip internal.
Although the optical receiver based on silica-based standard CMOS process obtains very large progress, but due to silicon materials nature and process conditions restriction, the sensitivity based on standard CMOS process optical receiver is on the low side, is difficult to reach real practical requirement.
Inventor is realizing in process of the present invention, finds at least there is following shortcoming and defect in prior art:
As one of the key parameter of optical receiver, the noise of sensitivity and analog front circuit is closely related, so the noise reduction technique of research high-speed light receiver is of equal importance, but not yet there is the reduction noise device be applied in preferably on CMOS optical receiver in prior art, the requirement to sensitivity in practical application cannot be met.
Summary of the invention
The invention provides a kind of high speed fully differential noise reduction apparatus for CMOS optical receiver, this noise reduction apparatus adopts three kinds of bandwidth lift techniques to exchange the lifting of gain for, effectively can reduce the equivalent input noise current of circuit, described below:
For a high speed fully differential noise reduction apparatus for CMOS optical receiver, described noise reduction apparatus comprises:
Low noise trans-impedance amplifier, is converted into voltage signal for the current signal exported by photodetector, and tentatively amplifies, and trans-impedance amplifier has lower equivalent input noise current;
Single-ended transfer difference circuit, for realizing the single-ended conversion to difference output, promotes circuit bandwidth, further amplification voltage signal simultaneously, and effectively reduces equivalent input noise current that back-end circuit introduces, eliminates the common-mode noise introduced by power supply etc.;
Two-stage adopts the third order difference limiting amplifier of alternating expression active feedback and electric capacity degeneracy circuit, for voltage signal being amplified to digital processing element required voltage level;
Exporting buffer stage, for the differential voltage signal of output being converted to the voltage signal of Single-end output, promoting the driving force of photoreceiver front-end circuit.
Wherein, described low noise trans-impedance amplifier is made up of common grid level amplifying circuit, the band cascode stage branch road of inductance and high pass filter.
Wherein, described cascode stage branch road is by introducing inductance, and input introduces an inductance, forms two π type broadband matching networks with the electric capacity in circuit or parasitic capacitance.
Further, described single-ended transfer difference circuit, by introducing inductance, forms a π type broadband matching network with the parasitic capacitance in circuit.
In order to obtain better noise reduction, described output buffer stage preferably uses Double-end-to-singlecircuit circuit structure.
The beneficial effect of technical scheme provided by the invention is:
1, in trans-impedance amplifier circuit, change RGC common-source stage structure into cascodes, increase the equivalent transconductance of TIA on the one hand; Can the Miller effect be shielded on the other hand, promote the bandwidth of trans-impedance amplifier.
2, adopt π type broadband matching network technology, in RGC circuit, introduce two inductance, form two π type broadband matching networks with the parasitic capacitance in circuit.By these two π type broadband matching networks, by the most of parasitic capacitance in RGC structure and two inductance generation resonance, each point impedance can be reduced, pushes limit to high frequency, thus effective spread bandwidth.
3, introduce an inductance at the output of trans-impedance amplifier, form a π type broadband matching network with the parasitic capacitance in circuit, thus promote bandwidth further.
4, in order to realize the single-ended conversion exported to fully differential, introducing a kind of novel single-ended transfer difference circuit, while realizing full bandwidth differential conversion, also can reduce chip area, promote bandwidth sum gain.
Because main purpose of the present invention reduces noise, therefore by first three kind technology, the bandwidth of lifting is changed into the lifting of gain, and then reduce noise.4th kind of technology, mainly for eliminating the common-mode noise introduced by power supply etc.Also introduce the technology that other three kinds are reduced noise in addition:
5, input introduces the high-frequency noise that inductance can suppress detector parasitic capacitance to cause, and therefore reduces equivalent input noise current.
6, adopt high pass filter to transistor M 31best direct current biasing being provided, allowing common grid level circuit have best amplitude-frequency response, under the condition keeping bandwidth constant, reducing circuit noise by improving resistance value.
7, introduce an inductance at the output of low noise trans-impedance amplifier, effectively can reduce the equivalent input noise current that back-end circuit is introduced.
8, limiting amplifier (LA) is taken as two-stage three rank, and introduces alternating expression active backfeed circuit and electric capacity degeneracy structure, effectively suppresses the decline of circuit bandwidth.
In sum, the high speed fully differential noise reduction apparatus by adopting the present invention to propose improves the sensitivity of CMOS optical receiver.
Accompanying drawing explanation
Fig. 1 gives the structured flowchart of the high speed fully differential noise reduction apparatus for CMOS optical receiver designed by the present invention;
Fig. 2 gives the circuit diagram of traditional RGC trans-impedance amplifier;
Fig. 3 gives the circuit diagram of the low noise modified model RGCTIA with single-ended transfer difference circuit;
Fig. 4 gives the circuit diagram on two-stage three rank limiting amplifier (LA);
Fig. 5 gives the circuit diagram exporting buffer stage (Buffer).
In accompanying drawing, the list of parts representated by each label is as follows:
1: low noise trans-impedance amplifier; 2: single-ended transfer difference circuit;
3: two-stage third order difference limiting amplifier; 4: export buffer stage.
Embodiment
For making the object, technical solutions and advantages of the present invention clearly, below embodiment of the present invention is described further in detail.
Embodiment 1
For the high speed fully differential noise reduction apparatus of CMOS optical receiver, see Fig. 1, this noise reduction apparatus comprises:
A low noise trans-impedance amplifier 1 (TIA), is converted into voltage signal, and tentatively amplifies, and this trans-impedance amplifier has lower equivalent input noise current for the current signal exported by photodetector;
A single-ended transfer difference circuit 2, single-ended to difference output conversion for realizing, while lifting circuit bandwidth and amplification voltage signal, this structure effectively can reduce the equivalent input noise current that back-end circuit is introduced;
A two-stage third order difference limiting amplifier 3, this limiting amplifier adopts alternating expression active feedback and electric capacity degeneracy circuit, for voltage signal being amplified to digital processing element required voltage level;
One exports buffer stage 4, and the differential voltage signal for being exported by two-stage third order difference limiting amplifier 3 converts the voltage signal of Single-end output to, and provides driving force.
Wherein, the embodiment of the present invention adopts the basic structure of adjustment type cascade (RGC) circuit as trans-impedance amplifier of band inductance, effectively reduces input impedance and shielding miller capacitance, promotes the bandwidth of trans-impedance amplifier.
In order to the bandwidth of further broadening trans-impedance amplifier, in RGC circuit, introduce two inductance, form two π type broadband matching networks with the electric capacity in circuit.By these two π type broadband matching networks, make the most of parasitic capacitance in RGC structure and two inductance generation resonance, reduce each point impedance, push limit to high frequency, effective spread bandwidth.
In order to reduce the equivalent input noise of trans-impedance amplifier, needing the bandwidth of sacrificing above-mentioned skill upgrading to exchange the lifting of gain for, and then effectively can reduce equivalent input noise, also adopt high pass filter to M in addition 31best direct current biasing is provided, allows common grid level circuit have best amplitude-frequency response.
Under the condition keeping bandwidth constant, reduce circuit noise by improving resistance.Meanwhile, the inductance that input is introduced can reduce equivalent input noise current, and the inductance that output is introduced can reduce the equivalent input noise current that back-end circuit produces, and adopts difference modes, eliminates the common-mode noise that power supply etc. is introduced.
The broadband that consideration system power dissipation, multi-stage cascade cause narrows and noise additive effect, and the embodiment of the present invention only uses two-stage three rank alternating expression active feedback limiting amplifier (LA), and in limiting amplifier, introduce electric capacity degeneracy structure.While signal is amplified to level needed for back-end digital circuit by cascade LA, effectively inhibit the decline of receiver front end overall bandwidth.
Connect after LA and export buffer stage (Buffer), realize optical receiver and 50 Ω load matched, use Double-end-to-singlecircuit circuit structure, by diode connection, metal-oxide-semiconductor is in parallel with current mirror forms in load.Meanwhile, active inductance structure is employed in Buffer.
Embodiment 2
First simple analysis is carried out to the noise of traditional RGC trans-impedance amplifier below, then reduce noise two aspect from expansion bandwidth sum and describe novel RGC trans-impedance amplifier operation principle in detail.As previously described, the main purpose of the embodiment of the present invention reduces noise.Therefore the main purpose expanding bandwidth and single-ended transfer difference technology is also to reduce noise.
The embodiment of the present invention has fully utilized following three kinds of technology to expand bandwidth, and namely cascade feedback path reduces input impedance, miller capacitance " shielding " effect and π type broadband matching network.And three kinds of technology reduce noise, namely introduce high pass filter in RGC structure, in the inductance L that input is introduced 31, and introduce inductance L at the output of trans-impedance amplifier 33.The object of difference channel is adopted to be eliminate the common-mode noise introduced by power supply etc.
Fig. 2 gives the basic structure of traditional RGC trans-impedance amplifier.This structure is on the basis of common grid level amplifier, by base stage and drain electrode increase active feedback passage, reduces the sending-end impedance of circuit, thus changes the position of the limit of limiting bandwidth, reach the object expanding bandwidth.Wherein M 21for common bank tube, M 22for providing the common source pipe of active feedback.I pDfor photodetector equivalent current source, and C pDfor the equivalent parasitic capacitances of photodetector.
Fig. 3 gives the low noise wideband RGCTIA circuit diagram of the band single-ended transfer difference circuit new construction that the embodiment of the present invention proposes.The effect of this circuit receives the current signal that photodetector exports, and amplified and be converted to voltage signal.Trans-impedance amplifier (TIA) mainly comprises common grid level amplifying circuit, cascode stage branch road and high pass filter three part.C pDwith resistance R 3sbetween introduce an inductance L 31, inductance L 31one termination input, other end connecting resistance R 3s; Transistor M 31source electrode and resistance R 3sbe connected, drain electrode and resistance R 31be connected to power supply, grid and resistance R 33with resistance R 34the bleeder circuit of composition is connected; Transistor M 33drain electrode connecting resistance R 32, grid meets bias voltage V b, resistance R 32another termination power, transistor M 33source connect inductance L 32; Inductance L 32another termination transistor M 32drain electrode, transistor M 32source ground, grid connects inductance L 31the other end; Electric capacity C 31be connected on transistor M 33between drain electrode and bleeder circuit.
1, due to the first order that trans-impedance amplifier is optical receiver module, its noise directly affects the sensitivity of optical receiver, therefore the noise characteristic of Water demand once RGC trans-impedance amplifier.
The noise of RGC trans-impedance amplifier is primarily of resistance R 31, R 3sand R 32thermal noise and transistor M 32thermal noise composition, its noise current power spectrum can be written as:
i n , R 31 2 ‾ = 4 k T R 31 - - - ( 1 )
i n , R 3 s 2 ‾ = 4 k T R 3 s - - - ( 2 )
i n , R 32 2 ‾ = 4 k T R 32 - - - ( 3 )
i n , M 32 2 ‾ = 4 kTγg m 2 - - - ( 4 )
Wherein, for resistance R 31equivalent input noise current; T is temperature; K is Boltzmann constant; for resistance R 3sequivalent input noise current; for resistance R 32equivalent input noise current; for transistor M 32equivalent input noise current; γ is the coefficient relevant with transistor arrangement; g m2for transistor M 32equivalent transconductance.
By resistance R 31, R 3sand R 32thermal noise and transistor M 32channel noise equivalence to input, the equivalent input noise current power density spectrum that can obtain RGC circuit is:
i n , i n 2 ‾ = i n , R 31 2 ‾ + i n , R 3 s 2 ‾ + i n , M 32 2 ‾ + i n , R 32 2 ‾ ( g m 2 + 1 R 32 ) 2 R 32 2 - - - ( 5 )
From above formula, the noiseproof feature of optimized circuit can be carried out from two aspects:
(1) under the prerequisite of the performance such as gain, bandwidth meeting RGC trans-impedance amplifier, resistance R is improved 31and R 3sresistance, reduce equivalent input noise current densities by reducing Resistance Thermal Noise, but increase resistance R 31resistance can reduce the bandwidth of RGC trans-impedance amplifier;
(2) transistor M is increased 32mutual conductance or reduce resistance R 32resistance be conducive to the noise reducing RGC trans-impedance amplifier.But R 32the change of resistance can affect the position of high-frequency peaking, therefore will trade off between noise and bandwidth.
From upper surface analysis, increase resistance R 31and R 3sresistance can noise decrease, but needs to sacrifice bandwidth.
The introduction of tradition RGC structure, RGC is made up of main amplifier and booster amplifier two parts.So, RGC performance just can be made to reach optimum as long as allow two amplifiers reach best amplitude-frequency characteristic respectively by adjusting means size in theory.In fact, main amplifier, when namely grid level (CG) amplifier emulates separately altogether, grid bias is that about 1.2V can make amplifier realize best amplitude-frequency characteristic, and now input point DC potential is 0.6V.And booster amplifier, namely common-source stage (CS) amplifier output point DC level when realizing best amplitude-frequency characteristic is 0.8V.This illustrates that main amplifier and booster amplifier can not reach optimum performance simultaneously, must make compromise.In this circuit, this problem solves by using high pass filter, high pass filter resistance R 33, R 34with electric capacity C 31form, be connected between auxiliary amplifier output and main amplifier grid level bias terminal.
In circuit, because M 31optimal bias is 1.2v and supply voltage is 1.8v, so resistance R 33with R 34ratio be set to 1/2.Under such main amplifier just can be operated in just bias condition.Due to transistor M 31optimal bias accurately at 1.2v, slightly need not fluctuate and does not also affect, so biasing circuit need not strictly retrain output level, uses resitstance voltage divider.On the other hand, booster amplifier also can need not estimate M with optimum state work 31bias voltage, because the electric capacity C in high pass filter 31dC level is between the two cut off and only transmits AC signal.The resistance matching problem at capacitance two ends is should be noted that when designing high pass filter.Consider optical receiver be broadband communication circuit, need not as the radio circuit being applied to arrowband strict matched impedance.Therefore, the real part of resistance is equal here.In circuit, the load resistance of booster amplifier is R 32, therefore resistance R 33with R 34parallel connection value equal resistance R 32, can be expressed as with formula:
R 33 R 34 R 33 + R 34 = R 32 - - - ( 6 )
Determine according to emulation, resistance R32=400 Ω is optimal value, so calculates resistance R33 and R34 and equals 600 Ω, 1200 Ω respectively.Electric capacity C31 capacitance is set to 10pF, and under gigabit transmission rate, resistance only has tens Europe, far below the value of resistance R32, R33 and R34, so can not reduce signal amplitude.Because RGC employs improved common source and common grid amplifier displacement CS amplifier, also added high pass filter in addition as just bias circuit, main amplifier and booster amplifier is made all to be operated in optimum state, so main amplifier tube equivalent transconductance is able to obvious lifting.On the other hand, the miller capacitance of cascodes is much smaller than CS circuit miller capacitance, and this allows input miller capacitance obviously reduce.This allows input impedance far below traditional RGC circuit input impedance, improves bandwidth.In addition, the interpolation of input matching network allows input end capacitor reduce the impact of bandwidth, and this has also expanded bandwidth further.Due to the use of three kinds of RGC improvement opportunity, make bandwidth broadning a lot.And the design object of this circuit is high-gain and low noise, therefore need bandwidth lifting capacity to transfer on gain and noise.Method Of Accomplishment is: by resistance R 31and R 3sresistance raises, and again establishes M according to simulation parameter scanning 31size optimal value.Because RGC gain is by resistance R 31determine, so resistance R 31resistance raises just can promote gain.According to the noise building mechanism of RGC, resistance R 31and R 3sthermal noise be RGC main noise source, the two resistance increase can make RGC noise obviously decline.2, by E n-I n(this model refers to that the internal noise of amplifier can with the zero impedance voltage generator E being connected on input to noise model n, and be connected in parallel on the current feedback circuit I that input has infinite-impedance nrepresent, both coefficient correlation is that analysis r) is known, inductance L in the RGCTIA of band matching network 31on the impact reducing equivalent input noise current be:
|i n,eq| 2＝(1-ω 2L 31C pd) 2I n 2+ω 2C pd 2E n 2(7)
And the equivalent input noise not with matching network RGCTIA is:
|i n,eq| 2＝I n 2+ω 2C pd 2E n 2(8)
Wherein, C pdrepresent the junction capacitance of photodetector; | i n, eq| 2represent equivalent noise current spectrum density, unit is A 2/ H z; ω represents angular frequency.
3, in like manner, trans-impedance amplifier is also the input of back-end circuit, introduces inductance L at trans-impedance amplifier output 33effectively can reduce the equivalent input noise current that back-end circuit is introduced.
Known based on above-mentioned analysis, the equivalent input noise current with matching network TIA is lower.
As can be seen here, adopt method set forth above, effectively can reduce equivalent input noise current.
4, because trans-impedance amplifier is Single-end output, in order to reduce the common-mode noise introduced by power supply etc., needing to be converted into fully differential and exporting, so the embodiment of the present invention proposes a kind of novel single-end slip parallel circuit 2, being next described in greater detail.
As shown in Figure 3 (the second dotted line frame comprises circuit), the single-ended transfer difference task of trans-impedance amplifier can be completed by a single-ended transfer difference transducer, instead of adopt symmetric circuit structure to realize differential conversion.The output signal of trans-impedance amplifier and resistance R fwith transistor M 35grid connect, resistance R fthe other end and transistor M 34source electrode, transistor M 35drain electrode and transistor M 36grid be connected, transistor M 35source class ground connection.Transistor M 35grid level connect inductance L 33, inductance L 33the output of another termination trans-impedance amplifier.Transistor M 34grid and resistance R 35and R 36be connected, be connected to supply voltage VDD, transistor M 34drain electrode be connected to resistance R 35the other end.Transistor M 36drain electrode connecting resistance R 36.Transistor M 35and M 36source class be connected and ground connection, and transistor M 36drain electrode connecting resistance R 34.Wherein, transistor M 34and R 35the common grid level circuit formed and transistor M 36and R 36the common-source stage circuit realiration two ends output signal formed is anti-phase.
But transistor M 34and R 35the common grid level circuit formed and transistor M 36and R 36the common-source stage circuit formed is when ensureing to export under the consistent condition of DC level, and the gain of output signal can exist larger difference, transistor M 34and R 35the common grid level circuit gain formed is less, therefore needs at transistor M 34and R 35the common grid level circuit rear end formed adds gain rank.Because common-source stage output signal is anti-phase with input signal, therefore need to add two stage gain rank, in order to make to add two-stage gain rank after, the bandwidth of differential output signal is as far as possible constant, therefore in two-stage amplifying circuit, introduces electric capacity degeneracy circuit, and suppressing bandwidth reduces.Two transistor M 34and M 35source electrode all have a source feedback resistance, and shunt capacitance C 31a positive feedback loop is formed at the source electrode of two-stage amplifying circuit.Intuitively, this feedback capacity can be broken down into two Miller capacitances.Two Miller capacitances are respectively-(A-1) C 31[(A-1)/A] C 31.Wherein, A is electric capacity C 31the yield value at two ends.Due to electric capacity C 31positive feedback connect, transistor M 34the electric capacity of source electrode is a negative capacitance :-(A-1) C 31.This electric capacity can electric capacity between partial offset trans-impedance amplifier and gain stage, and rear stage electric capacity [(A-1)/A] C 31can with resistance R 38forming a zero point, for offsetting the limit of prime, reaching again the object of spread bandwidth.
Single-ended transfer difference circuit designed by the embodiment of the present invention has the following advantages: (1) and the symmetrical circuit realiration fully differential photograph ratio of employing, can reduce the use of an inductance, thus reduce chip area; (2) the single-ended transfer difference circuit that the embodiment of the present invention proposes is different from the change-over circuit based on high pass filter, and it can realize the transmission data of Whole frequency band; (3) by transistor M 34with resistance R 33the common grid level circuit formed and two-stage common-source stage circuit and M 36with R 34the common-source stage circuit raises gain formed.(4) by introducing inductance L 33the output load capacitance of front-end circuit can be reduced, the limit of output point can be pulled to high frequency treatment, promote bandwidth.(5) by above-mentioned E n-I nnoise model is analyzed, inductance L 33the equivalent input noise current introduced by back-end circuit can be reduced.(6) because output is differential configuration, the common-mode noise that power supply etc. is introduced can be eliminated.
Differential limiting amplifier described in the embodiment of the present invention adopts two-stage three rank cascaded structure, and every grade is all the identical difference common-source stage amplifier with electric capacity degeneracy circuit and alternating expression active feedback of structure.Fig. 4 gives the circuit structure schematic diagram of limiting amplifier.Described limiting amplifier is by NMOS tube M 42aand M 42b, resistance R 41a, R 41b, R 42aand R 42band electric capacity C 41composition.Wherein, resistance R 42aand R 42band electric capacity C 41composition electric capacity degeneracy circuit is to expand bandwidth; NMOS tube M 42aand M 42bfor Differential Input is to pipe; NMOS tube M 41aand M 41bcomposition active backfeed circuit.Follow-up two-stage amplifying circuit is similar.Size, the shape of these NMOS tube of mutually matching and resistance are identical, domain structure are also full symmetrics.In order to overcome the g ain phenomenon that three rank gain stages cause, the embodiment of the present invention have employed alternating expression feedback technique, is added between two traditional reponse systems by a feedback unit.In order to the bandwidth suppressing three rank gain stages to cause narrows effect, introduce electric capacity degeneracy structure.
See Fig. 5, difference turns single-ended output buffer stage by NMOS offset M 54, Differential Input is to pipe M 51aand M 51b, NMOS load pipe M 52aand M 52b, PMOS transistor M 53a, M 53band resistance R 5aand R 5bformed.Differential Input is to pipe M 51aand M 51bsize and dimension, NMOS load pipe M 52aand M 52bsize and dimension, PMOS transistor M 53aand M 53bsize and dimension and resistance R 5aand R 5bsize and dimension identical, domain arrangement on full symmetric.
Wherein, NMOS offset M 54effect be to provide bias current; Transistor M 52awith resistance R 5aand transistor M 52bwith resistance R 5bform two collapsible active inductances respectively; PMOS load pipe M 53agrid and M 53bgrid be shorted together, and with transistor M 51adrain electrode be connected, form a both-end and turn single-ended structure, realize Single-end output; NMOS load pipe M 52aand M 52bdrain electrode, PMOS load pipe M 53aand M 53bsource class and resistance R 5aand R 5bone end be all connected with VDD, resistance R 5aand R 5bthe other end respectively with transistor M 52aand M 52bgrid be connected.
The embodiment of the present invention is to the model of each device except doing specified otherwise, and the model of other devices does not limit, as long as can complete the device of above-mentioned functions.
It will be appreciated by those skilled in the art that accompanying drawing is the schematic diagram of a preferred embodiment, the invention described above embodiment sequence number, just to describing, does not represent the quality of embodiment.
The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, within the spirit and principles in the present invention all, any amendment done, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.

Claims (5)

1., for a high speed fully differential noise reduction apparatus for CMOS optical receiver, it is characterized in that, described noise reduction apparatus comprises:
Low noise trans-impedance amplifier, is converted into voltage signal for the current signal exported by photodetector, and tentatively amplifies, and trans-impedance amplifier has lower equivalent input noise current;
Single-ended transfer difference circuit, for realizing the single-ended conversion to difference output, promotes circuit bandwidth, further amplification voltage signal simultaneously, and effectively reduces equivalent input noise current that back-end circuit introduces, eliminates the common-mode noise introduced by power supply etc.;
Two-stage adopts the third order difference limiting amplifier of alternating expression active feedback and electric capacity degeneracy circuit, for voltage signal being amplified to digital processing element required voltage level;
Exporting buffer stage, for the differential voltage signal of output being converted to the voltage signal of Single-end output, promoting the driving force of photoreceiver front-end circuit.
2. a kind of high speed fully differential noise reduction apparatus for CMOS optical receiver according to claim 1, is characterized in that, described low noise trans-impedance amplifier is made up of common grid level amplifying circuit, the band cascode stage branch road of inductance and high pass filter.
3. a kind of high speed fully differential noise reduction apparatus for CMOS optical receiver according to claim 2, it is characterized in that, described cascode stage branch road is by introducing inductance, and input introduces an inductance, form two π type broadband matching networks with the electric capacity in circuit or parasitic capacitance.
4. a kind of high speed fully differential noise reduction apparatus for CMOS optical receiver according to claim 1, is characterized in that, described single-ended transfer difference circuit, by introducing inductance, forms a π type broadband matching network with the parasitic capacitance in circuit.
5. a kind of high speed fully differential noise reduction apparatus for CMOS optical receiver according to claim 1, is characterized in that, described output buffer stage uses Double-end-to-singlecircuit circuit structure.
CN201510789052.6A 2015-11-17 2015-11-17 High-speed fully-differential noise reduction device for CMOS optical receivers Pending CN105471514A (en)

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CN107395133A (en) * 2017-07-25 2017-11-24 杭州洪芯微电子科技有限公司 Trans-impedance amplifier
CN107666289A (en) * 2017-09-14 2018-02-06 西安电子科技大学昆山创新研究院 The big linear dynamic range trans-impedance amplifier of high-gain
CN109489810A (en) * 2018-09-21 2019-03-19 中国科学院紫金山天文台 The multichannel read-out system of terahertz wave band large scale array graphene detector
CN111026213A (en) * 2019-11-07 2020-04-17 中科威发半导体（苏州）有限公司 Current-to-voltage circuit and power supply method thereof

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Application publication date: 20160406