CN105446930A - Single selection end SPI (Serial Peripheral Interface) master-slave multi-machine bidirectional communication method - Google Patents
Single selection end SPI (Serial Peripheral Interface) master-slave multi-machine bidirectional communication method Download PDFInfo
- Publication number
- CN105446930A CN105446930A CN201510994517.1A CN201510994517A CN105446930A CN 105446930 A CN105446930 A CN 105446930A CN 201510994517 A CN201510994517 A CN 201510994517A CN 105446930 A CN105446930 A CN 105446930A
- Authority
- CN
- China
- Prior art keywords
- machine
- pin
- miso
- slave
- pins
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Information Transfer Systems (AREA)
- Small-Scale Networks (AREA)
Abstract
The invention discloses a single selection end SPI (Serial Peripheral Interface) master-slave multi-machine bidirectional communication method. The method comprises the following steps: S1, connecting an MOSI (Master Output Slave Input) pin, an MISO (Multiple Input Single Output) pin and an SCLK (Serial Clock) pin on a master machine with corresponding MOSI pins, MISO pins and SCLK pins on a plurality of slave machines respectively through three communication lines, and connecting an SS pin on the master machine with SS pins on the plurality of slave machines respectively through a selection line; S2, addressing the slave machines, and allocating addresses to the slave machines; S3, controlling the MISO pins of the slave machines, and controlling SPI interface MISO pins of the slave machines to be in input states; and S4, transmitting data carrying slave machine address codes to the slave machines through the MOSI pins by the master machine. Through adoption of the method, the number of the connection lines can be reduced greatly; a communication faster than an I2C communication can be realized through only four lines; the connection line cost is saved; and the system complexity is lowered. During design of a circuit board, the cost can be reduced. Meanwhile, the number of the pins used in the master machine is saved, and resources are saved.
Description
Technical field
The present invention relates to multimachine two-way communication technical field, particularly relate to a kind of single selecting side SPI master-slave mode multimachine two-way communication.
Background technology
The present invention relates to the disposal route communicated between multi-microcontroller and chip with SPI interface, classic method SPI main frame and eachly will have a connecting line from machine, for selecting, this is communicated from machine, if a main frame is connected from machine with eight, except three basic order wire (MOSI, MISO, SCLK) to be connected to each from machine, main frame also to draw eight select lines be connected to each from machine, connecting line is many, waste resource, cost is also higher.
Summary of the invention
Based on the technical matters that background technology exists, the present invention proposes a kind of single selecting side SPI master-slave mode multimachine two-way communication.
The one list selecting side SPI master-slave mode multimachine two-way communication that the present invention proposes, comprises the following steps:
S1: the MOSI pin on main frame, MISO pin and SCLK pin are connected with multiple MOSI pin corresponding from machine, MISO pin and SCLK pin respectively with three order wires, selects line to be connected from the SS pin machine with multiple respectively by the SS pin on main frame with one;
S2: address from machine, eachly distributes an address from machine;
S3: the MISO pin from machine is controlled, control from the SPI interface MISO pin of machine be input state;
S4: main frame passes through MOSI pin to the data sent from machine with slave addresses coding;
S5: receive the data with slave addresses coding from machine, then compares geocoding and the machine addressing, when geocoding and the machine addressing coupling, control MISO pin is output state, and export, when geocoding and the machine addressing are not mated, do not react.
Preferably, from machine be the microcontroller with SPI interface.
Preferably, main frame communicates with between machine, and what in main-machine communication form, first character joint sent is that other is data length and data from the address of machine and read-write position.
Preferably, SS pin shifts with and arranges when MISO is input state use for, state synchronous with main frame from machine.
In the present invention, by controlling the MISO pin from machine, control is input state from the SPI interface MISO pin of machine, multiple conflict exported from machine MISO pin can be prevented, by addressing from machine, eachly distribute an address from machine, can main frame with multiple communicate from machine time, the data that main frame is sent are transferred to corresponding to machine accurately, and the number of connecting line is greatly reduced, only just main frame can be connected from machine with multiple with four lines, main frame is communicated from machine with multiple, the present invention can greatly reduce the number of connecting line, only just can realize communicating faster than I2C communication with four lines, save line cost, reduce system complexity, when design circuit plate, also cost can be reduced, and save the pin usage quantity of main frame simultaneously, save resource.
Accompanying drawing explanation
Fig. 1 is the main frame of a kind of single selecting side SPI master-slave mode multimachine two-way communication that the present invention proposes and the connection diagram from machine;
Fig. 2 is the communications status schematic diagram from machine SPI of a kind of single selecting side SPI master-slave mode multimachine two-way communication that the present invention proposes.
Embodiment
Below in conjunction with specific embodiment, further explanation is done to the present invention.
With reference to Fig. 1-2, embodiment proposes a kind of single selecting side SPI master-slave mode multimachine two-way communication, comprises the following steps:
S1: the MOSI pin on main frame, MISO pin and SCLK pin are connected with multiple MOSI pin corresponding from machine, MISO pin and SCLK pin respectively with three order wires, selects line to be connected from the SS pin machine with multiple respectively by the SS pin on main frame with one;
S2: address from machine, eachly distributes an address from machine;
S3: the MISO pin from machine is controlled, control from the SPI interface MISO pin of machine be input state;
S4: main frame passes through MOSI pin to the data sent from machine with slave addresses coding;
S5: receive the data with slave addresses coding from machine, then geocoding and the machine addressing are compared, when geocoding and the machine addressing coupling, control MISO pin is output state, and export, when geocoding and the machine addressing are not mated, do not react, by controlling the MISO pin from machine, control is input state from the SPI interface MISO pin of machine, multiple conflict exported from machine MISO pin can be prevented, by addressing from machine, eachly distribute an address from machine, can main frame with multiple communicate from machine time, the data that main frame is sent are transferred to corresponding to machine accurately, and the number of connecting line is greatly reduced, only just main frame can be connected from machine with multiple with four lines, main frame is communicated from machine with multiple, the present invention can greatly reduce the number of connecting line, only just can realize communicating faster than I2C communication with four lines, save line cost, reduce system complexity, when design circuit plate, also cost can be reduced, and save the pin usage quantity of main frame simultaneously, save resource.
It is the microcontroller with SPI interface from machine, main frame communicates with between machine, what in main-machine communication form, first character joint sent is from the address of machine and read-write position, other is data length and data, SS pin is used for synchronous with main frame from machine, state shifts with and arranges when MISO is input state and uses, by controlling the MISO pin from machine, control is input state from the SPI interface MISO pin of machine, multiple conflict exported from machine MISO pin can be prevented, by addressing from machine, eachly distribute an address from machine, can main frame with multiple communicate from machine time, the data that main frame is sent are transferred to corresponding to machine accurately, and the number of connecting line is greatly reduced, only just main frame can be connected from machine with multiple with four lines, main frame is communicated from machine with multiple, the present invention can greatly reduce the number of connecting line, only just can realize communicating faster than I2C communication with four lines, save line cost, reduce system complexity, when design circuit plate, also cost can be reduced, and save the pin usage quantity of main frame simultaneously, save resource.
The above; be only the present invention's preferably embodiment; but protection scope of the present invention is not limited thereto; anyly be familiar with those skilled in the art in the technical scope that the present invention discloses; be equal to according to technical scheme of the present invention and inventive concept thereof and replace or change, all should be encompassed within protection scope of the present invention.
Claims (4)
1. single selecting side SPI master-slave mode multimachine two-way communication, is characterized in that, comprise the following steps:
S1: the MOSI pin on main frame, MISO pin and SCLK pin are connected with multiple MOSI pin corresponding from machine, MISO pin and SCLK pin respectively with three order wires, selects line to be connected from the SS pin machine with multiple respectively by the SS pin on main frame with one;
S2: address from machine, eachly distributes an address from machine;
S3: the MISO pin from machine is controlled, control from the SPI interface MISO pin of machine be input state;
S4: main frame passes through MOSI pin to the data sent from machine with slave addresses coding;
S5: receive the data with slave addresses coding from machine, then compares geocoding and the machine addressing, when geocoding and the machine addressing coupling, control MISO pin is output state, and export, when geocoding and the machine addressing are not mated, do not react.
2. one according to claim 1 single selecting side SPI master-slave mode multimachine two-way communication, is characterized in that, is the microcontroller with SPI interface from machine.
3. one according to claim 1 single selecting side SPI master-slave mode multimachine two-way communication, it is characterized in that, main frame communicates with between machine, and what in main-machine communication form, first character joint sent is that other is data length and data from the address of machine and read-write position.
4. one according to claim 1 single selecting side SPI master-slave mode multimachine two-way communication, is characterized in that, SS pin shifts with and arranges when MISO is input state use for, state synchronous with main frame from machine.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510994517.1A CN105446930A (en) | 2015-12-25 | 2015-12-25 | Single selection end SPI (Serial Peripheral Interface) master-slave multi-machine bidirectional communication method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510994517.1A CN105446930A (en) | 2015-12-25 | 2015-12-25 | Single selection end SPI (Serial Peripheral Interface) master-slave multi-machine bidirectional communication method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN105446930A true CN105446930A (en) | 2016-03-30 |
Family
ID=55557150
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510994517.1A Pending CN105446930A (en) | 2015-12-25 | 2015-12-25 | Single selection end SPI (Serial Peripheral Interface) master-slave multi-machine bidirectional communication method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105446930A (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107370651A (en) * | 2017-06-26 | 2017-11-21 | 中国人民解放军91388部队 | A kind of communication means between SPI slaves |
| CN108521639A (en) * | 2018-06-16 | 2018-09-11 | 刘至键 | A kind of communication device of intelligence networking connection automobile |
| CN110674075A (en) * | 2019-09-27 | 2020-01-10 | 山东华芯半导体有限公司 | Method and system for realizing AXI bus broadcasting mechanism |
| CN110730253A (en) * | 2019-09-25 | 2020-01-24 | 陈健红 | Automatic addressing method of control chip |
| CN112965927A (en) * | 2021-03-18 | 2021-06-15 | 深圳市航顺芯片技术研发有限公司 | Signal driving system and method based on SPI equipment |
| CN113098487A (en) * | 2021-06-10 | 2021-07-09 | 上海亿存芯半导体有限公司 | IO interface circuit with single input port and multiple slave addresses and communication equipment |
| CN115033515A (en) * | 2022-05-26 | 2022-09-09 | 南京观海微电子有限公司 | Master-slave SPI communication method |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101681326A (en) * | 2007-05-25 | 2010-03-24 | 罗伯特.博世有限公司 | Data transmission method between master and slave devices |
| CN101067804B (en) * | 2007-05-29 | 2010-04-14 | 山东大学 | A high-speed configurable extended SPI bus and working method thereof |
| CN102088386A (en) * | 2011-01-20 | 2011-06-08 | 中北大学 | Universal serial bus (USB) for master-slave interconnection module of circuit system |
| CN102929820A (en) * | 2011-12-30 | 2013-02-13 | 广东佳和通信技术有限公司 | SPI communication device compatible with single/dual wires and communication method thereof |
-
2015
- 2015-12-25 CN CN201510994517.1A patent/CN105446930A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101681326A (en) * | 2007-05-25 | 2010-03-24 | 罗伯特.博世有限公司 | Data transmission method between master and slave devices |
| CN101067804B (en) * | 2007-05-29 | 2010-04-14 | 山东大学 | A high-speed configurable extended SPI bus and working method thereof |
| CN102088386A (en) * | 2011-01-20 | 2011-06-08 | 中北大学 | Universal serial bus (USB) for master-slave interconnection module of circuit system |
| CN102929820A (en) * | 2011-12-30 | 2013-02-13 | 广东佳和通信技术有限公司 | SPI communication device compatible with single/dual wires and communication method thereof |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107370651A (en) * | 2017-06-26 | 2017-11-21 | 中国人民解放军91388部队 | A kind of communication means between SPI slaves |
| CN107370651B (en) * | 2017-06-26 | 2020-04-10 | 中国人民解放军91388部队 | Communication method between SPI slave machines |
| CN108521639A (en) * | 2018-06-16 | 2018-09-11 | 刘至键 | A kind of communication device of intelligence networking connection automobile |
| CN108521639B (en) * | 2018-06-16 | 2024-01-02 | 刘至键 | Communication device of intelligent networking allies oneself with car |
| CN110730253A (en) * | 2019-09-25 | 2020-01-24 | 陈健红 | Automatic addressing method of control chip |
| CN110674075A (en) * | 2019-09-27 | 2020-01-10 | 山东华芯半导体有限公司 | Method and system for realizing AXI bus broadcasting mechanism |
| CN112965927A (en) * | 2021-03-18 | 2021-06-15 | 深圳市航顺芯片技术研发有限公司 | Signal driving system and method based on SPI equipment |
| CN113098487A (en) * | 2021-06-10 | 2021-07-09 | 上海亿存芯半导体有限公司 | IO interface circuit with single input port and multiple slave addresses and communication equipment |
| CN113098487B (en) * | 2021-06-10 | 2021-09-24 | 上海亿存芯半导体有限公司 | IO interface circuit with single input port and multiple slave addresses and communication equipment |
| CN115033515A (en) * | 2022-05-26 | 2022-09-09 | 南京观海微电子有限公司 | Master-slave SPI communication method |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN105446930A (en) | Single selection end SPI (Serial Peripheral Interface) master-slave multi-machine bidirectional communication method | |
| CN100524119C (en) | Programmable logic controller and expansion module interface | |
| CN100468378C (en) | SPI apparatus telecommunication circuit | |
| CN101499046A (en) | SPI equipment communication circuit | |
| CN103248526A (en) | Communication equipment and method for achieving out-of-band monitoring and management, and master-slave switching method | |
| CN101436170A (en) | SPI equipment communication circuit | |
| EP3029884A1 (en) | Commissioning method, master control board, and service board | |
| US9753886B2 (en) | Communication on an I2C bus | |
| CN105159860A (en) | Inter-integrated circuit (IIC) extended system and method | |
| CN105279130A (en) | Method for operating multiple I2C devices with same address | |
| CN103838700A (en) | Level multiplexing control serial communication device and method | |
| CN104090857A (en) | System and method for expanding peripheral interfaces of intelligent terminal | |
| CN104834620A (en) | SPI (serial peripheral interface) bus circuit, realization method and electronic equipment | |
| CN104881382A (en) | Master and slave equipment connection device and address recognition method thereof | |
| CN104933004A (en) | System and method for expanding CPU module by using SPI bus | |
| CN105260260A (en) | SPI data transmission device with data check function and data check method | |
| CN109429016A (en) | Display control program | |
| CN105786736A (en) | Method, chip and device for multi-chip cascading | |
| CN103814367A (en) | Communications assembly comprising multi-channel logic communication via physical transmission path, for serial interchip data transmission | |
| CN105373511A (en) | Device and method for simultaneous communication with multiple optical modules | |
| CN113132198B (en) | Multi-master-slave SPI (Serial peripheral interface) safety communication device and communication method | |
| CN102445981B (en) | Data transmission system and data transmission method | |
| CN107370651A (en) | A kind of communication means between SPI slaves | |
| CN107391405A (en) | Usb circuit and USB device | |
| CN113900985B (en) | IO and SPI multiplexing chip, multiplexing auxiliary chip and data interaction method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20160330 |