CN105445768B - A kind of Beidou navigation reception device and its signal processing method based on SCA - Google Patents
A kind of Beidou navigation reception device and its signal processing method based on SCA Download PDFInfo
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- CN105445768B CN105445768B CN201510932388.3A CN201510932388A CN105445768B CN 105445768 B CN105445768 B CN 105445768B CN 201510932388 A CN201510932388 A CN 201510932388A CN 105445768 B CN105445768 B CN 105445768B
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S19/00—Satellite radio beacon positioning systems; Determining position, velocity or attitude using signals transmitted by such systems
- G01S19/01—Satellite radio beacon positioning systems transmitting time-stamped messages, e.g. GPS [Global Positioning System], GLONASS [Global Orbiting Navigation Satellite System] or GALILEO
- G01S19/13—Receivers
- G01S19/35—Constructional details or hardware or software details of the signal processing chain
- G01S19/37—Hardware or software details of the signal processing chain
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S19/00—Satellite radio beacon positioning systems; Determining position, velocity or attitude using signals transmitted by such systems
- G01S19/01—Satellite radio beacon positioning systems transmitting time-stamped messages, e.g. GPS [Global Positioning System], GLONASS [Global Orbiting Navigation Satellite System] or GALILEO
- G01S19/13—Receivers
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- Radar, Positioning & Navigation (AREA)
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- General Physics & Mathematics (AREA)
- Position Fixing By Use Of Radio Waves (AREA)
Abstract
The invention discloses a kind of Beidou navigation reception device and its signal processing method based on SCA.Including antenna, receiver rf front-end board, intermediate-freuqncy signal analog input card, Base-Band Processing board, powerpc board card and X86 single board computers, the Big Dipper satellite signal of reception is input to receiver rf front-end board by antenna；Radiofrequency signal is transformed to intermediate frequency by receiver rf front-end board；Intermediate-freuqncy signal is converted into data signal by intermediate-freuqncy signal analog input card；The data signal of input is captured, tracked by Base-Band Processing board, navigator fix information is exported after pseudo range measurement and navigation calculation；Total data information is uploaded to X86 single board computers by powerpc board card；X86 single board computers transmit commands to downwards powerpc board card.The present invention realizes there is the characteristics of flexible reconfigurable configuration, upgrading renewal using the software radio general-purpose platform based on SCA.
Description
Technical field
The invention belongs to Beidou satellite navigation application field, more particularly to one kind to be based on SCA (Software
Communication architecture, software communications architecture) Beidou navigation reception device and its signal transacting side
Method.
Background technology
Beidou satellite navigation and positioning system has the GPS of independent intellectual property right just as China
Formula provides passive location, navigation, time service service to the Asian-Pacific area.Coming into operation for Beidou satellite navigation system, is greatly promoted
The applicating and exploitation of Beidou navigation receiving terminal.
The diversified Beidou navigation receiving terminal product of domestic at present many research institution's independent developments, this kind of product
Mainly the Beidou navigation receiving terminal chip based on integrated circuit is representative.Beidou navigation receiving terminal chip will navigate and receive
Base band signal process algorithm integration be cured in proprietary chip, there is small volume, the characteristics of integration is good, specificity is strong, quilt
It is widely popularized and is applied in numerous commercial market.But the base band signal process algorithm of such special chip can not upgrade more
Newly, its performance is limited on some applications.For this problem, some have versatility feature based on software wireless
The Beidou navigation receiving platform of electric (Software Defined Radio, SDR) becomes the focus studied in the field.The Big Dipper
Navigation, which receives versatility platform, can meet research staff in the case where not changing hardware platform, complete base band signal process and calculate
The improvement and performance boost of method.Wherein, the SDR general-purpose platforms based on SCA realize Beidou navigation receiving terminal and its baseband signal
Processor, there is flexible reconfigurable configuration advantage and be widely applied value.
In terms of Beidou navigation satellite system receiver research, document《The technical research of Beidou II navigation neceiver is with realizing》(2015
Year) deploy to study mainly for Beidou navigation satellite system receiver technology,《The configurable hardware of GPS/ Beidou navigation satellite system receiver grabbers is set
Meter》(2013) deploy to study mainly around Beidou navigation satellite system receiver hardware design, and above-mentioned document does not use the north based on SCA
Bucket navigation reception scheme, it is different with the present invention.Patent《Improve the device of satellite navigation terminal receiver baseband signal disposal ability
With method》、《Method and device for signal of base band of high dynamic satellite navigation receiver processing》、《Satellite navigation system base band
Signal processing system and method》Also the Software Radio Design scheme based on SCA is not directed to, without flexible reconfigurable configuration
The characteristics of, it is different with patent of the present invention.
The content of the invention
It is an object of the invention to provide a kind of with flexible reconfigurable configuration feature, the Beidou navigation based on SCA connects
Receiving apparatus.The purpose of the present invention also includes a kind of signal processing method of the Beidou navigation reception device based on SCA.
A kind of Beidou navigation reception device based on SCA, including antenna 101, receiver rf front-end board 102, intermediate frequency letter
Number analog input card 103, Base-Band Processing board 104, powerpc board card 105 and X86 single board computers 106, the covering frequence of antenna 101
Scope is 2MHz~3GHz, and the Big Dipper satellite signal of reception is input into receiver rf front-end board 102；Receiver rf front-end plate
Card 102 is sent in intermediate-freuqncy signal analog input card 103 after radiofrequency signal is transformed into intermediate frequency；Intermediate-freuqncy signal analog input card 103 is by
Frequency signal is sent in Base-Band Processing board 104 after being converted into data signal；Base-Band Processing board 104 is by the data signal of input
Captured, tracked, navigator fix information is exported after pseudo range measurement and navigation calculation to powerpc board card 105；Powerpc board
Total data information is uploaded to X86 single board computers 106 by card 105；X86 single board computers 106 transmit commands to downwards powerpc board card
105；Powerpc board card 105 sends corresponding host computer command information to Base-Band Processing board 104.
A kind of Beidou navigation reception device based on SCA of the present invention, can also include：
1st, intermediate-freuqncy signal analog input card 103 includes a crystal oscillator, a phase-locked loop pll, differential converter 1, differential conversion
Device 2, high-speed ADC 1, high-speed ADC 2 and FMC interfaces；Crystal oscillator provides 20MHz reference clock for phase-locked loop pll；Phaselocked loop
PLL output 1GHz sampling clocks are respectively supplied to high-speed ADC 1 and high-speed ADC 2；Differential converter 1 is by the single-ended conversion of intermediate-freuqncy signal
It is sent into difference output in high-speed ADC 1；The single-ended difference output that is converted into of intermediate-freuqncy signal is sent to high-speed ADC 2 by differential converter 2
In；High-speed ADC 1 and high-speed ADC 2 are sent to FMC interfaces by digital quantity is exported.
2nd, Base-Band Processing board 104 include a FMC interface, FPGA, DSP1 and DSP2, PCI Switch exchange chips,
PCIE/PCI Bridge bridging chips and standard CPCI interfaces；The numeral that FMC interfaces export intermediate-freuqncy signal analog input card 103
Amount is sent in FPGA；FPGA is communicated between DSP1 and DSP2 using Rapid-IO respectively；Pass through Hyper between DSP1 and DSP2
Link interface inter-links；Realize that host computer passes through by PCIE/PCI Bridge bridging chips 305 and PCI Switch exchange chips
The pci bus data interaction with DSP1 and DSP2 respectively.
3rd, the FPGA in base band signal process board 104 includes sampling rate conversion module, 12 BD passages, SRIO interface moulds
Block,；The data signal received is carried out sampling rate conversion by sampling rate conversion module, obtains digital output；The numeral of output
Amount, which is concurrently input in L BD passage, completes Big Dipper signal capture, tracking, pseudo range measurement, 4≤L≤12, passes through SRIO interfaces
Module output data completes navigation calculation into DSP1 and DSP2, obtains final navigator fix information.
4th, BD passages include carrier wave NCO modules, sine table module, Digital Down Converter Module, code NCO modules, pseudo-code generation
Device module, correlation intergal module, position/frame synchronization module, navigation message latch module, original observed quantity latch module, SRIO connect
Mouth mold block and capture/tracking EBI；
250MHz/12bit data signals realize 5 times of extractions, output 50MHz/12bit numerals by sampling rate conversion module
Amount is concurrently input into 12 BD passages；The 32bit FREQUENCY CONTROLs sent by DSP1 and DSP2 by capture/tracking bus
Word is input to carrier wave NCO modules, and sine table module is addressed with the carrier phase of output to export two-way orthogonal signalling I and Q；
50MHz/12bit digital quantities are input to Digital Down Converter Module with two-way orthogonal signalling I and Q, by 70MHz or 220MHz intermediate frequencies
Signal downconverts to zero intermediate frequency signals, exports two-way orthogonal signalling；Sent by DSP1 and DSP2 by capture/tracking bus
32bit frequency control words are input to a yard NCO modules, and output chips clock goes to drive pseudo- code generator, while by DSP1 and DSP2
The 15bit phase code control words sent by capture/tracking bus, which are input to pseudo- code generator, makes it produce advanced code, hysteresis
Code and i.e. time-code, and carry out correlation intergal computing with the I and Q of Digital Down Converter Module output；Correlation intergal operation result exports
In place/frame synchronization module, when meeting position/frame synchronization, obtain navigation message and be sent to navigation message latch module, while to original
Beginning observed quantity is latched, and is finally sent to navigation calculation platform with SRIO interfaces.
A kind of signal processing method of the Beidou navigation reception device based on SCA based on described in claim 1, including with
Lower step,
Step 1：Operation upper computer software operation and control interface is initialized, and configures RF parameters, is loaded bit files and is started；
Step 2：Receive Beidou satellite navigation system radiofrequency signal and changed, obtain same type of intermediate-freuqncy signal；
Step 3：Analog-digital Converter is carried out to intermediate-freuqncy signal, Base-Band Processing board is sent to by FMC interfaces；
Step 4：To after sampling digital quantity carry out sample rate conversion after be sent to 12 BD passages parallel, when capture, with
When the BD port numbers of track are 4 or more than 4, capture, tracking, pseudo range measurement and navigation calculation are completed；
Step 5：Base-Band Processing board output navigation calculation information reports to powerpc board card, and by powerpc board card
Full detail is shown to X86 single board computers.
Beneficial effect：
A kind of the Beidou navigation reception device and baseband signal processor based on SCA that the present invention announces, on the one hand solve
Beidou navigation special chip algorithm solidifies the problem of not upgradeable renewal；On the other hand by software communications architecture
(SCA) Beidou navigation is realized on software radio (SDR) unified platform and receives base band signal process algorithm, only needs to utilize
X86 single board computers and powerpc board card can easily loading application programs, having Beidou navigation reception device can flexibly weigh
Structure configures feature.
Brief description of the drawings
Fig. 1 is the Beidou navigation reception device structured flowchart of the invention based on SCA；
Fig. 2 is Beidou navigation reception device intermediate-freuqncy signal analog input card structured flowchart of the present invention；
Fig. 3 is Beidou navigation reception device Base-Band Processing board structure block diagram of the present invention；
Fig. 4 is Beidou navigation reception device Base-Band Processing board FPGA internal structure block diagrams of the present invention；
Fig. 5 is BD passages n (n=1~12) internal structure block diagram in FPGA internal structures of the present invention；
Fig. 6 is the schematic flow sheet that Beidou navigation reception device and baseband signal processor of the present invention based on SCA are implemented.
Embodiment
The present invention is described in further details below in conjunction with accompanying drawing.
It is an object of the invention to provide a kind of Beidou navigation reception device based on SCA, the device is employed based on SCA
Software radio general-purpose platform realize, enhance the reconfigurable configuration characteristic of Beidou navigation reception device.The purpose of the present invention
Also reside in and provide a kind of Beidou navigation reception device and baseband signal processor based on SCA.
The object of the present invention is achieved like this：
The present invention a kind of Beidou navigation reception device based on SCA, its form include antenna 101 (2MHz~3GHz),
Receiver rf front-end board 102, intermediate-freuqncy signal analog input card 103, Base-Band Processing board 104, powerpc board card 105 and X86 are mono-
Trigger 106.The covering frequence scope of wherein antenna 101 is 2MHz~3GHz, and the Big Dipper satellite signal of reception is input into radio frequency
Receiving front-end board 102；Receiver rf front-end board 102 is sent to intermediate-freuqncy signal after radiofrequency signal (RF) is transformed into intermediate frequency (IF)
In analog input card 103；Intermediate-freuqncy signal analog input card 103 is sent to Base-Band Processing after intermediate frequency (IF) signal is converted into data signal
In board 104；The data signal of input is captured, tracked by Base-Band Processing board 104, defeated after pseudo range measurement, navigation calculation
Go out navigator fix information to powerpc board card 105；Total data information is uploaded to X86 single board computers by powerpc board card 105
106；X86 single board computers 106 can also transmit commands to powerpc board card 105 downwards；Powerpc board card 105 is upper by corresponding to
Machine command information sends Base-Band Processing board 104 to.
The intermediate-freuqncy signal analog input card 103 of the present invention is by a crystal oscillator, a phase-locked loop pll, differential converter 1 and difference
Converter 2, high-speed ADC 1 and high-speed ADC 2, FMC interfaces composition.Wherein crystal oscillator provides 20MHz reference for phase-locked loop pll
Clock；The single-ended difference output that is converted into of intermediate frequency (IF1) signal is sent in high-speed ADC 1 by differential converter 1；Differential converter 2 will
The single-ended difference output that is converted into of intermediate frequency (IF2) signal is sent in high-speed ADC 2；High-speed ADC 1 and high-speed ADC 2 will export digital quantity
It is sent to FMC interfaces.
The Base-Band Processing board 104 of the present invention is handed over by a FMC interface, fpga chip, DSP1 and DSP2, PCI Switch
Change chip, PCIE/PCI Bridge bridging chips, standard CPCI interfaces composition.Wherein FMC interfaces are by intermediate-freuqncy signal analog input card
(Low-Voltage Differential Signaling, low-voltage are poor by the LVDS that the digital quantity of 103 outputs is carried by FPGA
Sub-signal) interface is sent in FPGA；Communicated (SRIO*4) using Rapid-IO between FPGA and DSP1, DSP2；DSP1 and DSP2
Between pass through Hyper Link interface inter-links；Pass through the PCIE/PCI Bridge bridging chips and PLX of PERICOM companies on plate
The PCI Switch exchange chips of company realize that host computer passes through pci bus and DSP1, DSP2 data interaction function.
A kind of Beidou navigation reception device baseband signal processor based on SCA of the present invention, is employed based on the soft of SCA
Part radio general-purpose platform realizes that Beidou navigation receives base band signal process algorithm, real by X86 single board computers and powerpc board card
The display of existing master operation and return data；Base band signal process board 4 is main to complete baseband signal using FPGA, DSP1 and DSP2
Big Dipper signal capture, tracking, pseudo range measurement and navigation calculation in Processing Algorithm.
Baseband signal processor core algorithm realizes that its inside mainly includes sampling rate conversion module, BD on FPGA
Passage n (n=1~12), SRIO interface modules；Wherein sampling rate conversion module is adopted the 250MHz data signals received
Sample rate converts, and obtains 50MHz digital output；The digital quantity of output is concurrently input in BD passages n (n=1~12), only
Wherein Big Dipper signal capture, tracking, pseudo range measurement can be completed by more than 4 BD passages, number is exported by SRIO interface modules
According to navigation calculation is completed into DSP, final navigator fix information is obtained；BD passages n (n=1~12) therein mainly includes
Carrier wave NCO modules, sine table module, Digital Down Converter Module, code NCO modules, pseudo-code maker module, correlation intergal mould
Block, position/frame synchronization module, navigation message latch module, original observed quantity latch module, SRIO interface modules and capture/with
Track EBI；Completed by DSP1 and DSP2 described navigation calculation part.
The intermediate-freuqncy signal analog input card 103 of the present invention is by a crystal oscillator, a phase-locked loop pll, differential converter 1 and difference
Converter 2, high-speed ADC 1 and high-speed ADC 2, FMC interfaces composition.
The Base-Band Processing board 104 of the present invention is handed over by a FMC interface, fpga chip, DSP1 and DSP2, PCI Switch
Change chip, PCIE/PCI Bridge bridging chips, standard CPCI interfaces composition.
A kind of Beidou navigation reception device baseband signal processor based on SCA, Beidou navigation reception device employ base
Realize that Beidou navigation receives base band signal process algorithm in SCA software radio general-purpose platform, by X86 single board computers and
Powerpc board card realizes the display of master operation and return data.
Base band signal process board 104 mainly completes the north in base band signal process algorithm using FPGA, DSP1 and DSP2
Struggle against signal capture, tracking, pseudo range measurement and navigation calculation.
FPGA in base band signal process board 104 mainly include sampling rate conversion module, BD passages n (n=1~
12), SRIO interface modules；Wherein the 250MHz/12bit data signals received are carried out sample rate change by sampling rate conversion module
Change, obtain 50MHz/12bit digital output；The digital quantity of output is concurrently input in BD passages n (n=1~12), only
Wherein Big Dipper signal capture, tracking, pseudo range measurement can be completed by more than 4 BD passages, number is exported by SRIO interface modules
Navigation calculation is completed according into DSP1 and DSP2, obtains final navigator fix information.
BD passages n (n=1~12) is mainly by carrier wave NCO modules, sine table module, Digital Down Converter Module, code NCO moulds
Block, pseudo-code maker module, correlation intergal module, position/frame synchronization module, navigation message latch module, original observed quantity are latched
Module, SRIO interface modules and capture/tracking EBI composition.
With reference to Fig. 1, a kind of Beidou navigation reception device based on SCA of the invention, its composition includes the (2MHz of antenna 101
~3GHz), receiver rf front-end board 102, intermediate-freuqncy signal analog input card 103, Base-Band Processing board 104, powerpc board card
105 and X86 single board computers 106.The covering frequence scope of wherein antenna 101 is 2MHz~3GHz, can meet Beidou II satellite
B1 frequencies (1561.098 ± 2.046MHz), B2 frequencies (1207.14 ± 2.046MHz), the B3 frequencies (1268.52 of navigation system
± 10.23MHz) frequency coverage；The Big Dipper satellite signal that antenna 101 receives is input to receiver rf front-end board 102, radio frequency
Receiving front-end board 102 transforms to radiofrequency signal (RF) 70MHz or 220MHz intermediate frequency (IF) signal, in wherein 70MHz
Frequency signal is corresponding with tri- kinds of bandwidth of 50kHz, 5MHz, 20MHz, and 220MHz intermediate-freuqncy signals are corresponding with two kinds of bands of 40MHz, 100MHz
Width, the selection of its bandwidth realize control selections by X86 single board computers 106；The intermediate-freuqncy signal that receiver rf front-end board 102 exports is sent
Into intermediate-freuqncy signal analog input card 103, intermediate-freuqncy signal analog input card 103 is sent into after intermediate frequency (IF) signal is converted into data signal
Into Base-Band Processing board 104；The data signal of input is captured, tracked by Base-Band Processing board 104, pseudo range measurement, is led
Boat exports navigator fix information to powerpc board card 105 after resolving；Powerpc board card 105 uploads to total data information
X86 single board computers 106；X86 single board computers 106 can also transmit commands to powerpc board card 105 downwards；Powerpc board card 105 will
Corresponding host computer command information sends Base-Band Processing board 104 to.
Fig. 2 is Beidou navigation reception device intermediate-freuqncy signal analog input card structured flowchart of the present invention.It is as shown in Fig. 2 described
Intermediate-freuqncy signal analog input card 103 is mainly turned by crystal oscillator 201, phase-locked loop pll 202, differential converter 203, high-speed ADC 204, difference
Parallel operation 205, high-speed ADC 206 and FMC207 interfaces composition.Wherein crystal oscillator 201 is that phase-locked loop pll 202 provides a 20MHz
Reference clock；Phase-locked loop pll 202 exports 1GHz sampling clocks and is respectively supplied to high-speed ADC 204 and high-speed ADC 206；Difference turns
The single-ended difference output that is converted into of intermediate frequency (IF1) signal is sent in high-speed ADC 204 by parallel operation 203；Differential converter 205 is by intermediate frequency
(IF2) the single-ended difference output that is converted into of signal is sent in high-speed ADC 206；High-speed ADC 204 and high-speed ADC 206 will export numeral
Amount is sent to FMC207 interfaces in the form of LVDS, and withdrawal device is wherein carried inside high-speed ADC 204 and high-speed ADC 206, exports four tunnels
250MHz/12bit data.
Fig. 3 is Beidou navigation reception device Base-Band Processing board structure block diagram of the present invention.As shown in figure 3, described base band
Processing board 104 mainly includes FMC interfaces 301, FPGA302, DSP303 and DSP304, PCIE/PCI Bridge bridge joint cores
Piece 305, PCI Switch exchange chips 306, standard CPCI interfaces 307.Wherein FMC interfaces 301 are by intermediate-freuqncy signal analog input card
LVDS (Low-Voltage Differential Signaling, the low electricity that the digital quantity of 103 outputs is carried by FPGA302
Pressure difference sub-signal) interface is sent in FPGA302；Communicated (SRIO* using Rapid-IO between FPGA302 and DSP303, DSP304
4)；Pass through Hyper Link interface inter-links between DSP303 and DSP304；Pass through the PCIE/PCI of PERICOM companies on plate
Bridge bridging chips 305 and the PCI Switch exchange chips 306 of PLX companies realize host computer by pci bus with
DSP303, DSP304 data interaction function.
Fig. 4 is Beidou navigation reception device Base-Band Processing board FPGA internal structure block diagrams of the present invention.As shown in figure 4, institute
Mainly include sampling rate conversion module, BD passage n (n=1 inside the Beidou navigation reception device Base-Band Processing board FPGA stated
~12), SRIO interface modules.Wherein the 250MHz/12bit data signals received are carried out sample rate by sampling rate conversion module
Conversion, obtains 50MHz/12bit digital output；The digital quantity of output is concurrently input in BD passages n (n=1~12).
It should be noted that Beidou satellite navigation system by 4 satellite position informations i.e. can be achieved positioning, as long as therefore 12 BD lead to
There are 4 or 4 can complete Big Dipper signal capture, tracking, pseudo range measurement with upper channel in road, it is defeated by SRIO interface modules
Go out data and navigation calculation is completed into DSP, you can obtain final navigator fix information.
Fig. 5 is BD passages n (n=1~12) internal structure block diagram in FPGA internal structures of the present invention.It is as shown in figure 5, described
BD passages n (n=1~12) it is main include carrier wave NCO modules, sine table module, Digital Down Converter Module, code NCO modules,
Mould is latched in pseudo-code maker module, correlation intergal module, position/frame synchronization module, navigation message latch module, original observed quantity
Block, SRIO interface modules and capture/tracking EBI.It should be noted that BD passages n (n=1~12) control word and
Phase code sends corresponding control word to each BD passage by master control DSP, and the control word and phase that each BD passage receives
Bit code is different.
With reference to Fig. 4 and Fig. 5, described base band signal process algorithm is mainly completed in FPGA, 250MHz/12bit numerals
Signal realizes 5 times of extractions by sampling rate conversion module, and output 50MHz/12bit digital quantities are concurrently input BD passage n (n
=1~12) in；Carrier wave NCO modules are input to by the DSP 32bit frequency control words sent by capture/tracking bus, with
The carrier phase of output is addressed to export two-way orthogonal signalling I (cos θ) and Q (sin θ) to sine table module；50MHz/
12bit digital quantities and two-way orthogonal signalling I (cos θ) and Q (sin θ) are input to Digital Down Converter Module, by 70MHz or
220MHz intermediate-freuqncy signals downconvert to zero intermediate frequency signals, export two-way orthogonal signalling not yet；Capture/tracking bus is passed through by DSP
The 32bit frequency control words sent are input to a yard NCO modules, and output chips clock goes to drive pseudo- code generator, while by DSP
The 15bit phase code control words sent by capture/tracking bus, which are input to pseudo- code generator, makes it produce advanced code, hysteresis
Code, i.e. time-code, and carry out correlation intergal computing with the I and Q of Digital Down Converter Module output.It should be noted that code NCO modules
Similar with carrier wave NCO modules, what both differences were carrier wave NCO outputs is the multiple sinusoidal signal of single-frequency, and is caused by code NCO
The integral multiple frequency dividing output clock signal of master clock.Correlation intergal operation result export in place/frame synchronization module, when meet position/
During frame synchronization, navigation message can be obtained and be sent to navigation message latch module, while original observed quantity can latched, and
Navigation calculation platform is finally sent to SRIO interfaces.
Fig. 6 is the schematic flow sheet that Beidou navigation reception device and baseband signal processor of the present invention based on SCA are implemented.
System architecture diagram and baseband signal processing unit separation structure block diagram, this shown in Fig. 6 with reference to shown in Fig. 1, Fig. 4 and Fig. 5 are
The flow that system is implemented mainly includes the following steps that：
Step 601：Operation upper computer software operation and control interface is initialized, and configures RF parameters, is loaded bit files and is opened
It is dynamic；
Step 602：Receive Beidou satellite navigation system radiofrequency signal and changed, obtain same type of intermediate frequency letter
Number；
Step 603：Analog-digital Converter is carried out to intermediate-freuqncy signal, Base-Band Processing board is sent to by FMC interfaces；
Step 604：12 BD passages are sent to parallel after carrying out sample rate conversion to the digital quantity after sampling, complete to catch
Obtain, track, pseudo range measurement and navigation calculation；
Step 605：Base-Band Processing board output navigation calculation information reports to powerpc board card, and by powerpc board card
Full detail is shown to X86 single board computers.
In above-mentioned steps 601, configuration RF parameters include rf frequency, intermediate-frequency bandwidth etc., and loading bit files include
Two kinds of bit files of FPGA, DSP.
In above-mentioned steps 604, the digital signals in parallel after sample rate conversion is sent in 12 BD passages, is only needed during output
Navigation calculation is carried out to the passage for wherein capturing, tracing into signal, when the BD port numbers of capture, tracking are 4 or more than 4
When, navigator fix can be realized；The wherein function such as capture, tracking, pseudo range measurement realizes that navigation calculation function exists in FPGA
Realized in DSP.
The invention provides a kind of Beidou navigation reception device and baseband signal processor based on SCA.Its composition includes
Antenna 101 (2MHz~3GHz), receiver rf front-end board 102, intermediate-freuqncy signal analog input card 103, Base-Band Processing board 104,
Powerpc board card 105 and X86 single board computers 106.The covering frequence scope of wherein antenna 101 is 2MHz~3GHz, by the north of reception
Bucket satellite-signal is input to receiver rf front-end board 102；During receiver rf front-end board 102 transforms to radiofrequency signal (RF)
Frequently it is sent to after (IF) in intermediate-freuqncy signal analog input card 103；Intermediate frequency (IF) signal is converted into numeral by intermediate-freuqncy signal analog input card 103
It is sent to after signal in Base-Band Processing board 104；The data signal of input is captured, tracked, be pseudo- by Base-Band Processing board 104
Away from output navigator fix information after measurement, navigation calculation to powerpc board card 105；Powerpc board card 105 believes total data
Breath uploads to X86 single board computers 106；X86 single board computers 106 can also transmit commands to powerpc board card 105 downwards；Powerpc board
Card 105 sends corresponding host computer command information to Base-Band Processing board 104.The Beidou navigation reception device base band of the present invention
Signal processor, realize that there is flexible reconfigurable configuration, upgrading using software radio (SDR) general-purpose platform based on SCA
The characteristics of renewal.
A kind of the Beidou navigation reception device and baseband signal processor based on SCA of the present invention, in the SDR based on SCA
Beidou navigation reception and its baseband signal processor, the design are realized on unified platform has relatively broad adaptability,
The application demand of different satellite navigation reception systems can be met, need to only utilize X86 single board computers and powerpc board card to facilitate
Ground loads corresponding application program, Beidou navigation reception device is had flexible reconfigurable configuration feature.
Claims (2)
- A kind of 1. Beidou navigation reception device based on SCA, it is characterised in that：Including antenna (101), receiver rf front-end board (102), intermediate-freuqncy signal analog input card (103), Base-Band Processing board (104), powerpc board card (105) and X86 single board computers (106), the covering frequence scope of antenna (101) is 2MHz~3GHz, and the Big Dipper satellite signal of reception is input into radio frequency reception Front end board (102)；Receiver rf front-end board (102) is sent to intermediate-freuqncy signal analog input card after radiofrequency signal is transformed into intermediate frequency (103) in；Intermediate-freuqncy signal is converted into being sent to Base-Band Processing board after data signal by intermediate-freuqncy signal analog input card (103) (104) in；The data signal of input is captured, tracked, be defeated after pseudo range measurement and navigation calculation by Base-Band Processing board (104) Go out navigator fix information to powerpc board card (105)；Total data information is uploaded to X86 veneers by powerpc board card (105) Machine (106)；X86 single board computers (106) transmit commands to powerpc board card (105) downwards；Powerpc board card (105) is by corresponding to Host computer command information sends Base-Band Processing board (104) to；Described intermediate-freuqncy signal analog input card (103) includes a crystal oscillator, a phase-locked loop pll, differential converter 1, difference and turned Parallel operation 2, high-speed ADC 1, high-speed ADC 2 and FMC interfaces；Crystal oscillator provides 20MHz reference clock for phase-locked loop pll；Lock phase Ring PLL output 1GHz sampling clocks are respectively supplied to high-speed ADC 1 and high-speed ADC 2；Differential converter 1 is by single-ended turn of intermediate-freuqncy signal Difference output is changed into be sent in high-speed ADC 1；The single-ended difference output that is converted into of intermediate-freuqncy signal is sent at a high speed by differential converter 2 In ADC2；High-speed ADC 1 and high-speed ADC 2 are sent to FMC interfaces by digital quantity is exported；Described Base-Band Processing board (104) includes a FMC interface, FPGA, DSP1 and DSP2, PCI Switch exchange cores Piece, PCIE/PCI Bridge bridging chips and standard CPCI interfaces；FMC interfaces export intermediate-freuqncy signal analog input card (103) Digital quantity is sent in FPGA；FPGA is communicated between DSP1 and DSP2 using Rapid-IO respectively；Pass through between DSP1 and DSP2 Hyper Link interface inter-links；Realized by PCIE/PCI Bridge bridging chips 305 and PCI Switch exchange chips upper Machine passes through the pci bus data interaction with DSP1 and DSP2 respectively；FPGA in described base band signal process board (104) includes sampling rate conversion module, 12 BD passages, SRIO interfaces Module；The data signal received is carried out sampling rate conversion by sampling rate conversion module, obtains digital output；The numeral of output Amount, which is concurrently input in L BD passage, completes Big Dipper signal capture, tracking, pseudo range measurement, 4≤L≤12, passes through SRIO interfaces Module output data completes navigation calculation into DSP1 and DSP2, obtains final navigator fix information；Described BD passages include carrier wave NCO modules, sine table module, Digital Down Converter Module, code NCO modules, pseudo-code generation Device module, correlation intergal module, position/frame synchronization module, navigation message latch module, original observed quantity latch module, SRIO connect Mouth mold block and capture/tracking EBI；250MHz/12bit data signals realize 5 times of extractions by sampling rate conversion module, and output 50MHz/12bit digital quantities are simultaneously It is input to capablely in 12 BD passages；The 32bit frequency control words sent by DSP1 and DSP2 by capture/tracking bus are defeated Enter to carrier wave NCO modules, sine table module is addressed with the carrier phase of output to export two-way orthogonal signalling I and Q； 50MHz/12bit digital quantities are input to Digital Down Converter Module with two-way orthogonal signalling I and Q, by 70MHz or 220MHz intermediate frequencies Signal downconverts to zero intermediate frequency signals, exports two-way orthogonal signalling；Sent by DSP1 and DSP2 by capture/tracking bus 32bit frequency control words are input to a yard NCO modules, and output chips clock goes to drive pseudo- code generator, while by DSP1 and DSP2 The 15bit phase code control words sent by capture/tracking bus, which are input to pseudo- code generator, makes it produce advanced code, hysteresis Code and i.e. time-code, and carry out correlation intergal computing with the I and Q of Digital Down Converter Module output；Correlation intergal operation result exports In place/frame synchronization module, when meeting position/frame synchronization, obtain navigation message and be sent to navigation message latch module, while to original Beginning observed quantity is latched, and is finally sent to navigation calculation platform with SRIO interfaces.
- 2. a kind of signal processing method of the Beidou navigation reception device based on SCA based on described in claim 1, its feature exist In：Comprise the following steps,Step 1：Operation upper computer software operation and control interface is initialized, and configures RF parameters, is loaded bit files and is started；Step 2：Receive Beidou satellite navigation system radiofrequency signal and changed, obtain same type of intermediate-freuqncy signal；Step 3：Analog-digital Converter is carried out to intermediate-freuqncy signal, Base-Band Processing board is sent to by FMC interfaces；Step 4：To after sampling digital quantity carry out sample rate conversion after be sent to 12 BD passages parallel, when capture, tracking When BD port numbers are 4 or more than 4, capture, tracking, pseudo range measurement and navigation calculation are completed；Step 5：Base-Band Processing board output navigation calculation information reports whole to powerpc board card, and by powerpc board card Information is shown to X86 single board computers.
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| CN106501779B (en) * | 2016-09-27 | 2019-05-21 | 哈尔滨工程大学 | A kind of software implementation LPI radar signal production method based on SCA |
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| CN107404623B (en) * | 2017-07-10 | 2020-06-23 | 中国民用航空总局第二研究所 | Remote receiver and method of multipoint positioning system based on CPCI architecture |
| CN107368443A (en) * | 2017-07-19 | 2017-11-21 | 成都普诺科技有限公司 | Four-way broadband signal gathers and playback system |
| CN111308906A (en) * | 2019-11-01 | 2020-06-19 | 北京航空航天大学 | General hardware platform for satellite navigation system simulation |
| CN112601234A (en) * | 2020-11-20 | 2021-04-02 | 中电科仪器仪表(安徽)有限公司 | Multi-core DSP-based multi-channel 5G signal demodulation device |
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