CN104052322A - 多电平逆变器 - Google Patents
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- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
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- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
- H02M7/4837—Flying capacitor converters
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
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- H—ELECTRICITY
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- H02M1/00—Details of apparatus for conversion
- H02M1/0043—Converters switched with a phase shift, i.e. interleaved
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- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
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- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
- H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
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- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
- H02M7/487—Neutral point clamped inverters
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Abstract
本发明涉及多电平逆变器。一种多电平逆变器，其具有至少两个组，每个组都包含多个低电压MOSFET晶体管；以及处理器，其被配置成切换每个组中的多个低电压MOSFET晶体管以在每个周期内进行多次切换。
Description
技术领域
本发明涉及多电平逆变器及其相关控制方法。
背景技术
尽管经过了多年的研究，但是寻找成本更有效的逆变器实现（单相或三相）的目的还远未达到。一些尝试在电路布局中使用高压开关（例如600V的IGBT），其目的在于降低切换损耗和/或减小无源部件（主要是磁性元件）的尺寸。参照例如“Multilevel inverters:A survey of Topologies,Control andApplications”。这些以降低切换损耗为目的的逆变器通常包含高压开关（例如600V的IGBT），其以大约10倍于输电线频率（50Hz）或最高达16kHz的频率进行切换。IGBT在这一频率范围的切换损耗是相当大的，并且即使在这些频率的较低端，其切换损耗也是相当大的。而且，低频率切换导致了扼流圈的成本接近或超过逆变器的总成本的20%。可选择的研究已经寻求使用更先进的开关技术（例如碳化硅和/或氮化镓）来提高频率并且减小无源部件的尺寸。这一研究也可以在一定程度上降低切换损耗，但却仅仅是以先进的开关技术的高成本为代价而取得的。尽管进行了扩展研究，但是这些逆变器的电路布局仅仅提供了有限的改进，而不能达到成本降低和高效逆变器技术所需要的效率的目的。
目前仍存在对低成本、高效率的逆变器技术的需求。
发明内容
下面的概述仅仅出于说明性的目的，而不是旨在对本文的详细描述进行限制或约束。
本文的实施方式可以采用带有专门的控制系统的多电平逆变器（例如单相和/或三相逆变器），所述专门的控制系统使具有高效率、低成本的逆变器成为可能。在本文讨论的一些实施方式中，多电平逆变器可以用在逆变器的输出（滤波之前）具有多个电压等级的情况中，从而减小了逆变器的磁性元件上的应力，并且改善了输出电压波形，这样允许切换频率的进一步降低。
在本文描述的示例性的多电平逆变器（单相或三相）中，控制系统允许使用低电压（例如80V）MOSFET以产生等价的高电压开关（例如，使用6个80V的MOSFET能产生等价的480V开关）。低电压切换多电平逆变器的导通特性和切换特性比其他的多电平逆变器实现方式有实质上和意料不到的改善。在这些实施方式中，通过错开低电压MOSFET的接通和断开，可以对每个多电平开关使用较低频率调制，例如，每个MOSFET能以中等频率（例如200kHz）进行切换，同时保持了比其他开关技术低的切换损耗，并且获得了200kHz*N的有效频率的好处，其中N是串接的时间上错开的开关数目，从而根据实际扩展频率减小了无源部件的尺寸要求。在一些实施方式中，MOSFET能根据占空比按错开的时间（其可以或可以不根据正弦波变化）切换，例如，其中每个MOSFET都被移了1/6的切换周期（例如使用6个串接的MOSFET）。
根据本文讨论的实施方式，除了本文所讨论的关于导通损耗和切换损耗方面的优点之外，这些例子还提供了比如减少了无源部件（例如，主扼流圈磁性元件和/或输出滤波器）的其他重要优点。例如，由于多电平电压和低成本MOSFET开关的使用，可以实现部件尺寸和/或成本减小N（例如该例子中的6）倍。另外，本文所讨论的示例性的实施方式可以在主扼流圈中获得可能是切换频率的N倍（例如该例子中的6*200kHz）的有效频率。因此，在这些实施方式中，主扼流圈可能比标准设计小了N^2（例如36）倍。在本文讨论的实施方式中，例如，相对于使用16kHz切换频率的标准的基于IGBT的逆变器系统，主扼流圈的尺寸的总增益倍数可能是200kHz/16kHz*36=450，这使得扼流圈的成本变得如此低廉以至于在本文讨论的多电平逆变器的例子中这几乎可以忽略不计。可以对输出滤波器进行相似的计算，并且能够表明在成本降低和效率提高方面的更大的优势。
如上所述，该概述仅仅是对本文描述的一些特征的总结。其不是排他性的，且不对权利要求进行限制。
附图说明
结合下面的详细描述、权利要求、以及附图，本公开的这些和其他的特征、方面、以及优点将变得更好理解。本公开以示例的方式进行示出，但是不受附图的限制，在这些附图中相似的标记表示相似的元件。
图1示出了与本文的实施方式一致的示例的多电平逆变器。
图2示出了用来控制与本文的实施方式一致的多电平逆变器的算法。
图3示出了用于本文的实施方式的示例性控制。
图4示出了与本文的实施方式一致的多电平逆变器的另一个例子。
图5示出了与本文的实施方式一致的多电平逆变器的又一个例子。
具体实施方式
在下面的多个示例性实施方式的描述中，对附图做了参考，这些附图构成了本文的一部分，并且在附图中以图示的方式示出了在其中可以实践本公开的方面的多个实施方式。需要了解的是，也可以使用其他的实施方式并且可以做出结构和功能上的改变，而没有背离本公开的范围。
参照图1，示例性的多电平逆变器包括一个、两个、或多于两个的并行连接，其中每个并行连接包括跨接DC电压布置的多个不同的开关。这些开关可以耦合到可以用来平滑逆变器的AC输出的正弦波的多个电容器和/或电感器。例如，多个开关组S1A-S6A、S6B-S1B、S1C-S6C和/或S6D-S1D可以被布置在如图1中示出的任何合适的结构中。每个MOSFET晶体管组都可以可变地配置成包含两个、三个、四个、五个、六个、七个、八个、九个、十个、十一个、十二个、或多于十二个的晶体管。参照图2，每个开关都可以由来自处理器10（例如，逻辑、一个或多个处理器、控制、状态机、控制器、微处理器、软件驱动控制、门阵列、和/或其他的控制器）的输出控制。在这个实施方式中，开关组A包含一系列例如彼此以源到漏极配置结构连接在一起的FET晶体管S1A-S6A（例如，20v、40v、60v、80v、100v、120v的MOSFET晶体管）以构成第一开关组；开关组B包含一系列例如彼此以源到漏极配置结构连接在一起的FET晶体管S1B-S6B（例如，20v、40v、60v、80v、100v、120v的MOSFET晶体管）以构成第二开关组；开关组C包含一系列例如彼此以源到漏极配置结构连接在一起的FET晶体管S1C-S6C（例如，20v、40v、60v、80v、100v、120v的MOSFET晶体管）以构成第三开关组；开关组D包含一系列例如彼此以源到漏极配置结构连接在一起的FET晶体管S1D-S6D（例如，20v、40v、60v、80v、100v、120v的MOSFET晶体管）以构成第四开关组。虽然在这个例子中每个开关组都使用了6个80伏的FET晶体管，但是也可以使用多于6个或少于6个的利用例如20v、40v、60v、80v、100v、120v的不同电压的晶体管。例如，当每个开关组都使用12个晶体管时，跨过这些晶体管的电压可以被调整至比如40伏的合适的电压，并且在一个周期内的晶体管的切换频率可以从例如仅使用6个晶体管的例子的晶体管切换频率提高（例如，以两倍的速率切换每个晶体管）。
参照图2，每个MOSFET可以被控制成使用高频率（例如，在这个例子中是大约200kHz）进行切换，同时仍然具有相对于其他的开关技术的低切换损耗。如在图2中示出的，对于这个例子，MOSFET根据占空比（其根据正弦波变化）以下面的简单方式（针对6个串接的MOSFET示出）进行切换，其中每个MOSFET被移了1/6个切换周期。
除了上面讨论的导通损耗和切换损耗方面的优点，图1-图2中示出的实施方式的另一个很大的好处是减小了无源部件（例如，主扼流圈和输出滤波器的尺寸）。由于多电平电压，在尺寸/成本上可以减少N（例如，在这个例子中是6）倍。此外，在主扼流圈中的有效频率是切换频率的N倍（例如，在这个例子中是6*200kHz）。与这个例子一致的实施方式的结果是主扼流圈相对于使用200kHz的标准设计能减小N^2（例如36）倍。因为普通的逆变器由于受到了600V开关的限制，它们使用非常低的切换频率（例如，16kHz），所以主扼流圈尺寸上的总增益是200kHz/16kHz*36=450，这使得其是不可忽略的，而在标准逆变器中其相当于逆变器的尺寸和成本的约20%。可以对输出滤波器进行类似的计算，并可以显示出更大的优势。
本发明的实施方式以较高的频率（例如，50kHz、100kHz、150kHz、200kHz、250kHz、300kHz、或更高的频率）进行切换，并且其中这些开关被修改的方式根据例如图2。与这里的例子中的逆变器一致的增益获得了n的平方倍。这一不同寻常的结果是部分地通过每次仅切换一个部件而不是在一个周期中切换所有的部件获得的。使用低电压MOSFET，可能在同一个输出电压周期中切换所有的开关，同时仍然获得相对低的切换损耗，这允许了另外的增益和效率。
通常，逆变器的尺寸和成本的大约20%都涉及主扼流圈。在本文描述的实施方式中，例如，通过将频率提高15kHz并将开关的数目增加到6个可以产生由于多电平部件带来的额外的36倍增益。在这些实施方式中，主扼流圈的成本可以低到整个逆变器成本的百分之一或更低。此外，因为本文描述的切换方法，逆变器将更加高效，而且产生的输出电压也将更好，这也获得了相当的效率。这意味着封装和逆变器可以在尺寸上更小，并且因此可以使用更小且更便宜的封装。封装的尺寸和成本的减少的原因在于主扼流圈的减小和滤波器的减小，还在于提高的效率，这提供了更小且更紧凑的封装。
图2中示出的控制已经证明比传统的控制电路具有更高的效率。例如，图2中示出的控制允许开关S1A-S6A、S6B-S1B、S1C-S6C、以及S6D-S1D全部都在一个周期内切换，在这个实施方式中，一组中的开关的切换如图2中示出的进行偏移。在这些实施方式中，这些开关比其他控制机制的工作频率高6倍。
参照图1，逆变器通常由在逆变器的两边的对称的两半构成。在图1的实施方式中，存在4个6开关组，这24个开关中的每一个都工作在较低的电压（例如，80V）和较高的频率（例如，200kHz）。更高的频率切换允许在一个周期对每组中的每个开关（例如，所有的6个开关）进行交错的切换，这比传统调制器快6倍。
至于电压，当绝对电压大约是350V（其可以是从比如一组太阳能板的DC源接收到的电压），这一电压可以被用来产生例如230V的AC电压。当每组中的开关元件耦合到电容器C1-C5和C6-C10时，可以通过切换操作使得跨过开关组A和B、以及开关组C和D的电压叠加成这个例子中的接近350V。因为电压被分配到每个开关/电容器组合上，所以跨过任何一个开关的电压可以远低于350V，因此，这些开关的电压能够小很多（例如，350除以6或大约60V）。可以使这一电压更低和/或更高，这取决于每组中的开关数目。
参照图2，这些开关可以被配置成在同一个周期内对所有的开关进行切换操作。例如，这些开关可以以比如200kHz的频率进行切换操作。这允许每个开关在比如1/200kHz或大约5毫秒的预定的期间内“导通”，在这段时间中每个开关都被接通和断开。在传统的多电平逆变器中，在16kHz对应的一个周期中仅对一个开关进行切换操作。然而，在本文描述的实施方式中，低电压MOSFET可以以高得多的速率（例如，200kHz）切换，并且还可以在同一个周期内对一组中的所有开关都进行切换操作。这个例子有效地将速度提高到了切换期间的6倍，而实际上并没有提高切换频率。此外，所述设计是可扩缩的，因为通过向开关组中添加更多的晶体管可以将其速度提高得越来越多；每组中的多电平开关允许切换频率的提高而无需更快地驱动MOSFET（例如，快6倍）。
本文的例子中的多电平逆变器的优点在于，设计者可以根据每个开关组中串接的MOSFET的数目进行快6倍、8倍、10倍、12倍、或更多倍的切换操作。与特定的实施方式有关的一个优点是，可通过在同一个周期内对所有MOSFET进行切换操作而无需实际上以比最初的速度更快的速度对任何一个MOSFET进行切换来以快6倍、8倍、10倍、12倍、或更多倍的速度进行切换。这是如今的逆变器所无法获取的结构优点，因为传统设计的切换能力不能达到这种结果。通过将控制开关控制为根据图2来操作，可高效地对多电平逆变器进行超级充电以在同一个周期时间内切换所有的开关并以此获取例如高6倍的有效频率而无需实际以更高的频率切换任何开关（例如，MOSFET）。
因为根据本文的实施方式的更高的切换频率，除了扼流圈变得更小之外，在开关之间的电容器也将会更小。这是尺寸和成本减少的一部分。此外，电感器L1和L2也被制作得更小。总之，通过工作在更高的频率，许多部件的尺寸都缩小了，缩小的程度也提高36倍。
再次参照图2-图3，到S1A-S6A的控制与到开关S1B-S6B的控制输入是反相的（例如，当S1A闭合时，S1B断开）。对于开关S1C-S6C，到这些开关的控制输入与到开关S1A-S6A的控制输入是反相的（例如，当S1A闭合时，S1C断开）。对于开关S1D-S6D，这些开关具有与开关S1A-S6A的控制输入相同的控制输入（例如，当S1A闭合时，S1D闭合）。尽管处理器需要控制24个开关，但是因为组A和组D接收同样的6个控制信号且组B和组C接收反相的6个控制信号，这就可能仅仅使用6个输出控制信号分别输入到S1A-S6A和S1D-S6D中的每个，并且将这6个控制信号的反相信号输入到S1B-S6B和S1C-S6C。
在这些实施方式中，S1C-S6C相对于控制信号是反相的而S1D-S6D相对于控制信号不是反相的。此外，S1A-S6A不是反相的而S1B-S6B是反相的。因此，可以仅仅使用来自处理器的6个不同的控制输出来控制24个开关。参见例如图3中示出的示例性的控制结构。
还可以采用多种可选择的实施方式。例如，参照图4，示出了可选择的实施方式，其包括单支路（leg）多电平MOSFET，该单支路多电平MOSFET可以被配置成通过在正弦波周期中执行DC-DC操作（降压型（buck））来产生整流的正弦波。在这个实施方式中，该支路的输出可以通过工作在输电线频率（50Hz）的低频率全桥进行反相。
利用这种变型，在高频率时的切换损耗相对于全桥实现方式减少了2倍，并且导通损耗是单个多电平支路结构和慢切换全桥的结合。可通过使用改进部件（例如，超结MOSFET或低电压MOSFET的串联堆叠）来减少慢切换全桥的导通损耗而没有增加由低切换频率引起的切换损耗。
这种变型的另一个好处是，部件成本可以被进一步降低，这是因为仅有一个多电平支路，并且所有驱动器和平衡电容及全桥部件可以制造得比另一个多电平支路的成本更低。
再次参照图4，高频级的输出是整流的正弦波（例如，当正弦波为正时其为正，当正弦波为负时其还为正）。高频级可以被配置成产生正弦波，但是其始终是正的。低频级将整流的正弦波转换成正的和负的，以产生真正的正弦波。低频级可以被配置成在需要时对信号进行反转。在这个实施方式中，低频级具有多个开关（比如4个开关S10、S11、S12、S13）。在这个例子中，正弦波的正周期可以通过使左上方的S10和右下方的S11切换到接通位置来获得。当处理该信号的另外的半个周期时，控制可以在另一个对角线上（例如右上方的S12和左下方的S13）接通，以反转信号，从而使正弦波完整。这些开关可以通过比如图3中示出的处理器10来控制。
将MOSFET用于第一高频级，并如本文中讨论的方式进行控制以对整流的正弦波进行整形是本发明的另一个例子。在图4的实施方式中仅仅使用16个开关（相对于图1的24个开关）就能够获得上面关于图1-图3所讨论的优点。因此，可以获得更大的优势且能够进一步减少成本和部件。
在图5中示出了又一个实施方式。在图5的实施方式中，S1G-S6G和S6H-S1H以及C17-C22如上面关于图1-图3所讨论的进行操作。在这个实施方式中，单相逆变器在逆变器的输入处增加了另外的多电平支路。或者说，图5的电路可以替换图1中的C1并且可以被跨接在350V输入上。所述另外的支路可以被配置成用来在DC链路电容器（C17）和存储电容器（C23）之间转移电容电荷，以补偿低频脉冲波动（比如大约100Hz的低频脉冲）。因为存储电容器可以被配置成随着满电压摆幅一起波动，所以与C1的原始尺寸相比，它的尺寸也能被显著地减小。C17的尺寸可以非常小。
当使用所示出的带有低电压MOSFET的多电平电路布局来实现用于减小DC链路电容器C17的这种类型的解决方案时，是非常有效的（0.2%的损耗），并且因而同时减少了尺寸和成本而没有对性能造成很大的影响。
在图5中，在输入位置处的电容器C17经历了输出电力和输入电力之间的差异。输入电力是DC而输出电力是AC。输出电力是波动的而DC电力并不波动，这是因为其是直流电力。一些电容器吸收由于正弦波波动引起的过多的/不足的电力。通常，在这样的逆变器上的输入电容器非常大，并且其成本可能是逆变器成本的10%。对于图5中示出的实施方式，并未采用非常大的电容器C17，使用该实施方式，由于本文中所讨论的低功率MOSFET和控制切换电路布局，C17可以非常小，并且实际上进行C17和C23之间的DC到DC的转换。例如，每当在AC侧存在很多电力时，那么C17需要提供更多的电力，那么它将从C23中汲取电力，并且每当在DC侧存在很多电力时，那么C17将过多的电力提供给C23。因此，一切都在C17和C23之间来回传递。但是最终它会补偿DC电力和AC电力之间的差异。通过使用本文讨论的带有相关控制的低电压多电平部件的技术，多个实施方式获得了减小逆变器的输入处的电容器的能力。
在又一个实施方式中，图1的电容器C1可以被替换为图5中示出的电路。类似地，图4的电容器C11可以被替换成图5中示出的电路。一些实施方式没有采用如例子中可能有的电容器C1和/或C11，而可能将这些电容替换为图5中的电路。通过这些例子，修改后的图1现在将具有36个MOSFET（相对于之前的24个MOSFET），但是不再使用非常大的电容器C1。类似地，对于其中对图4进行修改的例子，电路将具有24个MOSFET（相对于之前的12个MOSFET），但是不再使用大电容器C11。因此，图5中示出的电路可以作为图1的左手边上的电容器（C1）的替代物，和/或可以作为在图4的左手边上示出的电容器（C11）的替代物。
在又一个实施方式中，比如三相实施方式中，可能存在多个MOSFET晶体管组。例如，参照图1，可能存在另外的MOSFET晶体管组S1E-S6E和S1F-S6F以及相关的电容器。这些MOSFET晶体管能够按照与本文讨论的其他的支路和晶体管组相同的方式进行控制。在这个例子中，代替采用图1中示出的仅仅两个支路（左侧上的一个支路和右侧上的一个支路），设计者可以采用类似布置的三个支路。
虽然在上面讨论了示例性实施方式，但是根据具体的结果和/或具体应用，可以用任何期望的方式对各个特征和步骤进行合并、分离、省略、和/或增强。对于本领域的技术人员来说，将很容易产生各种变更、修改、以及改进。这些变更、修改、以及改进通过本公开变得更清楚，尽管在本文中没有特别说明，但却是本说明书的一部分，并且旨在落入本公开的精神和范围之内。因此，上面的说明仅仅是示例，而不是限制。本专利仅仅由所附的权利要求的内容及其等价内容限定。
Claims (20)
1.一种方法，包括：
在不同的时间切换包括至少一组MOSFET晶体管的多电平逆变器中的第一组中串接的多个低电压MOSFET晶体管中的每一个。
2.如权利要求1所述的方法，其中对所述第一组的切换包括在不同的时间对多于三个低电压MOSFET晶体管进行切换。
3.如权利要求1所述的方法，其中在不同的时间切换所述多个低电压MOSFET晶体管中的每一个包括：
以在所述第一组中关断一个晶体管和接通另一个低电压MOSFET晶体管之间的时间延迟来接通该组中的任何一个低电压MOSFET晶体管。
4.如权利要求1所述的方法，其中所述切换对于每个晶体管以大约200kHz的周期时间发生。
5.如权利要求1所述的方法，其中所述多电平逆变器包括四组低电压MOSFET晶体管，所述第一组与第二组串联连接，第三组与第四组串联连接，并且所述第一组和所述第二组与所述第三组和所述第四组并联，并且
其中所述方法还包括：
提供第一控制信号来切换所述第一组的晶体管和所述第四组的晶体管；以及
提供反相的第一控制信号，所述反相的第一控制信号包含所述第一控制信号的反相形式，以切换所述第二组的晶体管和所述第三组的晶体管。
6.一种装置，包括：
多电平逆变器，所述多电平逆变器包括：
至少两个组，其中第一组和第二组在输入电压和参考电压之间串联连接，并且每个组都包含串联连接的多个低电压MOSFET晶体管；以及
多个电容器，所述电容器中的每一个连接在所述第一组的两个相邻的晶体管和所述第二组的两个相邻的晶体管之间；以及
控制器，其配置成控制每个组中的低电压MOSFET晶体管以在每个周期中进行多次切换。
7.如权利要求6所述的装置，其中第一组与第二组串联连接以形成高频级，
其中第三组和与所述第三组并联的第四组形成低频级，其中所述第三组和所述第四组以并联方式通过电感器耦合到所述第二组，并且
其中所述控制器被配置成：
利用多个第一控制信号切换所述第一组的MOSFET晶体管；
利用多个反相的第一控制信号切换所述第二组的MOSFET晶体管；以及
切换所述第三组和所述第四组的MOSFET晶体管。
8.如权利要求7所述的装置，其中所述控制器被配置成以大约200kHz的周期频率切换所述第一组和所述第二组的每个MOSFET晶体管，并且以大约50Hz的周期频率切换所述第三组和所述第四组的每个MOSFET晶体管。
9.如权利要求6所述的装置，其中所述第一组包含数目为N的串联连接的低电压MOSFET晶体管，并且所述第二组包含数目为N的低电压MOSFET晶体管。
10.如权利要求8所述的装置，其中所述控制器被配置成提供N个控制信号以在不同的时间将每个组的晶体管切换为导通。
11.如权利要求6所述的装置，其中所述控制器被配置成以大约200kHz的周期频率切换每个晶体管。
12.如权利要求6所述的装置，其中所述多电平逆变器包含彼此串联连接的第三组和第四组，其中所述第三组和所述第四组与所述第一组和所述第二组并联。
13.如权利要求12所述的装置，其中所述控制器被配置成向所述第一组的第一晶体管和所述第四组的第一晶体管发送第一控制信号，并且向所述第二组的第一晶体管和所述第三组的第一晶体管发送所述第一控制信号的反相形式。
14.如权利要求11所述的装置，其中所述低电压MOSFET晶体管工作在80V。
15.如权利要求11所述的装置，其中所述控制器被配置成在不同的时刻切换在所述多电平逆变器的每个组内的低电压MOSFET晶体管。
16.如权利要求15所述的装置，其中所述控制器被配置成以在第一组中关断一个晶体管和接通另一个低电压MOSFET晶体管之间的时间延迟来接通所述第一组中的任何一个低电压MOSFET晶体管。
17.一种多电平逆变器，包括：
串联连接的第一组多个低电压MOSFET晶体管；
串联连接的第二组多个低电压MOSFET晶体管，其中所述第一组与所述第二组串联连接，而且所述第一组与所述第二组各自包含第一数目的晶体管；以及
多个电容器，其中每个电容器连接在所述第一组的两个相邻的晶体管和所述第二组的两个相邻的晶体管之间。
18.如权利要求17所述的多电平逆变器，其中所述低电压MOSFET晶体管工作在80V。
19.如权利要求17所述的多电平逆变器，还包括：
串联连接的第三组多个低电压MOSFET晶体管；以及
串联连接的第四组多个低电压MOSFET晶体管，
其中所述第三组与所述第四组串联连接，
其中所述第三组与所述第四组被连接在所述第一组的最前面的两个晶体管与所述第二组的最后面的两个晶体管之间。
20.如权利要求17所述的多电平逆变器，还包括：
串联连接的第三组多个低电压MOSFET晶体管；以及
串联连接的第四组多个低电压MOSFET晶体管，
其中所述第三组与所述第四组串联连接，
其中所述第一组是高频级且所述MOSFET晶体管接收来自所述控制器的多个第一控制信号，
其中所述第二组是低频级且所述MOSFET晶体管接收来自所述控制器的多个反相的第一控制信号，并且
其中所述第三组和所述第四组与所述第一组和所述第二组并联。
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| EP2779410A2 (en) | 2014-09-17 |
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| CN114928262A (zh) | 2022-08-19 |
| US9941813B2 (en) | 2018-04-10 |
| CN110601577A (zh) | 2019-12-20 |
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