CN103645999A

CN103645999A - FPGA-based high-speed board card for achieving eight-channel receiving and transmitting serial ports

Info

Publication number: CN103645999A
Application number: CN201310668384.XA
Authority: CN
Inventors: 张鹏泉; 李羚梅; 曹晓冬; 马彪; 李柬; 范玉进; 褚孝鹏; 夏爽; 张波
Original assignee: Tianjin Optical Electrical Communication Technology Co Ltd
Current assignee: Tianjin Optical Electrical Communication Technology Co Ltd
Priority date: 2013-12-07
Filing date: 2013-12-07
Publication date: 2014-03-19

Abstract

The invention relates to an FPGA-based high-speed board card for achieving eight-channel receiving and transmitting serial ports. The board card comprises a PCIE connector and an FPGA chip, wherein the FPGA chip comprises a PCIEIP nuclear circuit, a CDMA unit, a transmission control unit and a peripheral interface unit control module, the PCIE connector is in two-way connection with the PCIEIP nuclear circuit through eight pairs of differential serial ports used for receiving signals, eight pairs of differential ports used for transmitting signals, a PCI-E interface used for referring to differential clock signals and a power source, the PCIEIP nuclear circuit is in two-way connection with the CDMA unit, the CDMA unit is in two-way connection with the transmission control unit, and the transmission control unit is in two-way connection with a peripheral interface. An upper computer is connected with the FPGA-based PCI-EX8 high-speed board card, and therefore not only can the upper computer transmit signal instructions of peripheral equipment at high speed, but also the signal instructions can be fast fed back to a master control upper computer through the peripheral equipment.

Description

Based on FPGA, realize the high speed board of 8 passage transmitting-receiving serial ports

Technical field

The present invention relates to communication, measuring and controlling equipment, particularly a kind of high speed board of realizing 8 passage transmitting-receiving serial ports based on FPGA.

Background technology

At present, along with the development of the communication technology, between each circuit board of communication, measuring and controlling equipment circuit, the communication between device is more and more, thereby require also more and more higher to plate level communication speed.PCI express high-speed serial bus technology is to be applied to computing machine and the interconnected third generation technology of communications field peripherals.In computer realm, first generation bussing technique comprises ISA, EISA and VESA, and second generation bussing technique comprises PCI, AGP and PCI-X.The demand of the aspects such as the security of the storage speed of the communication of current communication, measuring and controlling equipment circuit, memory capacity, information, restorability has had higher requirement to traditional digital data recording system.

Summary of the invention

In view of the demand that between each circuit board of communication, measuring and controlling equipment circuit, communication proposes high speed board, the invention provides a kind of high speed board of realizing 8 passage transmitting-receiving serial ports based on FPGA.The design is directly connected the high speed board of 8 passage transmitting-receiving serial ports by FPGA, meet the requirement of PCI Express1.1 consensus standard, unidirectional maximum digit rate 2.5Gbps, and * 8 theories can be supported maximum transmission bandwidth 200MB/s * 8, i.e. 1.6GB/s.

What during PCI Express bus, adopt is low-voltage differential signal (LVDS) technology, and it is the differential signal technology of a kind of low-voltage, the little amplitude of oscillation, can realize connection point-to-point or a point-to-multipoint.Because it has adopted differential mode, transmit data, so there be the common mode noise rejection ability stronger than single-ended transmission mode, also there is low-power consumption, low error rate, low crosstalking and the feature such as low radiation simultaneously.PCI-E high speed board based on FPGA, has good hardware platform adaptability; Fpga chip design should adopt the design of standard hardware descriptive language, and driver should adopt the portability of standard C language design, is suitable for the application such as networking, server and terminal high-speed transmission.

The present invention realizes by such technical scheme: a kind of high speed board of realizing 8 passage transmitting-receiving serial ports based on FPGA, it is characterized in that: comprise PCIE connector and fpga chip, fpga chip comprises PCIE IP kernel circuit, CDMA unit, transmission control unit and peripheral interface units control module, wherein: PCIE connector is connected with host computer is two-way, PCIE connector is by for receiving 8 pairs of difference serial ports of signal, 8 pairs of difference serial ports for transmitted signal, for the PCI-E interface of reference difference clock signal and power supply respectively with two-way connection of PCIE IP kernel circuit of fpga chip inside, PCIE IP kernel circuit is connected with CDMA unit is two-way, CDMA unit is connected with transmission control unit is two-way, transmission control unit is connected with peripheral interface is two-way.

Advantage of the present invention and beneficial effect are, all host computers such as the networking in communication system, server and terminal are linked by the PCI-E X8 High-Speed-Board based on FPGA and connect, both can complete the signal instruction high-speed transfer of host computer to peripherals, also can feed back to rapidly master control host computer by peripherals.In the system with PCI Express1.1 bus communication, by adopt the present invention in main equipment, can greatly improve the communication speed of host computer and peripherals.

Accompanying drawing explanation

Fig. 1. be the overall catenation principle schematic diagram of the present invention;

Fig. 2 is PCI-E interface principle figure of the present invention.

Embodiment

For clearer understanding invention, describe in detail in conjunction with the accompanying drawings and embodiments:

See figures.1.and.2, a kind of high speed board of realizing 8 passage transmitting-receiving serial ports based on FPGA is for the host computer of communication system and the communication between board, host computer is connected to a FPGA by high-speed parallel port, through driving the PCI-E IP kernel circuit of FPGA inside, through CDMA unit, transmission control unit and peripheral interface units control module communicate by letter with peripheral bus realization by expansion mouthful, completes the communication function of PCI-E X8 high speed board.

Between host computer and FPGA, adopt PCI-E bus to communicate, there is the serial communication ability of 8 passages; According to the requirement of PCI Express1.1 consensus standard, the serial communication between host computer of the present invention and FPGA adopts as gives a definition:

RX_P0-P7/N0-N7:8 receives signal to difference serial ports;

TX_P0-P7/N0-N7:8 is to difference serial ports transmitted signal;

REFCLK_P/N:PCI-E interface reference difference clock signal;

PERST#: power supply is ready to signal.

The PCI-E port of FPGA expansion need to be 1.2V PCML level mode by the lever selection of corresponding pin when FPGA port arrangement.

Two large class registers are set in FPGA to be realized between host computer and FPGA mutual.

The major function of PCI-E connector is to realize the high speed serialization differential interface of FPGA in PCI-E interface module and the physical connection between general industry control platform/generic server, and connecting link need to meet the demand of related electric standard.

The major function of PCI-E IP kernel is to realize PCI-E protocol stack, safeguards the high speed data transfer on PCI-E link.FPGA in technical scheme adopts the EP2SGX30DF780I4N chip in the Stratix II GX of ALTERA company family chip, by consuming the mode of FPGA own resource, with soft examining, showed the PCI-E protocol stack that comprises Physical layer, data link layer and transport layer, transmission bandwidth is PCI-E * 8, the regulation that meets < < PCI Express Base Specification 1.0a or 1.1. > >, its transport layer interface adopts Avalon-ST serial line interface.

CDMA is Chaining DMA(chain type DMA) abbreviation, the major function of this unit is to realize the random length exchanges data between board internal storage space and upper PC storage space by PCI-E link.The transmission direction of swap data, transport address and transmission length are formulated by upper PC or board, but the process of exchange is to be initiated by PC, the CDMA unit in board is carried out.

The major function of transmission control unit has been the Data Transmission Controlling between PICE interface module internal memory and peripheral interface units.When data, take peripheral interface units during as target, according to the content driven internal memory in data transmit control register, read, and form and send datagram; When data save as target in PCIE interface module, according to the content of resolution data message, fill in data receiver control register, and drive internal memory to write.

The major function of peripheral interface units control module, according to read write command, be take data message as unit reception or sends datagram.Peripheral interface units control module is for realizing communicating by letter of FPGA and peripheral bus.

According to the above description, in conjunction with art technology, can realize the solution of the present invention.

Claims

1. based on FPGA, realize the high speed board that 8 passages are received and dispatched serial ports for one kind, it is characterized in that: comprise PCIE connector and fpga chip, fpga chip comprises PCIE IP kernel circuit, CDMA unit, transmission control unit and peripheral interface units control module, wherein: PCIE connector is connected with host computer is two-way, PCIE connector is by for receiving 8 pairs of difference serial ports of signal, 8 pairs of difference serial ports for transmitted signal, for the PCI-E interface of reference difference clock signal and power supply respectively with two-way connection of PCIE IP kernel circuit of fpga chip inside, PCIE IP kernel circuit is connected with CDMA unit is two-way, CDMA unit is connected with transmission control unit is two-way, transmission control unit is connected with peripheral interface is two-way.