CN103116512A - Method for upgrading firmware of CPLD (complex programmable logic device) - Google Patents
Method for upgrading firmware of CPLD (complex programmable logic device) Download PDFInfo
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- CN103116512A CN103116512A CN2013100591191A CN201310059119A CN103116512A CN 103116512 A CN103116512 A CN 103116512A CN 2013100591191 A CN2013100591191 A CN 2013100591191A CN 201310059119 A CN201310059119 A CN 201310059119A CN 103116512 A CN103116512 A CN 103116512A
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Abstract
The invention discloses a method for upgrading firmware of a CPLD (complex programmable logic device). The method is implemented by a programming device. The programming device comprises an embedded processor, at least one USB (universal serial bus) interface, a JTAG (joint test action group) port, two metal programming probes, a memory and a rechargeable battery, and the metal programming probes are connected with GPIO (general purpose input/output) ports of the embedded processor and are used for being in point connection with pins of the CPLD manually, so that a function of connecting clock signals with data signals is realized. The method includes enabling the target board processor to set the CPLD in a to-be-burnt programmable state; storing an upgrade file in the programming device via the USB interfaces; respectively butting the two metal programming probes to the pin CLK and the pin DATA of a target board; judging whether the programming device is correctly connected or not and matching equipment with the programming device; and transmitting the upgrade file to the CPLD to upgrade the firmware if the programming device is correctly connected.
Description
Technical field
The invention belongs to field of embedded technology, particularly a kind of method of CPLD firmware upgrade.
Background technology
Society is the society of a digitizing and digital integrated circuit widespread use.Digital integrated circuit is originally in constantly updating.It by early stage electron tube, transistor, little medium scale integration (MSI), develop into VLSI (very large scale integrated circuit) (VLSIC is more than several ten thousand) and many special ICs with specific function.But along with the development of microelectric technique, design is not exclusively independently born by semiconductor manufacturer with the task of manufacturing integration circuit.System designers more are ready own design specialized integrated circuit (ASIC) chip, and the design cycle of wishing ASIC is short as far as possible, preferably under lab just can design suitable asic chip, and drop into immediately among practical application, thereby field programmable logic device (FPLD), the wherein most widely used CPLD (CPLD) that surely belongs to appearred.But because the function of product not only will satisfy user's demand, also will accelerate the research and development speed of product, seize as early as possible market, this just need in the situation that hardware does not change very much, realize more logic function by the CPLD firmware upgrade.
The method that present prior art is carried out the CPLD firmware upgrade mainly contains following 2 kinds:
1.ISP online upgrading
Advantage: can be by the JTAG10 CPLD that upgrades, simple and convenient.
Shortcoming: because circuit board must have the JTAG mouth, not only increased cost, and field upgrade must be with downloading wire and download tool.
2. use fever writes
When the programming program, must be placed on chip in the socket of fever writes in the chip.
Advantage: cost is low, and is simple to operate.
Shortcoming: frequently plug or welding chip CPLD again, easily cause the damage of hardware, artificially increased unreliability.
Summary of the invention
A kind of method that the purpose of this invention is to provide CPLD firmware upgrade is to solve the intrinsic drawback of CPLD firmware upgrade method in prior art.
Technical scheme of the present invention is, a kind of method of CPLD firmware upgrade, adopt a programming device, this programming device comprises flush bonding processor, at least one USB interface, JTAG mouth and is connected a metal programming probe that is connected with the GPIO mouth of described flush bonding processor
Described programming device also comprises a storer, is used for downloading from computing machine the programming file of preserving CPLD,
Described programming device also comprises a rechargeable battery, is used for the power supply of described programming device,
Described metal programming probe is used for the pin that artificial point meets CPLD, realize clock signal and data-signal to connection function,
Target Board processor CPLD is set to treat the burning programmable state, upgrade file is stored in programming device by USB interface, described 2 metal programming probes are docked respectively CLK and the DATA pin of Target Board, judge whether to connect correct and described programming device is carried out the equipment coupling, if connect correctly, upgrade file be sent to CPLD and carry out firmware upgrade.The start-up routine that has Target Board in storer in programming device, when accidental interruption occurring in upgrading Target Board process, the preferred start-up routine of programming device carries out programming, and described rechargeable battery charges by USB in the transmission of data.
The present invention adopts on Target Board and is set to wait for the burning state by processor CPLD, and then probe is contacted the burning pin of CPLD, realizes by probe unit active burning function.By this method, become upgrade status by Target Board set at the scene, by probe unit, linking objective clock pins and data transmission pin.Realize initiatively transmitting the mode of upgrade file with the CPLD firmware upgrade.
The advantage of this method is, and is simple to operate, requires lowly for operating environment, as long as the technician writes probe unit with upgrade file, informs that operating personnel's method of operating just can be applied to the firmware upgrade under various environment.
Description of drawings
The module of Fig. 1 the present invention one specific embodiment middle probe equipment forms schematic diagram
The process flow diagram of CPLD firmware upgrade in Fig. 2 the present invention one specific embodiment
Embodiment
In conjunction with diagram, below will the present invention be described by embodiment.
Fig. 1 is the module map of probe device of the present invention.It has comprised processor module, memory module, a USB interface, 2 probes, a jtag interface, a charge inside battery module.This equipment is used for the initialization of probe and the analog functuion of signal, and equipment JTAG is connected with Target Board, receiving target plate relevant information, and synchronous clock information.By processor, a probe interface is modeled to clock signal corresponding to CPLD on Target Board, another probe is used for upgrade file is sent to CPLD.
Fig. 2 is operating process of the present invention.Concrete steps are:
It is programmable state that A, Target Board processor arrange CPLD.
B is stored in upgrade file in probe unit by USB interface
C, probe device dock 2 probes respectively CLK and the DATA pin of Target Board after Target Board arranges state.
D, probe device judge whether to connect correct and equipment are mated
If E correct, is sent to the CPLD upgrading with upgrade file.
F, complete operation.
Known to upper, the present invention cooperates jointly by microprocessor on probe device and Target Board, and configuration CPLD completes upgrade function.Microprocessor on Target Board is completed the basic configuration function, and transfer files is completed by more portable probe device.By the present invention, can improve greatly the efficient Cost reduction under the environment of mass upgrade product or factory testing.
Be more than a concrete application implementation of the present invention, but do not represent practical range of the present invention.All all belong to protection scope of the present invention according to equivalent modifications and the variation that the present invention does.
Claims (1)
1. the method for a CPLD firmware upgrade adopts a programming device, and this programming device comprises flush bonding processor, at least one USB interface, JTAG mouth and are connected a metal programming probe that is connected with the GPIO mouth of described flush bonding processor,
Described programming device also comprises a storer, is used for downloading from computing machine the programming file of preserving CPLD,
Described programming device also comprises a rechargeable battery, is used for the power supply of described programming device,
Described metal programming probe is used for the pin that artificial point meets CPLD, realize clock signal and data-signal to connection function,
It is characterized in that,
Target Board processor CPLD is set to treat the burning programmable state, upgrade file is stored in described programming device by USB interface, described 2 metal programming probes are docked respectively CLK and the DATA pin of Target Board, judge whether described programming device connects correct and described programming device is carried out the equipment coupling, if connect correct, upgrade file is sent to CPLD and carries out firmware upgrade
The start-up routine that has Target Board in storer in programming device, when accidental interruption occurring in upgrading Target Board process, the preferred start-up routine of programming device carries out programming,
Described rechargeable battery charges by USB in the transmission of data.
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Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104536779A (en) * | 2014-12-08 | 2015-04-22 | 河北汉光重工有限责任公司 | DSP serial port programming method easy to operate in project and based on CPLD |
CN104615467A (en) * | 2015-02-11 | 2015-05-13 | 浪潮(北京)电子信息产业有限公司 | Method and system for burning CPLD (complex programmable logic device) firmware |
CN105302620A (en) * | 2015-12-09 | 2016-02-03 | 浪潮电子信息产业股份有限公司 | Method suitable for upgrading CPLD of server without conducting power outage |
CN109818677A (en) * | 2019-03-20 | 2019-05-28 | 青岛海信宽带多媒体技术有限公司 | Optical module and optical network apparatus |
CN111445617A (en) * | 2018-12-30 | 2020-07-24 | 沈阳中钞信达金融设备有限公司 | High-precision full-width magnetic image detection processing system |
CN115097900A (en) * | 2022-07-22 | 2022-09-23 | 苏州浪潮智能科技有限公司 | Clock output configuration device and method |
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EP2056231A1 (en) * | 2007-11-01 | 2009-05-06 | Infineon Technologies AG | Method and system for transferring information to a device |
CN101599040A (en) * | 2008-06-05 | 2009-12-09 | 彭增金 | Multi-interface simulation programmer |
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Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104536779A (en) * | 2014-12-08 | 2015-04-22 | 河北汉光重工有限责任公司 | DSP serial port programming method easy to operate in project and based on CPLD |
CN104536779B (en) * | 2014-12-08 | 2017-10-17 | 河北汉光重工有限责任公司 | A kind of engineering based on CPLD DSP serial mouthful programming method easy to operate |
CN104615467A (en) * | 2015-02-11 | 2015-05-13 | 浪潮(北京)电子信息产业有限公司 | Method and system for burning CPLD (complex programmable logic device) firmware |
CN104615467B (en) * | 2015-02-11 | 2017-12-22 | 浪潮(北京)电子信息产业有限公司 | A kind of method and system of burning CPLD firmwares |
CN105302620A (en) * | 2015-12-09 | 2016-02-03 | 浪潮电子信息产业股份有限公司 | Method suitable for upgrading CPLD of server without conducting power outage |
CN111445617A (en) * | 2018-12-30 | 2020-07-24 | 沈阳中钞信达金融设备有限公司 | High-precision full-width magnetic image detection processing system |
CN111445617B (en) * | 2018-12-30 | 2021-12-14 | 沈阳中钞信达金融设备有限公司 | High-precision full-width magnetic image detection processing system |
CN109818677A (en) * | 2019-03-20 | 2019-05-28 | 青岛海信宽带多媒体技术有限公司 | Optical module and optical network apparatus |
CN115097900A (en) * | 2022-07-22 | 2022-09-23 | 苏州浪潮智能科技有限公司 | Clock output configuration device and method |
CN115097900B (en) * | 2022-07-22 | 2023-08-08 | 浪潮(山东)计算机科技有限公司 | Clock output configuration device and method |
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