CN102866951A - Rapid positioning method of internal storage boundary crossing errors of embedded system - Google Patents
Rapid positioning method of internal storage boundary crossing errors of embedded system Download PDFInfo
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Abstract
The invention discloses a rapid positioning method of internal storage boundary crossing errors of an embedded system, which comprises the following steps of: monitoring several boundary crossing use internal storage areas through the programmable logic device, and producing interruption when the boundary crossing use internal storage areas are visited, wherein the internal storage areas are configured on a programmable logic device; querying the executing current task before interruption through a central processing unit (CPU), and obtaining a function for visiting the boundary crossing use internal storage areas; and determining whether the function causes the internal storage boundary crossing or not according to a legal visit task set and a legal visit function set configured on the programmable logic device, and outputting the task of the function causing the internal storage boundary crossing and an instruction address. The rapid positioning method can fast determine the task which causes the internal storage boundary crossing errors and the specific function which is directly called by the task to cause the internal storage boundary crossing errors, therefore, the time for troubleshooting the concealed errors of the embedded system can be reduced, and the efficiency of the system debugging can be improved.
Description
Technical field
The present invention relates to embedded system, be specifically related to embedded system memory border-crossing error method for rapidly positioning.
Background technology
The memory overwriting mistake is mistake more common in the software, also is very fatal mistake.The widespread use of C language is a double-edged sword, benefit is: it makes a large amount of personnel that were not subjected to specialized education can grasp faster program design, possesses certain Software for Design ability, software decoding process is shortened greatly, harm is: or because the pressure of project process, or because programmer's error, the software error that much should just get rid of in the compilation phase is not compiled system discovery; Perhaps be found and warning message output has been arranged, but ignored by the programmer; Develop at last serious run-time error, the memory overwriting mistake is most just to be produced thus, such as these several situations of Fig. 4, Fig. 5, Fig. 6 and Fig. 7, the root of mistake is all very small, or fallen " * " number, or loop variable numerical value only many 1, seem a just simple clerical mistake, but caused the memory overwriting mistake.
The memory overwriting mistake is owing to the illegal use to internal memory, the consequence that produces is very serious, the lighter causes the result of system's output error, such as the situation of Fig. 4 and Fig. 6 because the data of using not are correct data, although software is read to cross the border or write-overflow, but because further use of the data that the data of misreading or mistake are revised, but directly exported, in this case, system is still healthy and strong, but the Output rusults mistake; Severe one causes system crash, such as the situation of Fig. 5 and Fig. 7 because border-crossing error has destroyed the system core, the former is used as unexpected data as a function and carries out, consequence well imagines that latter has directly been removed interrupt vector table, and system will collapse when the generation of interruption is arranged.
And along with system is tending towards huge, memory overwriting mistake more and more difficulty finds immediate cause, when the probability of especially carrying out at the execution route that causes memory overwriting hangs down very much.The memory overwriting mistake that module causes, the investigation time sometimes in addition considerably beyond the design this module time.
Embedded system is because the inherent characteristic of itself, the remote debugging in conjunction with main frame and target machine is often adopted in debugging, each step examination all needs the repeatedly mutual of main frame and target machine, and debugging efficiency is extremely low, and the difficulty of investigation EMS memory error is large more than simple debug host software.Therefore, the effective means of debug host software: " breaking ", " single step ", " checking variable and internal memory at the breakpoint place " etc., substantially can not in embedded system, use, then the hidden mistake of investigation embedded system is usually finished based on the mode that the information of printing is analyzed by code check with at the inner statement of printing some significant variable that inserts of suspect code, and these, need on the cost basis of a large amount of time, could realize, and whether these debugging methods effectively depend on programming personnel's ability and experience to a great extent.
This shows, be badly in need of a kind of embedded system memory border-crossing error method for rapidly positioning, to reduce the time of the hidden mistake of investigation embedded system, improve the efficient of system debug.
Summary of the invention
Technical matters to be solved by this invention is to solve embedded system in debug process, for long problem of memory overwriting mistake investigation time.
In order to solve the problems of the technologies described above, the technical solution adopted in the present invention provides a kind of embedded system memory border-crossing error method for rapidly positioning, may further comprise the steps:
Monitor on it some use region of memorys that cross the border of configuration by programmable logic device (PLD), cross the border to produce when using region of memory accessed and interrupt when any one is described;
CPU inquires about the current task of carrying out before the interruption, and obtains accessing the function of the described use region of memory that crosses the border according to the instruction counter of current task;
Close according to the Lawful access task-set that disposes on the described programmable logic device (PLD) and Lawful access function, determine whether described function is the function that causes memory overwriting, and output causes task name and the instruction address of the function of memory overwriting.
In said method, described crossing the border uses region of memory to comprise start address, end address and enliven logo area, when using region of memory accessed when crossing the border, its logo area is set as " enlivening ", and removes " enlivening " sign that other crosses the border and uses region of memory;
Described Lawful access mission bit stream comprises task identification and task name;
Described Lawful access function information comprises function name, function start address and function end address;
Described task name is associated with described function name.
In said method, described programmable logic device (PLD) periodically to the cpu address bus sampling, obtains the memory address that current task is used.
In said method, obtain accessing the instruction address of the described use region of memory that crosses the border according to the task control block message of described current task, and according to the task-set that disposes in the programmable logic device (PLD) and collection of functions, judge whether described current task is that described the crossing the border of access used the Lawful access task of region of memory, judge simultaneously whether function corresponding to above-mentioned instruction address is that described the crossing the border of access used the Lawful access function of region of memory, if have at least one to be no in above-mentioned two judged results, then export current task name and instruction address.
The present invention, by means of programmable logic device (PLD), combined with hardware and software, determine fast to cause task (or the process of memory overwriting mistake, below all represent with task) and the concrete function that directly causes the memory overwriting mistake of this task call, to have reduced the time of the hidden mistake of investigation embedded system, improve the efficient of system debug.
Description of drawings
Fig. 1 is process flow diagram of the present invention;
Fig. 2 is the annexation synoptic diagram of programmable logic device (PLD) and CPU;
Fig. 3 is the configuration information synoptic diagram of programmable logic device (PLD);
Fig. 4 is internal memory read to cross the border slight effect synoptic diagram to system;
Fig. 5 is that the collapsibility that internal memory is read to cross the border on system affects synoptic diagram;
Fig. 6 is that memory write-overflow is to the slight effect synoptic diagram of system;
Fig. 7 is memory write-overflow affects synoptic diagram to the collapsibility of system;
Fig. 8 is the task control block (TCB) example of real-time multi-task operating system.
Embodiment
Embedded system memory border-crossing error method for rapidly positioning provided by the invention, monitor some use region of memorys that cross the border of configuration on it by programmable logic device (PLD), and generation is interrupted when any one use region of memory that crosses the border is accessed, CPU judges that according to interrupting current task and Access Violation use the function of region of memory whether legal, and output causes function and the instruction address of memory overwriting.Below in conjunction with accompanying drawing the present invention is made detailed explanation.
Fig. 1 is process flow diagram of the present invention, and as shown in Figure 1, embedded system memory border-crossing error method for rapidly positioning may further comprise the steps.
Step 1: set some crossing the border in programmable logic device (PLD) and use task-set and the collection of functions of region of memory and the above-mentioned region of memory of Lawful access, referred to as Lawful access task-set and Lawful access collection of functions.
As shown in Figure 3, each crosses the border and uses region of memory to comprise start address, end address and enliven logo area, crosses the border when using some accessed in the region of memorys when a plurality of, and its logo area is set as " enlivening "; It is to distinguish to cross the border which uses in the region of memory current accessed that zone bit " enlivens " purpose, processes to make things convenient for software.Each Lawful access task comprises task identification and task name; Each Lawful access function comprises function name, function start address and function end address; Task name function name is associated.
Fig. 2 is the connection diagram of programmable logic device (PLD) and CPU, only provided the annexation figure for realization address bus monitoring sampling section here, and the interface annexation of CPU management and control programming device has generality, does not repeat them here.
The interface of CPU management and control programmable logic device (PLD) is used for realizing the information interaction between CPU and the programmable logic device (PLD), use the generalized case of programmable logic device (PLD) identical with system, the storage inside that is programmable logic device (PLD) is directly used as the addressable address space of CPU, also programmable logic device (PLD) can be regarded as peripherals administration and the access of CPU.
The primary memory of embedded system can be that SRAM or DRAM(comprise SDRAM and DDR etc.), for SRAM and DRAM, annexation and logic that address bus detects have very big difference, the actual total annexation that comprises SRAM or DRAM that provided of Fig. 2 is determined on a case-by-case basis in the practical application.If use DRAM class memory device, then only use the subset in the address wire " A0..A31 " to input as row address and column address, row choosing " RAS ", column selection " CAS " must be used, the system of use SDRAM, " SDRAM_CLK " also need adopt.If use SRAM class memory device, then address wire " A0..A31 " situation of looking the SRAM device is selected, and " RAS ", " CAS " and " SDRAM_CLK " then do not adopt.
" INTR " is interrupt request singal, judges the address bus sampling when programmable logic device (PLD) and hits the region of memory scope that certain has configured, then exports a pulse to interrupt to the CPU request at " INTR ".
CPU writes to cross the border to programmable logic device (PLD) by the management control interface and uses task-set and the collection of functions of region of memory (can be one or more) and the above-mentioned region of memory of Lawful access, monitor that (each task-set can comprise a task, also can comprise many tasks for region of memory range information (can be one or more), legitimate tasks information and Lawful access function information; Each collection of functions can comprise a function or many functions equally).As shown in Figure 3, cross the border and use region of memory to comprise many memory range information, every memory range information comprises start address, end address and enlivens logo area; Legitimate tasks information comprises task identification and task name; Legal function information comprises function name, function start address and function end address; Task name function name is associated.
After configuration information set, by the sample frequency of CPU setting programmable logic device (PLD), it should be noted that: sample frequency should not be lower than the access frequency of storer, otherwise, might not be monitored to by some important internal storage access.
Then programmable logic device (PLD) starts or stops the monitoring task of carrying out according to the state of " start/stop " zone bit on it, " start/stop " zone bit can change by the order that starts or stops of CPU, also can automatically be revised by programmable logic device (PLD) according to the duty of programmable logic device (PLD), CPU sends startup command, then " start/stop " zone bit is revised as " startup ", CPU sends and ceases and desist order, then " start/stop " zone bit is revised as " stopping ".When " start/stop " zone bit was " startup ", programmable logic device (PLD) began periodically operations such as address wire samplings, otherwise does not do any operation.If in the programmable logic device (PLD) sampling process, it is " stopping " that CPU revises " start/stop " zone bit, and then programmable logic device (PLD) quit work in next sampling period.
Determining the address that obtains when certain sampling drops in the built-in regional extent that certain bar configures, and the region of memory range information of configuration is more than one, then the logo area of enlivening of this region of memory of set is " enlivening ", remove " enlivening " mark that enlivens logo area of other region of memory, and " start/stop " zone bit is revised as " stopping ".Then in pulse of interrupt request singal " INTR " output.
In the above-mentioned functions, except configuration information was finished jointly by CPU and programmable logic device (PLD), other function was finished automatically by programmable logic device (PLD).
Step 3:CPU inquires about the current task of carrying out before the interruption, and obtains the instruction counter of described current task, then obtains accessing the function of the described use region of memory that crosses the border based on the value of described instruction counter.
Step 4: according to the Lawful access task-set that disposes on the described programmable logic device (PLD) and Lawful access collection of functions, determine whether described function is the function that causes memory overwriting, and output causes task and the instruction address of the function of memory overwriting.
The design of interrupt service routine is along with may there be larger difference in the different of CPU and real-time multi-task operating system, but main mechanism is similar with principle.In most cases as follows: as during the initialization interrupt service routine interrupt service routine to be linked to each other with an interrupt vector, when interrupt service routine begins to carry out, close and interrupt and removing related interrupts state, when interrupt service routine finishes, open interruption.It should be noted that, in embedded system, interrupt service routine is not suitable for taking too many CPU time, generally speaking, interrupt service routine only responds and produces the time of interrupting, record some information, then notice is interrupted related task with this, and most of work is all given related task and gone to finish.
Among the present invention, less work is only done in the same design of interrupt service routine, have no progeny in the interrupt service routine response, the work of doing is: obtain current interrupted task identification and store correct position into, then notice goes to finish remaining work with interrupting related task, why will obtain current interrupted task and buffer memory, is the execution because the monitoring task can be tried to be the first, task scheduling can occur in system, can't obtain real current interrupted mission bit stream when the monitoring task begins to carry out.
In fact, the startup of monitoring task and stop to be placed in the interrupt service routine and finish in the Lawful access task of finishing in the monitoring task and the filtration work of Lawful access function and the programming device.If finish the benefit of these work in interrupt service routine be: can prevent that too much task scheduling occurs locking system, because current active task is not the monitoring task, switching to the monitoring task system from current active task so need to reschedule.Harm is: if Lawful access mission bit stream and function information are too much, Lawful access task and function information filtration work will take more CPU time, and in the embedded system, interrupting should the least possible CPU time that takies, therefore these functions are moved on to realize in the monitoring task relatively good.
The monitoring task cooperates interrupt service routine and arranges, technologically speaking, being operated in the interrupt service routine that the monitoring task is done can realize, but in the embedded system, interrupt service routine is to be not suitable for taking too many CPU time, therefore, most of work all move on to finish in the monitoring task more reasonable.
At first, the monitoring task needs to be notified (mode of normally transmitting with semaphore) from interrupt service routine, then begins to finish own work (as can not get interrupt service routine notify, the monitoring task then is in blocked state).
Then, the monitoring task needs the current accessed task identification A(that obtains this region of memory from interrupt service routine to store certain zone into), and obtain task control block (TCB) based on A sign, the example of task control block (TCB) as shown in Figure 8, what Fig. 8 described is the partial information of the task control block (TCB) among the real-time multi-task operating system VXWORKS.Further obtain the instruction counter (instruction address) of current execution by task control block (TCB), then carry out Lawful access task filtering function.
If the Lawful access task of non-this region of memory of this task of filter result is then exported this mission bit stream and instruction counter information.
If this task of filter result is the Lawful access task of this region of memory, then, the monitoring task also need be finished Lawful access function filtering function, if filter result is the Lawful access function, then do not carry out any operation, otherwise export this mission bit stream and instruction counter information.
After the operation of above-mentioned filtering function and correspondence is finished, " start/stop " zone bit is revised as " startup ", get back to the state that continues to wait for the interrupt service routine notice.
The monitoring task is actually periodic task, from the notice of receiving interrupt service routine, to Output rusults or finish and filter but be a treatment cycle without end of output as a result.But treatment cycle is not fixed value, and reports related with the interruption of programming device.
Among the present invention, programmable logic device (PLD) can be the devices such as GAL, CPLD or FPGA, such as existing such devices in the system, can be directly and multiplexing this device of other functional module, and do not need to increase specially a slice such devices; As there not being such devices in the system, then visual concrete condition is selected suitable device.
The software of embedded system is based on real-time multi-task operating system, and this real-time multi-task operating system can be a kind of in VXWORKS, LINUX, the embedded OSs such as OS II, ECOS.
The present invention is not limited to above-mentioned preferred forms, and anyone should learn the structural change of making under enlightenment of the present invention, and every have identical or close technical scheme with the present invention, all falls within protection scope of the present invention.
Claims (4)
1. embedded system memory border-crossing error method for rapidly positioning is characterized in that, may further comprise the steps:
Monitor on it some use region of memorys that cross the border of configuration by programmable logic device (PLD), cross the border to produce when using region of memory accessed and interrupt when any one is described;
CPU inquires about the current task of carrying out before the interruption, and obtains accessing the function of the described use region of memory that crosses the border according to the instruction counter of current task;
Close according to the Lawful access task-set that disposes on the described programmable logic device (PLD) and Lawful access function, determine whether described function is the function that causes memory overwriting, and output causes task name and the instruction address of the function of memory overwriting.
2. embedded system memory border-crossing error method for rapidly positioning as claimed in claim 1 is characterized in that,
Described crossing the border uses region of memory to comprise start address, end address and logo area, and when using region of memory accessed when crossing the border, its logo area is set as " enlivening ", and removes " enlivening " sign that other crosses the border and uses region of memory;
Described Lawful access mission bit stream comprises task identification and task name;
Described Lawful access function information comprises function name, function start address and function end address;
Described task name is associated with described function name.
3. embedded system memory border-crossing error method for rapidly positioning as claimed in claim 1 is characterized in that,
Described programmable logic device (PLD) periodically to the cpu address bus sampling, obtains the memory address that current task is used.
4. embedded system memory border-crossing error method for rapidly positioning as claimed in claim 1 is characterized in that,
Obtain accessing the instruction address of the described use region of memory that crosses the border according to the task control block message of described current task, and according to the task-set that disposes in the programmable logic device (PLD) and collection of functions, judge whether described current task is that described the crossing the border of access used the Lawful access task of region of memory, judge simultaneously whether function corresponding to above-mentioned instruction address is that described the crossing the border of access used the Lawful access function of region of memory, if have at least one to be no in above-mentioned two judged results, then export current task name and instruction address.
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