CN102857251B - Chip synchronization method by direct sequence spread spectrum based parallel dispreading - Google Patents

Abstract

A chip synchronization method by direct sequence spread spectrum based parallel dispreading is completed by a parallel dispreading system based on the direct sequence spread spectrum. The parallel dispreading system comprises a computer, an AD (analog-to-digital converter), a correlator and a sequence generator. Received parallel data in each channel and pseudo-random code sequences in each group extracted according to set extraction rate are subjected to correlated traversal processing, and current chip offset is judged according to correlated peak values of processed results so that chip synchronization is achieved by means of adjustment. By the chip synchronization method, chip synchronization is achieved quickly and conveniently, a computing method is simple and efficient, and difficulty in synchronization by parallel dispreading in direct sequence spread spectrum communication is overcome.

Description

A kind of chip synchronization method of parallel despreading of direct sequence spread spectrum

Technical field:

The present invention relates to spread spectrum communication field, particularly in the time that the up link of direct sequence spread spectrum has larger spreading ratio, adopt walk abreast a kind of chip synchronization method of despreading of pseudo random sequence.The present invention is applicable to the communications field of high-speed transfer.

Background technology:

Spread spectrum communication is applied to military communication at first, because it has that capacity is large, speed is high, the signal feature such as easily hidden, strong security, antijamming capability be strong, and can greatly improve the availability of frequency spectrum, thereby for modern communications, have great attraction.Wherein most widely used is exactly direct sequence spread spectrum skill.

Along with the lifting of spread spectrum communication system spreading ratio, parallel despreading receives increasing concern.Compare traditional serial despreading, the parallel despreading tool of Resistant DS Spread Spectrum System has the following advantages: a) adopt parallel AD device, high-speed data is received and is converted into low-speed parallel reception, and then reduce the performance requirement of AD; B) the parallel despreading under high data rate, without RAM storage, thereby simplified apparatus, reduce complexity, shorten time delay; C), under high speed data transfers, adopt the part parallel sequence that receives signal can realize equally despreading.

The chip synchronization of spread spectrum communication system, refers to make receiving terminal produce in spread spectrum communication synchronous for the pseudo noise code of despreading and the pseudo noise code of transmitting terminal, so that the pseudo noise code of receiver after synchronous with this gone the acknowledge(ment) signal despreading of being correlated with.Synchronously generally being divided into and catching and follow the tracks of two steps of pseudo noise code, considers the prior information that in most cases cannot obtain about timing, and therefore synchronous matter of utmost importance is to catch.Conventional realize serial despreading synchronously mainly contain three kinds of methods: sliding correlation method, sequence estimation method and matched filtering method.

Consider in Resistant DS Spread Spectrum System, in the time adopting serial despreading, chip synchronization take position as unit skew; And in parallel despreading, the skew of chip synchronization be taking pseudo noise code code length with the ratio that extracts speed as unit.So in direct sequence spread spectrum communication system, the chip synchronization of parallel despreading need to be carried out the more search of wide region to correlation peak, so that traditional method cannot meet the synchronisation requirement of parallel despreading well.

Summary of the invention:

For phase fuzzy problem synchronous in Direct Sequence Spread Spectrum Communication, the object of the invention is to propose a kind of chip synchronization method of parallel despreading, the method can realize the synchronous of chip quickly and easily, and then ensures the performance of the parallel despreading of spread spectrum communication system.

Main idea of the present invention is: by the every channel parallel data receiving, make with the every group of pseudo-random code sequence extracting by setting extraction yield the relevant treatment traveling through, judge the side-play amount of current chip according to the correlation peak of result, and then adjust and realize the synchronous of chip.

According to above-mentioned idea, the present invention adopts following technical proposals:

A chip synchronization method for the parallel despreading of direct sequence spread spectrum, it is that parallel solution enlarging system based on direct sequence spread spectrum completes, described parallel solution enlarging system comprises computer, AD analog to digital converter, correlator and sequencer; Its feature is, the method comprises following concrete steps:

(1) sequencer generates the pseudo random sequence S that length is l, and computer extracts by extracting speed D this pseudo random sequence S, obtains D group pseudo-random code sequence, and is kept in the memory of computer:

S _i=Dec| _D(S)，i=0，1，…，D-1；

Wherein, D is more than or equal to 1 positive integer;

(2) the reception signal Y that AD analog to digital converter is L to length, wherein L=nl, n is the synchronous number of times detecting, and extracts by extracting speed D, obtains D channel parallel data:

Y _j=Dec| _D(Y)，j=0，1，…，D-1

(3) AD analog to digital converter is organized pseudo-random code sequence by D road parallel receive data, memory by D and is input to respectively correlator, the relevant treatment that work travels through, then machine carries out summation operation and adjudicates relatively as calculated, formula is as follows:

$P_j={\mathrm{\Σ}}_{i=0}^{D-1}{P}_{\mathrm{ji}}={\mathrm{\Σ}}_{i=0}^{D-1}{Y}_j\⊗S_i,j=\mathrm{0,1},\·\·\·,D-1---\left(1\right)$

Wherein, represent related operation, P _jirepresent the correlated results of j road parallel receive data and i road pseudo-random code sequence, P _jrepresent that j road parallel receive data and D group pseudo-random code sequence travel through the correlation peak sum after related operation, observe and compare correlation peak sum, after threshold judgement, work as P _jpeak value appear at l, 2l ..., in nl sampling instant place, judge that chip side-play amount is left as x=j position;

(4) according to the side-play amount x obtaining, the data sequence entirety receiving is adjusted to x position to the right, realize the chip synchronization of the parallel despreading of direct sequence spread spectrum.

In the time that message transmission rate exceedes the load of single channel AD analog to digital converter, adopt multi-channel A/D analog to digital converter parallel sampling, the 1/D when sample frequency of each like this AD is single AD sampling, and then reduce the performance requirement of spread spectrum communication to AD device.

Comparing parallel despreading has higher requirement with serial despreading to synchronizeing, and this is due in serial despreading, and simultaneous bias take position as unit; And when parallel despreading, simultaneous bias with for unit.What the present invention proposed extracts reception data and frequency expansion sequence respectively, adopt again the algorithm of the relevant summation of traversal, can realize quickly and easily chip synchronization, and computational methods are simply efficient, solved well synchronous this difficulties of the parallel despreading of Direct Sequence Spread Spectrum Communication.

Brief description of the drawings:

Fig. 1 uses a road AD analog to digital converter to receiving data by the multiplying power schematic diagram of sampling.

Fig. 2 uses 4 road AD analog to digital converters to receiving data by the multiplying power schematic diagram of sampling.

The traversal correlation computations flow chart of Fig. 3 chip synchronization side-play amount.

Embodiment:

Below in conjunction with accompanying drawing, the present invention will be further described with concrete enforcement.The present embodiment is implemented under taking technical solution of the present invention as prerequisite, provided detailed execution mode and concrete operating process, but protection scope of the present invention is not limited to following embodiment.

In the present embodiment, get D=4, as shown in Fig. 1,2,3, the chip synchronization method of the parallel despreading of a kind of direct sequence spread spectrum of the present invention, its concrete steps are as follows:

(1) the pseudo random sequence S that length sequencer being generated is l, extracts by the extraction speed of 4 times, thereby obtains 4 groups of pseudo-random code sequences:

S _i=Dec| _D(S)，i=0,1，…，3；

In conjunction with single channel or multi-channel A/D analog to digital converter, by the extraction speed of 4 times, the reception signal Y that is 4l to length extracts, and setting synchronous detection number of times is herein 4, thereby obtains the parallel frequency expansion sequence in 4 tunnels:

Y _j=Dec| ₄(Y)，j=0，1，…，3；

(2) 4 road parallel receive data and 4 groups of pseudo-random code sequences are input to correlator, the relevant treatment that work travels through, that is:

$P_j={\mathrm{\Σ}}_{i=0}^3{P}_{\mathrm{ji}}={\mathrm{\Σ}}_{i=0}^3{Y}_j\⊗S_{i}j=\mathrm{0,1},\·\·\·,3---\left(1\right)$

Wherein, represent related operation, P _jirepresent the correlated results of j road parallel receive data and i road pseudo-random code sequence, P _jrepresent that j road parallel receive data and 4 groups of pseudo-random code sequences travel through the correlation peak sum after related operation; Observe and compare correlation peak, after threshold judgement, working as P _jpeak value appear at l, 2l, 3l, when this four sampling instants place of 4l, judges that chip side-play amount is left as x=j position;

(4) the side-play amount x that last basis obtains, adjusts x position to the right by the data sequence entirety receiving, and realizes the chip synchronization of the parallel despreading of direct sequence spread spectrum.

Claims (1)

1. a chip synchronization method for the parallel despreading of direct sequence spread spectrum, it is that parallel solution enlarging system based on direct sequence spread spectrum completes, described parallel solution enlarging system comprises computer, AD analog to digital converter, correlator and sequencer;

It is characterized in that, in the time that message transmission rate exceedes the load of single channel AD analog to digital converter, adopt multi-channel A/D analog to digital converter parallel sampling, the method comprises following concrete steps:

(1) sequencer generates the pseudo random sequence S that length is l, and computer extracts by extracting speed D this pseudo random sequence S, obtains D group pseudo-random code sequence, and is kept in the memory of computer:

S _i＝Dec| _D(S),i＝0,1,…,D-1；

Wherein, D is more than or equal to 1 positive integer;

(2) the reception signal Y that AD analog to digital converter is L to length, wherein L=nl, n is the synchronous number of times detecting, and extracts by extracting speed D, obtains D channel parallel data:

Y _j＝Dec| _D(Y),j＝0,1,…,D-1

(3) AD analog to digital converter is organized pseudo-random code sequence by D road parallel receive data, memory by D and is input to respectively correlator, the relevant treatment that work travels through, then machine carries out summation operation and adjudicates relatively as calculated, formula is as follows:

$P_j={\mathrm{\Σ}}_{i=0}^{D-1}{P}_{\mathrm{ji}}={\mathrm{\Σ}}_{i=0}^{D-1}{Y}_j\⊗S_i,j=\mathrm{0,1},...,D-1---\left(1\right)$

Wherein, represent related operation, P _jirepresent the correlated results of j road parallel receive data and i road pseudo-random code sequence, P _jrepresent that j road parallel receive data and D group pseudo-random code sequence travel through the correlation peak sum after related operation, observe and compare correlation peak sum, after threshold judgement, work as P _jpeak value appear at l, 2l ..., when nl sampling instant place, judge that chip side-play amount is left as x=j position;

(4) according to the side-play amount x obtaining, the data sequence entirety receiving is adjusted to x position to the right, realize the chip synchronization of the parallel despreading of direct sequence spread spectrum.