CN102832952B - The multi-mode Reed-Solomon decoder of low cost - Google Patents

Abstract

The invention provides a kind of multi-mode Reed-Solomon decoder of low cost.This decoder at least comprises: for carrying out the disease value computing module of the calculating of executed in parallel disease value based on access coded message to be corrected, for the cyclic shifter of the disease value that the described disease value computing module that is shifted calculates, the error location polynomial computing module that the Berlekamp-Massey algorithm flattened asks for error location polynomial is performed for serial, for the money search module of Search Error position, for asking for the improper value computing module of improper value based on good fortune Buddhist nun algorithm, the time schedule controller of corresponding disease value is provided for asking for computing each time that the correction module of correct coded message and the displacement for controlling described cyclic shifter are described error location polynomial computing module.Advantage of the present invention comprises: the area considerably reducing decoder, and then reduces cost and power consumption.

Description

The multi-mode Reed-Solomon decoder of low cost

Technical field

The present invention relates to decoding field, particularly relate to a kind of multi-mode Reed-Solomon decoder of low cost.

Background technology

In radio digital communication system, Reed-Solomon(RS) code is as an important class of forward error correction (FEC), the performance excellent with it and high-throughput, be widely used in numerous fields, as DVB series standard, CMMB etc. in broadcast system; DVD in field of data storage, blue light etc.; In power line carrier communication, G3 standard, the ITU9955 standard being about to release and China are about to formulate power line carrier communication standard etc., all have employed RS code.

Along with the development of wireless communication technology, much communication protocol all starts to adopt the mode of the chnnel coding of multi code Rate of Chinese character to process complicated and changeable channel, and multi code Rate of Chinese character (i.e. multi-mode) becomes a kind of trend.Need Reed-Solomon decoding equipment to support many code lengths and multi code Rate of Chinese character in carrier communication standard equally, to tackle different application scenarios.For this reason, numerous research staff have developed various RS decoder.

Such as, in the Chinese patent literature of publication number CN 101325706A, disclose a kind of low hardware spending Reed-Solomon decoder, this decoder comprises 2t+1 galois field constant multiplier and (is called the first Galois field multiplying unit in invention, and t+1 Galois field multiplying unit (being called the second Galois field multiplying unit in invention, t=8) t=8); Again such as, in the Chinese patent literature of publication number CN 101964664 A, disclose a kind of multi-mode Reed-Solomon decoder structure being applicable to CMMB ", this decoder comprises 2t+1 galois field constant multiplier and t/2 Galois field multiplying unit; Again such as, in the Chinese patent literature of publication number CN 1250980A, disclose a kind of Read Solomon decoder and coding/decoding method ", this decoder comprises 2 Galois field multiplying units and 2t+1 galois field constant multiplier.

But due in existing carrier communication or other wireless communication standards, low-power consumption more and more becomes a more crucial index; And low cost is also one of core competitiveness of product, therefore, based on those demands, provide a kind of RS decoder of low cost, become the technical task that those skilled in the art need to solve.

Summary of the invention

The shortcoming of prior art in view of the above, the object of the present invention is to provide a kind of multi-mode Reed-Solomon decoder of low cost.

For achieving the above object and other relevant objects, the invention provides a kind of multi-mode Reed-Solomon decoder of low cost, it at least comprises:

Disease value computing module, comprises 2t Galois Field constant multiplier, and for carrying out the calculating of executed in parallel disease value based on access coded message to be corrected, t is the maximum error code figure place that can correct;

Cyclic shifter, for the disease value that the described disease value computing module that is shifted calculates;

Error location polynomial computing module, is connected to described cyclic shifter output, comprises 1 Galois field multiplier and Galois Field and to invert device, perform the Berlekamp-Massey algorithm flattened ask for error location polynomial for serial;

Money search module, connects described cyclic shifter and described error location polynomial computing module output, for Search Error position;

Improper value computing module, connects described cyclic shifter, described error location polynomial computing module and money search module output, for asking for improper value based on good fortune Buddhist nun algorithm;

Correction module, input accesses coded message to be corrected and connects described improper value computing module output, for asking for correct coded message;

Time schedule controller, provides corresponding disease value for controlling the computing each time that the displacement of described cyclic shifter is described error location polynomial computing module.

Preferably, described Galois field multiplier comprises the full parellel multiplier be made up of Galois Field constant multiplier, MUX and adder.More preferably, the Galois Field constant multiplier that the multiplexing described disease value computing module of Galois Field constant multiplier that described Galois field multiplier comprises comprises.

Preferably, the multi-mode Reed-Solomon decoder of described low cost also comprises: the access interface control module be connected with the memory storing pending coded message.

Preferably, the Galois field multiplier that comprises of the multiplexing described error location polynomial computing module of described improper value computing module is to perform the multiplying in good fortune Buddhist nun algorithm.

Preferably, the Galois Field that the multiplexing described error location polynomial computing module of described improper value computing module comprises inverts device to perform the inversion operation in good fortune Buddhist nun algorithm.

Preferably, the Galois Field constant multiplier that comprises of the multiplexing described disease value computing module of described improper value computing module is to perform the key equation computing in good fortune Buddhist nun algorithm.

Preferably, the Galois Field constant multiplier that the multiplexing described disease value computing module of described money search module comprises carrys out the search of execution error position.

Preferably, the Galois Field constant multiplier that comprises with the common multiplexing described disease value computing module of ping-pong of described money search module and described improper value computing module.

Preferably, the logic of the calculating distance in the Berlekamp-Massey algorithm of the multiplexing described flattening of described improper value computing module calculates key equation coefficient.

As mentioned above, the multi-mode Reed-Solomon decoder of low cost of the present invention, has following beneficial effect:

1, flattening Berlekamp-Massey algorithm is used, serial and parallel combination realize Reed-Solomon decoder, and only employ a Galois field multiplying unit in whole decoder, greatly reduce the area of Reed-Solomon decoder, thus reduce costs and power consumption;

2, the degree of depth by controlling disease value cyclic shifter reaches supports the various Reed-Solomon code with different check bit number; By controlling that disease value calculates, the iterations that calculates of money search and key equation thus support the code length of different Reed-Solomon codes;

3, carried out the data storage of shared SOC (system on a chip) belonging to self by access interface control module, thus save the area of Reed-Solomon decoder;

4, applied range, is particularly useful for the occasion of low throughput demand.

Accompanying drawing explanation

Fig. 1 is shown as the multi-mode Reed-Solomon decoder structure schematic diagram of low cost of the present invention.

Fig. 2 is shown as the disease value computing module structural representation of the multi-mode Reed-Solomon decoder of low cost of the present invention.

Fig. 3 is shown as the error location polynomial computing module structural representation of the multi-mode Reed-Solomon decoder of low cost of the present invention.

Fig. 4 is shown as Galois field multiplier structural representation of the present invention.

Fig. 5 is shown as the money search module structural representation of the multi-mode Reed-Solomon decoder of low cost of the present invention.

The structural representation of the calculating key equation that the multi-mode Reed-Solomon decoder that Fig. 6 is shown as low cost of the present invention adopts.

Fig. 7 is shown as the state transition diagram of the host state machine of the time schedule controller of the multi-mode Reed-Solomon decoder of low cost of the present invention.

Element numbers explanation

1 multi-mode Reed-Solomon decoder

11 disease value computing modules

12 cyclic shifter

13 error location polynomial computing modules

14 money search modules

15 improper value computing modules

16 correction modules

17 time schedule controllers

18 access interface control modules

Embodiment

By particular specific embodiment, embodiments of the present invention are described below, person skilled in the art scholar the content disclosed by this specification can understand other advantages of the present invention and effect easily.

Refer to Fig. 1 to Fig. 7.Notice, structure, ratio, size etc. that this specification institute accompanying drawings illustrates, content all only in order to coordinate specification to disclose, understand for person skilled in the art scholar and read, and be not used to limit the enforceable qualifications of the present invention, therefore the not technical essential meaning of tool, the adjustment of the modification of any structure, the change of proportionate relationship or size, do not affecting under effect that the present invention can produce and the object that can reach, still all should drop on disclosed technology contents and obtain in the scope that can contain.Simultaneously, quote in this specification as " on ", D score, "left", "right", " centre " and " one " etc. term, also only for ease of understanding of describing, and be not used to limit the enforceable scope of the present invention, the change of its relativeness or adjustment, under changing technology contents without essence, when being also considered as the enforceable category of the present invention.

As shown in the figure, the invention provides a kind of multi-mode Reed-Solomon decoder of low cost.Described multi-mode Reed-Solomon decoder can support RS (n, n-2t, t) code, wherein 2t=4,8,16; 2t<n<256; Its primitive polynomial is P (x)=x ⁸+ x ⁴+ x ³+ x ²+ 1, generator polynomial is wherein B=0 and 1.In addition, described multi-mode Reed-Solomon decoder also can compatible carrier wave communication standard G3 and ITU9955 completely.

Below by be decoded as example to describe multi-mode Reed-Solomon decoder of the present invention in detail to the RS code of 2t=16.

As shown in Figure 1, the multi-mode Reed-Solomon decoder 1 of low cost at least comprises: disease value computing module 11, cyclic shifter 12, error location polynomial computing module 13, money search module 14, improper value computing module 15, correction module 16 and time schedule controller 17.

Described disease value computing module 11 carrys out the calculating of executed in parallel disease value based on access coded message to be corrected, wherein, the computational algorithm of disease value as shown in the formula.

$S_i=r\left({\mathrm{\&alpha;}}^i\right)=\underset{j=0}{\overset{n-1}{\mathrm{\&Sigma;}}}{r}_j{\left({\mathrm{\&alpha;}}^i\right)}^j$

$=r_{n-1}{\left({\mathrm{\&alpha;}}^i\right)}^{n-1}+r_{n-2}{\left({\mathrm{\&alpha;}}^i\right)}^{n-2}+r_{n-3}{\left({\mathrm{\&alpha;}}^i\right)}^{n-3}+\&CenterDot;\&CenterDot;\&CenterDot;+r_0{\left({\mathrm{\&alpha;}}^i\right)}^0$

$=\left[\right[[r_{n-1}{\mathrm{\&alpha;}}^i+r_{n-2}]{\mathrm{\&alpha;}}^i+r_{n-3}]{\mathrm{\&alpha;}}^i+r_{n-4}]{\mathrm{\&alpha;}}^i+\&CenterDot;\&CenterDot;\&CenterDot;+r_0$

S ^-1 _i＝0

Namely

S _i ^j＝S _i ^j-1α ⁱ+r _n-1-jw h er，je＝0,1,…,n-1

As shown in Figure 2, it comprises 2t=16 Jia Waluo territory constant multiplier to a kind of structure of preferred disease value computing module.

The disease value that described cyclic shifter 12 calculates for the described disease value computing module 11 that is shifted, to provide corresponding disease value for the computing each time of follow-up error location polynomial computing module 13.

Described error location polynomial computing module 13 is the modules in the most complicated in Reed-Solomon decoder and most cost source, it adopts the Berlekamp-Massey algorithm of flattening, and uses serial and in conjunction with a kind of mode of Galois field multiplier to ask for error location polynomial.Wherein, the Berlekamp-Massey algorithm of flattening is as follows:

${\mathrm{\&Delta;}}_i=\underset{j=0}{\overset{i-1}{\mathrm{\&Sigma;}}}{\mathrm{\&sigma;}}_j^{(i-1)}{S}_{i-j}$

L _i＝Ω(i-L _i-1)+(1-Ω)L _i-1

$\left\{\begin{array}{c}{\mathrm{\&sigma;}}^{\left(i\right)}\left(x\right)={\mathrm{\&sigma;}}^{(i-1)}\left(x\right)-{\mathrm{\&Delta;}}_{i}x{B}^{(i-1)}\left(x\right)\\ B^{\left(i\right)}\left(x\right)={{\mathrm{\&Delta;}}_i}^{-1}\mathrm{\&Omega;}{\mathrm{\&sigma;}}^{(i-1)}\left(x\right)+(1-\mathrm{\&Omega;})x{B}^{(i-1)}\left(x\right)\end{array}\right.$

initial:

σ ⁽⁰⁾(x)＝1,B ⁽⁰⁾(x)＝1,L ₀＝1

ifΔ _i≠0and2L _i-1≤i-1,then,Ω＝1,else,Ω＝0

From above formula, described error location polynomial computing module 13 comprises Galois field multiplier and Galois Field and to invert device.

As shown in Figure 3, it is a kind of structural representation of preferred error location polynomial computing module 13.This error location polynomial computing module 13 comprises 1 Galois field multiplier and Galois Field and to invert device.

Wherein, Galois field multiplier can adopt existing full parellel multiplier; Preferably, full parellel multiplier of the present invention can also be adopted.As shown in Figure 4, it is Galois field multiplier schematic diagram of the present invention.This Galois field multiplier is made up of Galois Field constant multiplier, MUX and adder, and compared to the Jia Waluo territory multiplier of existing conventional full parellel, the Galois field multiplier framework shown in Fig. 4 is more regular, and area can save about 20%; In addition, the Jia Waluo territory constant multiplier that 7 Jia Waluo territory constant multipliers in this Galois field multiplier can also comprise with aforementioned disease value computing module 11 carries out time division multiplexing, can save area further thus.

Because Galois Field is inverted, the structure of device is known to those skilled in the art to be known, therefore is not described in detail in this.In addition, due to the part of devices in the structure of the error location polynomial computing module 13 shown in Fig. 3 can by money search module 14 and improper value computing module 15 multiplexing, therefore will to describe in detail this structure again follow-up.

Described money search module 14 comes Search Error position based on error location polynomial, and it needs all positions of Reed-Solomon code that 255 clock cycle could be 255 code length all to travel through one time.When δ (x) is 0, then x is the root of an error location polynomial, namely finds an effective errors present.Have also been obtained the value of x δ ' (x) simultaneously.

A kind of structure of preferred money search module 14 as shown in Figure 5.More preferably, 16 Galois Field constant multipliers that 16 Galois Field constant multiplier reusable aforementioned disease value computing modules 11 that this money search module 14 comprises comprise, reduce shared chip area thus.

Described improper value computing module 15 asks for improper value based on good fortune Buddhist nun algorithm, wherein, described good fortune Buddhist nun algorithm as shown in the formula:

Key equation S (x) σ (x) ≡ w (x) (mod x ^2v+1);

${\mathrm{\&gamma;}}_i=\frac{-w\left({{\mathrm{\&beta;}}_i}^{-1}\right)}{{{\mathrm{\&beta;}}_i}^{-1}{\mathrm{\&sigma;}}^{\&prime;}\left({\mathrm{\&beta;}}_i^{-1}\right)},$

Because the denominator in good fortune Buddhist nun algorithm obtains while money search, so, described improper value computing module 15 major calculations is exactly calculate the value of key equation, and the coefficient of key equation can the logic (being stated after appearance) of calculating distance in the Berlekamp-Massey algorithm of multiplexing aforementioned flattening.After the coefficient obtaining key equation, the preferred structure shown in Fig. 6 can be adopted to carry out the value of the key equation of mistake in computation position; After treating that molecule in good fortune Buddhist nun algorithm and denominator all obtain, can the device of inverting of reused error position polynomial computation module 13 again to ask for improper value.

Preferably, the Galois Field constant multiplier in the structure shown in Fig. 6 can the Galois Field constant multiplier that comprises of multiplexing described disease value computing module 11.

The improper value that described correction module 16 exports based on coded message to be corrected and improper value computing module 15 asks for correct coded message.As shown in Figure 1, described correction module 16 comprises adder.

Described time schedule controller 17 controls the computing each time that the displacement of described cyclic shifter 12 is described error location polynomial computing module 13 and provides corresponding disease value.

Preferably, described time schedule controller 17 also controls the data flow of whole Reed-Solomon decoder, it can generate corresponding control signal according to the current state of host state machine, thus realize such as Galois field multiplier, time division multiplexing that Galois Field inverts the resources such as device.

Below first the time division multiplexed process that structure realizes Galois field multiplier under the control of time schedule controller 17, Galois Field inverts device of the error location polynomial computing module 13 shown in Fig. 3 is described in detail.

As shown in Figure 3, described error location polynomial computing module 13 comprises register R1, R2, R3.Wherein, register R1 is used for the polynomial coefficient in storage errors position, the value that when being used for when money is searched for storing money search, multinomial is every simultaneously; Register R2, for storing the coefficient of B (x), is used for when good fortune Buddhist nun algorithm storing the every value of key equation w (x) multinomial simultaneously; Register R3, for storing the result of calculation of the coefficient of new error location polynomial, is updated in register R1 after B (x) has calculated.

Described error location polynomial computing module 13 also comprises 6 MUX, i.e. MUX1-MUX6, and those MUX unit select corresponding data path by the control signal that time schedule controller 17 exports, thus realize the time division multiplexing of data.

Before the iterative process of carrying out Berlekamp-Massey algorithm each time, time schedule controller 17 can export shift control signal and make cyclic shifter cyclic shift to the right, and then sending control signal selects corresponding δ to MUX1 and MUX2 _iand s _i, residing for data flow, the stage send corresponding control signal to select corresponding data flow to MUX3 and MUX4 simultaneously, such as, in calculating distance, delta _itime period, the δ that MUX3 and MUX4 can select MUX1 and MUX2 to come _iand s _ito Jia Waluo territory multiplier, then realize accumulator computing thus obtain distance, delta _iif, distance, delta _ito be 0 be only calculates xB (x) and then completes an iteration, if distance, delta _ibe not 0, then time schedule controller 17 meeting sending control signal is to MUX5, makes its chosen distance Δ _ithis road is to inverting device thus calculate obtaining rear time schedule controller 17 sends control signal to the corresponding data of MUX6 selective sequential to MUX4, time schedule controller 17 can make it select this circuit-switched data of MUX6 to MUX4 sending control signal, and time schedule controller 17 makes its chosen distance Δ also can to MUX3 sending control signal simultaneously _i, this time period Jia Waluo territory multiplier is exactly complete new error location polynomial coefficient δ like this _icalculating, simultaneously time schedule controller 17 can connect K3, thus makes the δ that upgrades _ivalue be stored in register R3.After treating that the calculating of the coefficient of 16 error location polynomials all completes, time schedule controller 17 can send control signal makes the corresponding data of its selective sequential to MUX4 to MUX2, and time schedule controller 17 can send control signal to MUX3 and MUX4 simultaneously, and MUX3 is selected the data that MUX4 selects MUX2 to come, this time period Jia Waluo territory multiplier is exactly the renewal at the coefficient completing B (x) like this, and time schedule controller 17 can connect K1 simultaneously, and the result making it upgrade is stored in register R2.After treating that the coefficient of B (x) has all calculated, time schedule controller 17 can connect K4, then the error location polynomial coefficient in register R1 is upgraded, and so far completes the iterative process of a Berlekamp-Massey algorithm.Treat that this takes turns after all iteration all complete, the coefficient of the error location polynomial stored in register R1 is exactly final required result.At this moment time schedule controller 17 sends shift control signal to cyclic shifter, makes cyclic shifter take turns in iteration accumulative cyclic shift 16 to the right clap at this, then sends control signal and make it sequentially send corresponding δ to MUX1 and MUX2 _iand s _isend control signal makes its data selecting MUX1 and MUX2 to come carry out Jia Waluo territory multiplier and accumulator computing to MUX3 and MUX4 simultaneously, so just obtain the coefficient of key equation w (x), then time schedule controller 17 is connected K2 again and is made these coefficient storage in register R2 for the computing of good fortune Buddhist nun algorithm is below prepared.Simultaneously when good fortune Buddhist nun algorithm has calculated time schedule controller also control MUX5 make it select x δ ' (x) data to invert, and then control MUX3 and MUX4 selects corresponding path to make it possible to multiplexing Jia Waluo territory multiplier to calculate final improper value.

Therefore the introducing of cyclic shifter 12 makes in calculating distance, delta _ican complete by time division multiplexing Jia Waluo territory multiplier with in the process of the coefficient of calculating key equation, and make the present invention very easily can support different check information positions (i.e. different t value), because, for different check information figure places, the degree of depth that only need arrange cyclic shifter is analog value.Simultaneously for different code length, then efficient clock number when only needing the search of controlling calculation disease value, money and key equation to calculate.So framework of the present invention just well can support the decoding of multimodal Reed-Solomon code with very little cost.

In addition, due to the control of time schedule controller 17, the Galois field multiplier reusable that error location polynomial computing module 13 comprises to perform multiplying in good fortune Buddhist nun algorithm, the Galois Field that comprises inverts device reusable to perform the inversion operation in good fortune Buddhist nun algorithm, simultaneously, time schedule controller 17 also controls the data flow of whole Reed-Solomon decoder, it can generate the control signal of corresponding control MUX1-MUX6 according to the current state of host state machine, thus realizes the time division multiplexing of resource.Fig. 7 lists the state conversion process of the host state machine of time schedule controller.

This host state machine comprises 14 states altogether, that is: state WAIT_FOR_SYND, WAIT_1ST_SYND, DECIDE, CAL0_DISCR, SHIFT_B, CAL_INV_DISCR, CAL_DISCR_X_B, CAL_INVDISCR_X_DELTA, UPDATE_DELTA_DONE, WAIT_SYND, WAIT_OMEGA, CAL_OMEGA, DONE, DONE_WAIT, the transfer process of those states is as follows:

At state WAIT_FOR_SYND, disease value computing module 11 calculates 2t+1 disease value.After disease value has calculated, then got the hang of WAIT_1ST_SYND.

At state WAIT_1ST_SYND, if 2t+1 disease value is 0 entirely, then show that pending coded message is free from mistakes, then decoding terminates, and namely get the hang of WAIT_FOR_SYND; If have non-zero disease value in 2t+1 disease value, then show wrong code word in pending coded message, then get the hang of DECIDE.

At state DECIDE, if also non-iteration 2t time, then get the hang of CAL_DISCR; Otherwise get the hang of WAIT_SYND.

At state CAL_DISCR, if the distance that error location polynomial computing module 13 this interative computation calculates is 0, then get the hang of SHIFT_B; If distance is not 0, then get the hang of CAL_INV_DISCR.

At state SHIFT_B, after shift register moves to right, error location polynomial computing module 13 starts next iteration, and get the hang of DECIDE after iteration completes.

At state CAL_INV_DISCR, the Galois Field of error location polynomial computing module 13 inverts device to Δ _icarry out inversion operation, and the CAL_DISCR_X_B that gets the hang of after having inverted.

At state CAL_DISCR_X_B, when the coefficient of all B (x) corresponding to this iteration has all calculated, then get the hang of CAL_INVDISCR_X_DELTA.

At state CAL_INVDISCR_X_DELTA, by B(x) coefficient stored in register R2, and when all error location polynomial coefficients corresponding to this iteration have all calculated or the number of root of error location polynomial is greater than the half of iterations, then get the hang of UPDATE_DELTA.

At state UPDATE_DELTA, by error location polynomial coefficient stored in after in register R1, proceed next iteration, and the DECIDE that gets the hang of after iteration completes.

At state WAIT_SYND, cyclic shifter is cyclic shift to the right, and when after this accumulative 2t that has been shifted of iterative process, get the hang of WAIT_OMEGA.

At state WAIT_OMEGA, cyclic shifter is again to the right after cyclic shift, and get the hang of CAL_OMEGA.

At state CAL_OMEGA, after carrying out the calculating of the coefficient of key equation w (x), get the hang of DONE.

At state DONE, after carrying out money search and good fortune Buddhist nun calculating, get the hang of DONE_WAIT.

At state DONE_WAIT, after correcting pending coded message, decoding terminates, and get the hang of DONE_WAIT.

Therefore, disease value computing module 11 in multi-mode Reed-Solomon decoder, the Jia Waluo territory multiplier that error location polynomial computing module 13 comprises, money search module 14, with improper value computing module 15 time division multiplexing 16 Jia Waluo territory constant multipliers, multiplexing order is as shown in table 1 below, first disease value computing module 11 needs n (code length) the individual clock cycle to calculate disease value, after disease value calculates, Galois field multiplier multiplexing Jia Waluo territory constant multiplier is to calculate the coefficient of 2t error location polynomial, then the key equation of money search module 14 and improper value computing module 15 calculates and uses Galois Field constant multiplier in the mode of table tennis, once money search have found the root of error location polynomial, Galois field multiplier can be triggered and use Galois Field constant multiplier mistake in computation value, until all positions are all searched for complete, namely the decoding of Reed-Solomon code is completed, this makes the present invention can reduce chip area and power consumption further.

Table 1:

As a kind of optimal way, aforementioned multimode formula Reed-Solomon decoder 1 also can comprise the access interface control module 18 be connected with the memory storing pending coded message, as shown in Figure 1.Preferably, access interface control module 18 comprises direct memory access (DMA) (DMA) interface control module.

Above-mentioned Reed-Solomon decoder comprises the time that DMA reads memory, completing code length is that the decoding of the Reed-Solomon code of 255 needed for 1342 clock cycle, the critical path depth of critical path and prior art is suitable simultaneously, all undertaken, 150Mhz clock frequency can be operated under 0.18um technique under by the Galois field multiplier of full parellel.Under 12Mhz clock frequency, above-mentioned Reed-Solomon decoder can reach 18.24Mbps, completely can the application demand of carrier communication.

In sum, multi-mode Reed-Solomon decoder of the present invention adopt a kind of efficient low cost, support multimodal Reed-Solomon decoder framework, and introduce a kind of full parellel Jia Waluo territory multiplier of novelty, the reusability of resource is improved further.Also combine the applied environment based on SOC (system on a chip) (SOC) simultaneously, propose and adopt DMA to share the data storage of SOC thus the storage demand of saving Reed-Solomon decoding further.The present invention only need 1 Jia Waluo territory multiplier (and due to adopt new full parellel multiplier implementation method, this multiplier only needs considerably less expense), and do not have the spending of memory, this compares the optimization that existing implementation has very large area and power consumption.

The comparison of the expense of the Reed-Solomon decoder based on framework of the present invention and existing more excellent structure listed by table 2:.

Table 2

	Area overhead
		Existing more excellent Reed-Solomon decoder	24932
Reed-Solomon decoder of the present invention	18057

Table 3 list mention in Reed-Solomon decoder of the present invention and existing patent the comparison of Reed-Solomon decoder:

Table 3

	Number of multipliers	Processing time
			General Reed-Solomon decoder	4t+1	2t+2t
The decoder of patent CN 1250980A	2	(2t)*(2t)+(2t+1)*2t
			The decoder of patent CN 101277119A	2t+1	10t
The decoder of patent CN 101325706A	(t+1)*3	6t
			Decoder of the present invention	1	(2t+1)*2t+6t

The present invention's advantage compared to existing technology mainly contain following some:

1. by rational framework and algorithm improvement, greatly reduce the area of Reed-Solomon decoder, thus reduce cost and power consumption: such as, the present invention uses and flattens Berlekamp-Massey algorithm, and serial and parallel combination realize Reed-Solomon decoding; And only employ a Galois field multiplying unit in whole decoder, and only increase considerably less control logic, have larger saving compared to existing technology.2t+1 galois field constant multiplier and t+1 Galois field multiplying unit is altogether needed in scheme as " the low hardware spending Reed-Solomon decoder of patent of invention CN 101325706A "; 2t+1 galois field constant multiplier and t/2 Galois field multiplying unit is altogether needed in the scheme of " patent of invention CN101964664A mono-kind is applicable to the multi-mode Reed-Solomon decoder structure of CMMB "; 2 Galois field multiplying units and 2t+1 galois field constant multiplier is needed in the scheme of " patent of invention CN 1250980A Read Solomon decoder and coding/decoding method ".The present invention simultaneously proposes framework and also very easily can support that more Galois field multiplying unit deals with the requirement of higher throughput.And the invention provides the more regular full parellel Galois field multiplying unit of a kind of framework (shown in Fig. 4), this full parellel Galois field multiplying unit saves area about 20% than common full parellel Galois field multiplying unit, and wherein 80% gate can with constant Galois field multiplying unit time division multiplexing, so just reduce further the area of Reed-Solomon decoder.The time-division multiplex technology that simultaneously the present invention additionally uses other makes Reed-Solomon decoder obtain less area, and such as, mistake in computation position multinomial and mistake in computation value time division multiplexing galois field are inverted device; Calculate the logic of the calculating distance of key equation coefficient time division multiplexing Berlekamp-Massey algorithm; Calculate disease value, money search, good fortune Buddhist nun algorithm and full parellel Galois field multiplying unit time division multiplexing 2t+1 galois field constant multiplier.

2. make Reed-Solomon decoder only need to increase considerably less expense by method cleverly and just can support various modes.Reed-Solomon decoder of the present invention can support the various RS codes of maximum n=255,2t=16.The present invention is reached by the degree of depth controlling disease value cyclic shifter and supports the various Reed-Solomon code with different check bit number.By controlling that disease value calculates, the iterations that calculates of money search and key equation thus support the code length of different n(Reed-Solomon codes).

3. reduced the storage requirement of Reed-Solomon decoder itself by the data storage of Appropriate application SOC framework, thus reduce costs and power consumption.All need memory cell to carry out buffer memory input information in the framework of independent Reed-Solomon decoder, after treating that improper value and errors present calculate, the pending coded message based on input carries out error correction.Such as, in the low hardware spending Reed-Solomon decoder of patent of invention CN 101325706A " scheme and the scheme of " patent of invention CN101964664A mono-kind is applicable to the multi-mode Reed-Solomon decoder structure of CMMB " have a FIFO to complete this function.And of the present invention by DMA(direct memory access (DMA)) technology directly operates the data of the data storage in the SOC belonging to self, especially can only rewrite the information of makeing mistakes, realize also fairly simple above technology, such as, after money search unit finds Error Location, good fortune Buddhist nun algorithm calculates improper value, access interface control module sends after read request pending data is read for the memory cell of Error Location carries out error correction, then the information after error correction is write back same unit, this completes the error correction of a point, and then proceed money search, until all positions are all verified.The present invention can pass through to share the data storage of DSP or MCU thus the area of saving Reed-Solomon decoder.

Above-described embodiment is illustrative principle of the present invention and effect thereof only, but not for limiting the present invention.Any person skilled in the art scholar all without prejudice under spirit of the present invention and category, can modify above-described embodiment or changes.Therefore, such as have in art usually know the knowledgeable do not depart from complete under disclosed spirit and technological thought all equivalence modify or change, must be contained by claim of the present invention.

Claims (10)

1. a multi-mode Reed-Solomon decoder for low cost, is characterized in that, the multi-mode Reed-Solomon decoder of described low cost at least comprises:

Disease value computing module, comprises 2t Galois Field constant multiplier, and for carrying out the calculating of executed in parallel disease value based on access coded message to be corrected, t is the maximum error code figure place that can correct;

Cyclic shifter, for the disease value that the described disease value computing module that is shifted calculates;

Error location polynomial computing module, is connected to described cyclic shifter output, comprises 1 Galois field multiplier and Galois Field and to invert device, perform the Berlekamp-Massey algorithm flattened ask for error location polynomial for serial;

Money search module, connects described cyclic shifter and described error location polynomial computing module output, for Search Error position;

Improper value computing module, connects described cyclic shifter, described error location polynomial computing module and money search module output, for asking for improper value based on good fortune Buddhist nun algorithm;

Correction module, input accesses coded message to be corrected and connects described improper value computing module output, for asking for correct coded message;

Time schedule controller, provides corresponding disease value for controlling the computing each time that the displacement of described cyclic shifter is described error location polynomial computing module.

2. the multi-mode Reed-Solomon decoder of low cost according to claim 1, is characterized in that: described Galois field multiplier comprises the full parellel multiplier be made up of Galois Field constant multiplier, MUX and adder.

3. the multi-mode Reed-Solomon decoder of low cost according to claim 1, characterized by further comprising: the access interface control module be connected with the memory storing pending coded message.

4. the multi-mode Reed-Solomon decoder of low cost according to claim 2, is characterized in that: the Galois Field constant multiplier that the multiplexing described disease value computing module of the Galois Field constant multiplier that described Galois field multiplier comprises comprises.

5. the multi-mode Reed-Solomon decoder of the low cost according to claim 1 or 2 or 4, is characterized in that: the Galois field multiplier that the multiplexing described error location polynomial computing module of described improper value computing module comprises is to perform the multiplying in good fortune Buddhist nun algorithm.

6. the multi-mode Reed-Solomon decoder of low cost according to claim 1, is characterized in that: the Galois Field that the multiplexing described error location polynomial computing module of described improper value computing module comprises inverts device to perform the inversion operation in good fortune Buddhist nun algorithm.

7. the multi-mode Reed-Solomon decoder of the low cost according to claim 1 or 2 or 4, is characterized in that: the Galois Field constant multiplier that the multiplexing described disease value computing module of described improper value computing module comprises is to perform the key equation computing in good fortune Buddhist nun algorithm.

8. the multi-mode Reed-Solomon decoder of low cost according to claim 1, is characterized in that: the Galois Field constant multiplier that the multiplexing described disease value computing module of described money search module comprises carrys out the search of execution error position.

9. the multi-mode Reed-Solomon decoder of low cost according to claim 1, is characterized in that: the Galois Field constant multiplier that described money search module and described improper value computing module comprise with the common multiplexing described disease value computing module of ping-pong.

10. the multi-mode Reed-Solomon decoder of low cost according to claim 1, is characterized in that: the logic of the calculating distance in the Berlekamp-Massey algorithm of the multiplexing described flattening of described improper value computing module is to calculate key equation coefficient.