CN102832952A - Low-cost multi-mode Reed-Solomon decoder - Google Patents

Abstract

The invention provides a low-cost multi-mode Reed-Solomon decoder. The decoder at least comprises a symptom value calculation module, a circular shifter, an error location polynomial calculation module, a Chien search module, an error value calculation module, a correction module and a time sequence controller, wherein the symptom value calculation module is used for carrying out symptom value calculation based on the accessed coding information to be corrected, the circular shifter is used for shifting the symptom value calculated by the symptom value calculation module, the error location polynomial calculation module is used for solving an error location polynomial by serially carrying out a flattened Berlekamp-Massey algorithm, the Chien search module is used for searching the error location, the error value calculation module is used for solving an error value by a Forney algorithm, the correction module is used for solving the correct coding information, and the time sequence controller is used for controlling the circular shifter to shift to provide corresponding symptom values to each calculation of the error location polynomial calculation module. The low-cost multi-mode Reed-Solomon decoder has the following advantages that the area of the decoder is greatly reduced, and the cost and the power consumption are further lowered.

Description

Multi-mode Reed-Solomon decoder cheaply

Technical field

The present invention relates to the decoding field, particularly relate to a kind of Reed-Solomon of multi-mode cheaply decoder.

Background technology

In radio digital communication system; Reed-Solomon (RS) sign indicating number is as important one type of forward error correction (FEC); With its good performance and high-throughput, be widely used in numerous fields, like the DVB series standard in the broadcast system, CMMB etc.; DVD in the field of data storage, blue light etc.; ITU9955 standard and China of G3 standard, release soon are about to formulate power line carrier communication standard etc. in the power line carrier communication, have all adopted the RS sign indicating number.

Along with development of wireless communication devices, many communication protocols all begin to adopt the mode of the chnnel coding of multi code Rate of Chinese character to come dealing with complicated and changeable channel, and multi code Rate of Chinese character (being multi-mode) becomes a kind of trend.Need the Reed-Solomon decoding equipment to support many code lengths and multi code Rate of Chinese character in the carrier communication standard equally, to tackle different application scenarios.For this reason, numerous research staff have developed various RS decoders.

For example; In the Chinese patent document of publication number CN 101325706A; A kind of low hardware spending Reed-Solomon decoder is disclosed; This decoder comprises that 2t+1 galois field constant multiplier (is called first Galois field multiplying unit, t=8) (is called second Galois field multiplying unit in the invention, t=8) with t+1 Galois field multiplying unit in the invention; Again for example, in the Chinese patent document of publication number CN 101964664 A, the multi-mode Reed-Solomon decoder architecture of a kind of CMMB of being applicable to is disclosed ", this decoder comprises 2t+1 galois field constant multiplier and t/2 Galois field multiplying unit; Again for example, in the Chinese patent document of publication number CN 1250980A, a kind of Read Solomon decoder and coding/decoding method are disclosed ", this decoder comprises 2 Galois field multiplying units and 2t+1 galois field constant multiplier.

Yet, because in existing carrier communication or other wireless communication standards, low-power consumption more and more becomes a crucial more index; And low cost also is one of core competitiveness of product, therefore, based on those demands, a kind of decoder of RS cheaply is provided, and has become the technical task that those skilled in the art need solve.

Summary of the invention

The shortcoming of prior art the object of the present invention is to provide a kind of Reed-Solomon of multi-mode cheaply decoder in view of the above.

For realizing above-mentioned purpose and other relevant purposes, the present invention provides a kind of Reed-Solomon of multi-mode cheaply decoder, and it comprises at least:

Disease value computing module comprises 2t Galois Field constant multiplier, is used for coming the calculating of executed in parallel disease value based on inserting coded message to be corrected, and t is the maximum error code figure place that can correct;

Cyclic shifter, the disease value that the said disease value computing module that is used to be shifted calculates;

The error location polynomial computing module is connected said cyclic shifter output, comprises 1 Galois field multiplier and the Galois Field device of inverting, and is used for serial and carries out the Berlekamp-Massey algorithm that flattens and ask for error location polynomial;

The money search module connects said cyclic shifter and said error location polynomial computing module output, is used for the Search Error position;

The improper value computing module connects said cyclic shifter, said error location polynomial computing module and money search module output, is used for asking for improper value based on good fortune Buddhist nun algorithm;

Correction module, input inserts coded message to be corrected and connects said improper value computing module output, is used to ask for correct coded message;

Time schedule controller, the displacement that is used to control said cyclic shifter comes for the computing each time of said error location polynomial computing module corresponding disease value to be provided.

Preferably, said Galois field multiplier comprises the full parallel multiplier that is made up of Galois Field constant multiplier, MUX and adder.More preferably, the Galois Field constant multiplier that comprises of the multiplexing said disease value computing module of Galois Field constant multiplier that comprises of said Galois field multiplier.

Preferably, the said Reed-Solomon of multi-mode cheaply decoder also comprises: the access interface control module that is connected with the memory of storing pending coded message.

Preferably, the Galois field multiplier that comprises of the multiplexing said error location polynomial computing module of said improper value computing module is carried out the multiplying in the good fortune Buddhist nun algorithm.

Preferably, the Galois Field that comprises of the multiplexing said error location polynomial computing module of the said improper value computing module device of inverting is carried out the inversion operation in the good fortune Buddhist nun algorithm.

Preferably, the Galois Field constant multiplier that comprises of the multiplexing said disease value computing module of said improper value computing module is carried out the key equation computing in the good fortune Buddhist nun algorithm.

Preferably, the Galois Field constant multiplier that comprises of the multiplexing said disease value computing module of the said money search module search that comes the execution error position.

Preferably, the Galois Field constant multiplier that comprises with the common multiplexing said disease value computing module of ping-pong of said money search module and said improper value computing module.

Preferably, the logic of the computed range in the Berlekamp-Massey algorithm of the multiplexing said flattening of said improper value computing module is calculated the key equation coefficient.

As stated, the Reed-Solomon of multi-mode cheaply decoder of the present invention has following beneficial effect:

1, uses flattening Berlekamp-Massey algorithm; Serial and the parallel realization Reed-Solomon decoder that combines; And only used a Galois field multiplying unit in the whole decoder, reduced the area of Reed-Solomon decoder greatly, thereby reduced cost and power consumption;

2, the degree of depth through control disease value cyclic shifter reaches the various Reed-Solomon sign indicating numbers with different check bit number of support; Thereby support the code length of different Reed-Solomon sign indicating numbers through the calculating of control disease value, money search and the iterations that key equation calculates;

3, share the data storage of the SOC(system on a chip) under self through the access interface control module, thereby save the area of Reed-Solomon decoder;

4, applied range is particularly useful for the occasion of low throughput demand.

Description of drawings

Fig. 1 is shown as the Reed-Solomon of multi-mode cheaply decoder architecture sketch map of the present invention.

Fig. 2 is shown as the disease value computing module structural representation of the Reed-Solomon of multi-mode cheaply decoder of the present invention.

Fig. 3 is shown as the error location polynomial computing module structural representation of the Reed-Solomon of multi-mode cheaply decoder of the present invention.

Fig. 4 is shown as Galois field multiplier structural representation of the present invention.

Fig. 5 is shown as the money search module structural representation of the Reed-Solomon of multi-mode cheaply decoder of the present invention.

Fig. 6 is shown as the structural representation of the calculating key equation that the Reed-Solomon of multi-mode cheaply decoder of the present invention adopted.

Fig. 7 is shown as the state exchange sketch map of host state machine of the time schedule controller of the Reed-Solomon of multi-mode cheaply decoder of the present invention.

The element numbers explanation

1 multi-mode Reed-Solomon decoder

11 disease value computing modules

12 cyclic shifter

13 error location polynomial computing modules

14 money search modules

15 improper value computing modules

16 correction modules

17 time schedule controllers

18 access interface control modules

Embodiment

Below by particular specific embodiment execution mode of the present invention is described, be familiar with this technological personage and can understand other advantages of the present invention and effect easily by the content that this specification disclosed.

See also Fig. 1 to Fig. 7.Notice; The appended graphic structure that illustrates of this specification, ratio, size etc.; All only in order to cooperate the content that specification disclosed, understanding and reading for being familiar with this technological personage, is not in order to limit the enforceable qualifications of the present invention; Event is the technical essential meaning of tool not; The adjustment of the modification of any structure, the change of proportionate relationship or size not influencing under effect that the present invention can produce and the purpose that can reach, all should still drop on disclosed technology contents and get in the scope that can contain.Simultaneously; Quoted in this specification as " on ", D score, " left side ", " right side ", " centre " reach the term of " " etc.; Also be merely be convenient to narrate clear, but not in order to limit the enforceable scope of the present invention, the change of its relativeness or adjustment; Under no essence change technology contents, when also being regarded as the enforceable category of the present invention.

As shown in the figure, the present invention provides a kind of Reed-Solomon of multi-mode cheaply decoder.Said multi-mode Reed-Solomon decoder can be supported RS (n, n-2t, t) sign indicating number, 2t=4 wherein, 8,16; 2t<n<256; Its primitive polynomial is P (x)=x ⁸+ x ⁴+ x ³+ x ²+ 1, generator polynomial does

B=0 and 1 wherein.In addition, also compatible carrier wave communication standard G3 and ITU9955 fully of said multi-mode Reed-Solomon decoder.

Below will be decoded as example with RS sign indicating number multi-mode Reed-Solomon decoder of the present invention will be detailed 2t=16.

As shown in Figure 1, multi-mode Reed-Solomon decoder 1 comprises at least cheaply: disease value computing module 11, cyclic shifter 12, error location polynomial computing module 13, money search module 14, improper value computing module 15, correction module 16 and time schedule controller 17.

Said disease value computing module 11 comes the calculating of executed in parallel disease value based on inserting coded message to be corrected, wherein, the computational algorithm of disease value as shown in the formula.

$S_i=r\left({\mathrm{\&alpha;}}^i\right)=\underset{j=0}{\overset{n-1}{\mathrm{\&Sigma;}}}{r}_j{\left({\mathrm{\&alpha;}}^i\right)}^j$

$=r_{n-1}{\left({\mathrm{\&alpha;}}^i\right)}^{n-1}+r_{n-2}{\left({\mathrm{\&alpha;}}^i\right)}^{n-2}+r_{n-3}{\left({\mathrm{\&alpha;}}^i\right)}^{n-3}+\&CenterDot;\&CenterDot;\&CenterDot;+r_0{\left({\mathrm{\&alpha;}}^i\right)}^0$

$=\left[\right[[r_{n-1}{\mathrm{\&alpha;}}^i+r_{n-2}]{\mathrm{\&alpha;}}^i+r_{n-3}]{\mathrm{\&alpha;}}^i+r_{n-4}]{\mathrm{\&alpha;}}^i+\&CenterDot;\&CenterDot;\&CenterDot;+{\mathrm{<figure-callout\; id="0"\; label="r"\; filenames="HDA00002188973300031.png"\; state="\{\{state\}\}">r</figure-callout>}}_0$

S ^-1 _i＝0

Promptly

S _i ^j＝S _i ^j-1α ⁱ+r _n-1-jw?h?er，je＝0,1,…,n-1

A kind of structure of preferred disease value computing module is as shown in Figure 2, and it comprises 2t=16 Jia Waluo territory constant multiplier.

The said cyclic shifter 12 disease value that said disease value computing module 11 calculates that is used to be shifted is so that provide corresponding disease value for the computing each time of follow-up error location polynomial computing module 13.

Said error location polynomial computing module 13 is the most complicated and modules in expensive source in the Reed-Solomon decoder; It adopts the Berlekamp-Massey algorithm of flattening, and uses serial and combine a kind of mode of Galois field multiplier to ask for error location polynomial.Wherein, the Berlekamp-Massey algorithm of flattening is following:

${\mathrm{\&Delta;}}_i=\underset{j=0}{\overset{i-1}{\mathrm{\&Sigma;}}}{\mathrm{\&sigma;}}_j^{(i-1)}{S}_{i-j}$

L _i＝Ω(i-L _i-1)+(1-Ω)L _i-1

$\left\{\begin{array}{c}{\mathrm{\&sigma;}}^{\left(i\right)}\left(x\right)={\mathrm{\&sigma;}}^{(i-1)}\left(x\right)-{\mathrm{\&Delta;}}_{i}x{B}^{(i-1)}\left(x\right)\\ B^{\left(i\right)}\left(x\right)={{\mathrm{\&Delta;}}_i}^{-1}\mathrm{\&Omega;}{\mathrm{\&sigma;}}^{(i-1)}\left(x\right)+(1-\mathrm{\&Omega;})x{B}^{(i-1)}\left(x\right)\end{array}\right.$

initial:

σ ⁽⁰⁾(x)＝1,B ⁽⁰⁾(x)＝1,L ₀＝1

ifΔ _i≠0and2L _i-1≤i-1,then,Ω＝1,else,Ω＝0

Visible by following formula, said error location polynomial computing module 13 comprises Galois field multiplier and the Galois Field device of inverting.

As shown in Figure 3, it is a kind of structural representation of preferred error location polynomial computing module 13.This error location polynomial computing module 13 comprises 1 Galois field multiplier and the Galois Field device of inverting.

Wherein, Galois field multiplier can adopt existing full parallel multiplier; Preferably, also can adopt full parallel multiplier of the present invention.As shown in Figure 4, it is a Galois field multiplier sketch map of the present invention.This Galois field multiplier is made up of Galois Field constant multiplier, MUX and adder, and compared to existing complete parallel Jia Waluo territory multiplier commonly used, Galois field multiplier framework shown in Figure 4 is more regular, and area can be practiced thrift about 20%; In addition, the Jia Waluo territory constant multiplier that 7 Jia Waluo territory constant multipliers in this Galois field multiplier can also comprise with aforementioned disease value computing module 11 carry out time division multiplexing, thus further save area.

The structure of device is known by those skilled in the art because Galois Field is inverted, so be not described in detail in this.In addition, because the part of devices in the structure of error location polynomial computing module 13 shown in Figure 3 can be multiplexing by money search module 14 and improper value computing module 15, so will detail this structure again follow-up.

Said money search module 14 comes the Search Error position based on error location polynomial, and it needs 255 clock cycle could be code length that all positions of Reed-Solomon sign indicating number of 255 all travel through one time.When δ (x) was 0, then x was the root of an error location polynomial, promptly found an effective errors present.Also obtained simultaneously x δ ' value (x).

A kind of structure of preferred money search module 14 is as shown in Figure 5.More preferably, 16 16 Galois Field constant multipliers that the aforementioned disease value of Galois Field constant multiplier reusable computing module 11 is comprised that this money search module 14 is comprised reduce shared chip area thus.

Said improper value computing module 15 is asked for improper value based on good fortune Buddhist nun algorithm, wherein, said good fortune Buddhist nun's algorithm as shown in the formula:

Key equation S (x) σ (x) ≡ w (x) (mod x ^2v+1);

${\mathrm{\&gamma;}}_i=\frac{-w\left({{\mathrm{\&beta;}}_i}^{-1}\right)}{{{\mathrm{\&beta;}}_i}^{-1}{\mathrm{\&sigma;}}^{\&prime;}\left({\mathrm{\&beta;}}_i^{-1}\right)},$

Because the denominator in the good fortune Buddhist nun algorithm obtains in the money search; So; Said improper value computing module 15 main computings are exactly the value of calculating key equation, and the logic (stating after the appearance) of the computed range of the coefficient of key equation in can the Berlekamp-Massey algorithm of multiplexing aforementioned flattening.Behind the coefficient that obtains key equation, can adopt preferred structure shown in Figure 6 to come the value of the key equation of mistake in computation position; After treating that molecule and denominator in the good fortune Buddhist nun algorithm all obtains, the device of inverting of reused error position polynomial computation module 13 is asked for improper value again.

Preferably, the Galois Field constant multiplier that can multiplexing said disease value computing module 11 comprises of the Galois Field constant multiplier in the structure shown in Figure 6.

Said correction module 16 is asked for correct coded message based on the improper value of coded message to be corrected and 15 outputs of improper value computing module.As shown in Figure 1, said correction module 16 comprises adder.

The displacement of the said cyclic shifter 12 of said time schedule controller 17 controls comes for the computing each time of said error location polynomial computing module 13 corresponding disease value to be provided.

Preferably; Said time schedule controller 17 is also controlled the data flow of whole Reed-Solomon decoder; It can generate control signal corresponding according to the current state of host state machine, the time division multiplexing of resources such as device thereby realization such as Galois field multiplier, Galois Field are inverted.

Following elder generation realizes that to the structure of error location polynomial computing module 13 shown in Figure 3 the invert time division multiplexed process of device of Galois field multiplier, Galois Field details under the control of time schedule controller 17.

As shown in Figure 3, said error location polynomial computing module 13 comprises register R1, R2, R3.Wherein, register R1 is used for the polynomial coefficient in storage errors position, the value of multinomial each item when when money is searched for, being used for simultaneously storing the money search; Register R2 is used to store the coefficient of B (x), when good fortune Buddhist nun algorithm, is used for storing simultaneously the value of key equation w (x) multinomial each item; Register R3 is used to store the result of calculation of the coefficient of new error location polynomial, treats that B (x) calculates to be updated among the register R1 after accomplishing.

Said error location polynomial computing module 13 also comprises 6 MUXs, i.e. MUX1-MUX6, and corresponding data path is selected through the control signal of time schedule controller 17 outputs in those MUX unit, thereby realizes the time division multiplexing of data.

Before carrying out the iterative process of Berlekamp-Massey algorithm each time, time schedule controller 17 can output shift control signals makes cyclic shifter cyclic shift to the right, sees control signal then off and selects corresponding δ to MUX1 and MUX2 _iAnd s _i, send control signal corresponding to select corresponding data flow according to the data flow stage of living in simultaneously, for example at the computed range Δ to MUX3 and MUX4 _iTime period, the δ that MUX3 and MUX4 can select MUX1 and MUX2 to come _iAnd s _iTo Jia Waluo territory multiplier, thereby realize that then the accumulator computing obtains distance, delta _i, if distance, delta _iBeing 0 only is to calculate xB (x) then to accomplish iteration one time, if distance, delta _iBe not 0, then time schedule controller 17 can be seen control signal off and give MUX5, makes its chosen distance Δ _iThereby calculate to the device of inverting on this road Obtaining

Back time schedule controller 17 sends control signal and gives the corresponding data of MUX6 selective sequential to MUX4; Time schedule controller 17 can be seen control signal off to MUX4 makes it select this circuit-switched data of MUX6, and time schedule controller 17 also can be seen control signal off to MUX3 and make its chosen distance Δ simultaneously _i, this time period Jia Waluo territory multiplier is exactly to accomplish new error location polynomial coefficient δ like this _iCalculating, simultaneously time schedule controller 17 can be connected K3, thereby makes the δ that upgrades _iValue be stored among the register R3.After the calculating of treating the coefficient of 16 error location polynomials is all accomplished; Time schedule controller 17 can send control signal makes the corresponding data of its selective sequential to MUX4 to MUX2; Time schedule controller 17 sends control signal can for MUX3 and MUX4 simultaneously; The data that make MUX3 select MUX4 to select MUX2 to come; This time period Jia Waluo territory multiplier is exactly the renewal at the coefficient of accomplishing B (x) like this; Time schedule controller 17 can be connected K1 simultaneously, and the result of its renewal is stored among the register R2.The coefficient of treating B (x) all calculates after the completion, and time schedule controller 17 can be connected K4, and then the error location polynomial coefficient among the register R1 obtains upgrading, and has so far accomplished the iterative process of a Berlekamp-Massey algorithm.Treat this and take turns after the whole completion of all iteration that the coefficient of the error location polynomial of storing among the register R1 is exactly final needed result.At this moment time schedule controller 17 sends the displacement control signal to cyclic shifter, makes cyclic shifter take turns accumulative total cyclic shift 16 bats to the right in the iteration at this, sends control signal then and makes it see corresponding δ in proper order off to MUX1 and MUX2 _iAnd s _iSending control signal simultaneously makes its data of selecting MUX1 and MUX2 to come carry out Jia Waluo territory multiplier and accumulator computing to MUX3 and MUX4; So just obtained the coefficient of key equation w (x), time schedule controller 17 is connected K2 again and is made these coefficient storage in register R2, prepare for the computing of good fortune Buddhist nun's algorithm of back then.Simultaneously when good fortune Buddhist nun algorithm computation is accomplished time schedule controller also control MUX5 make its select x δ ' (x) data invert, and then control MUX3 and MUX4 selection respective via make it possible to multiplexing Jia Waluo territory multiplier and calculate final improper value.

Therefore the introducing of cyclic shifter 12 makes at the computed range Δ _iWith can accomplish by a Jia Waluo territory of time division multiplexing multiplier in the process of the coefficient that calculates key equation; And make the present invention can very easily support different check information position (being different t values); Because; For different check information figure places, the degree of depth that cyclic shifter only need be set is that analog value gets final product.For different code length, the efficient clock number when then only needing control calculating disease value, money search and key equation to calculate gets final product simultaneously.So framework of the present invention just can well be supported the decoding of multimodal Reed-Solomon sign indicating number with very little cost.

In addition; Because the control of time schedule controller 17; The Galois Field that the Galois field multiplier reusable that error location polynomial computing module 13 comprises carries out multiplying in the good fortune Buddhist nun algorithm, the comprise device reusable of inverting is carried out the inversion operation in the good fortune Buddhist nun algorithm, and simultaneously, time schedule controller 17 is also controlled the data flow of whole Reed-Solomon decoder; It can generate the control signal of control corresponding MUX1-MUX6 according to the current state of host state machine, thereby realizes the time division multiplexing of resource.Fig. 7 has listed the state conversion process of the host state machine of time schedule controller.

This host state machine comprises 14 states altogether; That is: state WAIT_FOR_SYND, WAIT_1ST_SYND, DECIDE, CAL0_DISCR, SHIFT_B, CAL_INV_DISCR, CAL_DISCR_X_B, CAL_INVDISCR_X_DELTA, UPDATE_DELTA_DONE, WAIT_SYND, WAIT_OMEGA, CAL_OMEGA, DONE, DONE_WAIT, the transfer process of those states is following:

At state WAIT_FOR_SYND, disease value computing module 11 calculates 2t+1 disease value.After the disease value was calculated completion, WAIT_1ST_SYND then got the hang of.

At state WAIT_1ST_SYND, if 2t+1 disease value is 0 entirely, show that then pending coded message is free from mistakes, then decoding finishes, and WAIT_FOR_SYND promptly gets the hang of; If in 2t+1 disease value non-0 disease value is arranged, then show wrong code word in the pending coded message, DECIDE then gets the hang of.

At state DECIDE, if iteration 2t time not also, CAL_DISCR then gets the hang of; Otherwise WAIT_SYND gets the hang of.

At state CAL_DISCR, if the distance that error location polynomial computing module 13 this time interative computations are calculated is 0, SHIFT_B then gets the hang of; If distance is not 0, CAL_INV_DISCR then gets the hang of.

At state SHIFT_B, after shift register moves to right, error location polynomial computing module 13 beginning next iterations, DECIDE gets the hang of after iteration is accomplished.

At state CAL_INV_DISCR, the Galois Field of error location polynomial computing module 13 is inverted device to Δ _iCarry out inversion operation, and the CAL_DISCR_X_B that after the completion of inverting, gets the hang of.

At state CAL_DISCR_X_B, when the coefficient of corresponding all B (x) of this time iteration all calculates completion, CAL_INVDISCR_X_DELTA then gets the hang of.

At state CAL_INVDISCR_X_DELTA; The coefficient of B (x) is deposited among the register R2; And accomplish or half the greater than iterations of the number of the root of error location polynomial when all corresponding error location polynomial coefficients of this iteration all calculate, UPDATE_DELTA then gets the hang of.

At state UPDATE_DELTA, deposit in the error location polynomial coefficient among the register R1 after, proceed next iteration, and the DECIDE that after iteration is accomplished, gets the hang of.

At state WAIT_SYND, cyclic shifter is cyclic shift to the right, and after this time iterative process accumulative total had been shifted 2t, WAIT_OMEGA got the hang of.

At state WAIT_OMEGA, to the right after the cyclic shift, cyclic shifter gets the hang of CAL_OMEGA again.

At state CAL_OMEGA, carry out the calculating of coefficient of key equation w (x) after, DONE gets the hang of.

At state DONE, carry out money search and good fortune Buddhist nun calculating after, DONE_WAIT gets the hang of.

At state DONE_WAIT, after pending coded message proofreaied and correct, decoding finished, and DONE_WAIT gets the hang of.

Therefore; The Jia Waluo territory multiplier that disease value computing module 11, error location polynomial computing module 13 comprise in the multi-mode Reed-Solomon decoder, money search module 14 and 16 Jia Waluo territories of improper value computing module 15 time division multiplexinges constant multiplier; Multiplexing order is as shown in table 1 below; At first disease value computing module 11 needs the individual clock cycle of n (code length) to calculate the disease value; Treat that the multiplexing Jia Waluo of disease value calculating good back Galois field multiplier territory constant multiplier calculates the coefficient of 2t error location polynomial; Then the key equation of money search module 14 and improper value computing module 15 calculates with the mode of table tennis and uses the Galois Field constant multiplier, can trigger Galois field multiplier in case the root of error location polynomial has been found in the money search and use Galois Field constant multiplier mistake in computation value, all searches for up to all positions to finish; Promptly accomplish the decoding of Reed-Solomon sign indicating number, this makes the present invention can reduce chip area and power consumption further.

Table 1:

As a kind of optimal way, aforementioned multi-mode Reed-Solomon decoder 1 also can comprise the access interface control module 18 that is connected with the memory of storing pending coded message, and is as shown in Figure 1.Preferably, access interface control module 18 comprises direct memory access (DMA) (DMA) interface control module.

Above-mentioned Reed-Solomon decoder comprises that DMA reads the time of memory; The decoding of accomplishing code length and be 255 Reed-Solomon sign indicating number needed for 1342 clock cycle; The critical path depth of critical path and prior art is suitable simultaneously; All be to be undertaken, can be operated under the 150Mhz clock frequency under the 0.18um technology by complete parallel Galois field multiplier.Under the 12Mhz clock frequency, above-mentioned Reed-Solomon decoder can reach 18.24Mbps, application demand that fully can carrier communication.

In sum; Multi-mode Reed-Solomon decoder of the present invention adopt a kind of efficient cheaply, support multimodal Reed-Solomon decoder architecture; And introduce a kind of complete parallel Jia Waluo territory multiplier of novelty, make the reusability of resource further improve.Also combine applied environment simultaneously, thereby the data storage that has proposed to adopt DMA to share SOC is further saved the storage demand that Reed-Solomon deciphers based on SOC(system on a chip) (SOC).The present invention only needs 1 Jia Waluo territory multiplier (and because the new full parallel multiplier implementation method that adopts; This multiplier only needs considerably less expense); And do not have the spending of memory, this compares the optimization that existing implementation has very large area and power consumption.

Table 2 is listed based on the comparison of framework of the present invention with the expense of the Reed-Solomon decoder of existing more excellent structure:.

Table 2

	Area overhead
		Existing more excellent Reed-Solomon decoder	24932
Reed-Solomon decoder of the present invention	18057

Table 3 listed mention in Reed-Solomon decoder of the present invention and the existing patent the comparison of Reed-Solomon decoder:

Table 3

	Number of multipliers	Processing time
			General Reed-Solomon decoder	4t+1	2t+2t
The decoder of patent CN 1250980A	2	(2t)*(2t)+(2t+1)*2t
			The decoder of patent CN 101277119A	2t+1	10t
The decoder of patent CN 101325706A	(t+1)*3	6t
			Decoder of the present invention	1	(2t+1)*2t+6t

The advantage that the present invention compares prior art mainly contain following some:

1. improve through rational framework and algorithm; Reduced the area of Reed-Solomon decoder greatly; Thereby reduced cost and power consumption: for example, the present invention uses and flattens the Berlekamp-Massey algorithm, and serial realizes Reed-Solomon decoding with parallel combination; And only used a Galois field multiplying unit in the whole decoder, and only increased considerably less control logic, comparing prior art has bigger saving.Need 2t+1 galois field constant multiplier and t+1 Galois field multiplying unit altogether in the scheme like " patent of invention CN 101325706A hangs down hardware spending Reed-Solomon decoder "; Need 2t+1 galois field constant multiplier and t/2 Galois field multiplying unit altogether in the scheme of " patent of invention CN101964664A multi-mode Reed-Solomon decoder architecture that is applicable to CMMB "; Need 2 Galois field multiplying units and 2t+1 galois field constant multiplier in the scheme of " patent of invention CN 1250980A Read Solomon decoder and coding/decoding method ".The present invention simultaneously proposes framework and also can very easily support more Galois field multiplying unit to deal with the requirement of higher throughput.And the invention provides the more regular complete parallel Galois field multiplying unit (shown in Figure 4) of a kind of framework; Should save area about 20% than common complete parallel Galois field multiplying unit by complete parallel Galois field multiplying unit; And wherein 80% gate can with constant Galois field multiplying unit time division multiplexing, so further reduced the area of Reed-Solomon decoder.The present invention has simultaneously also adopted other time-division multiplex technology to make the Reed-Solomon decoder obtain littler area, for example, and mistake in computation position multinomial and the mistake in computation value time division multiplexing galois field device of inverting; Calculate the logic of the computed range of key equation coefficient time division multiplexing Berlekamp-Massey algorithm; Calculate disease value, money search, good fortune Buddhist nun's algorithm and parallel full 2t+1 galois field constant multiplier of Galois field multiplying unit time division multiplexing.

2. make the Reed-Solomon decoder only need increase considerably less expense through method cleverly and just can support various modes.Reed-Solomon decoder of the present invention can be supported maximum n=255, the various RS sign indicating numbers of 2t=16.The present invention reaches the various Reed-Solomon sign indicating numbers with different check bit number of support through the degree of depth of control disease value cyclic shifter.Thereby support different n (code length of Reed-Solomon sign indicating number) with the iterations that key equation calculates through the calculating of control disease value, money search.

3. reduce the storage requirement of Reed-Solomon decoder itself through the data storage that rationally utilizes the SOC framework, thereby reduce cost and power consumption.All need memory cell to come the buffer memory input information in the framework of independent Reed-Solomon decoder, treat that improper value and errors present calculate after, based on the input pending coded message carry out error correction.For example, at the low hardware spending Reed-Solomon decoder of patent of invention CN 101325706A " scheme and the scheme of " patent of invention CN101964664A multi-mode Reed-Solomon decoder architecture that is applicable to CMMB " all have a FIFO to accomplish this function.And of the present inventionly directly the data of the data storage on the SOC chip under self are operated through DMA (direct memory access (DMA)) technology, especially can only the information of makeing mistakes be rewritten, realization is also fairly simple above the technology; For example; After the money search unit was found the Error Location, good fortune Buddhist nun's algorithm computation value of making mistake, access interface control module were sent to the memory cell of Error Location and are carried out error correction after the read request pending data is read; Write back same unit to the information after the error correction then; So just accomplished the error correction of a point, and then proceeded the money search, all checked up to all positions to finish.Thereby the present invention can save the area of Reed-Solomon decoder through the data storage of sharing DSP or MCU.

The foregoing description is illustrative principle of the present invention and effect thereof only, but not is used to limit the present invention.Any be familiar with this technological personage all can be under spirit of the present invention and category, the foregoing description is modified or is changed.Therefore, have common knowledge the knowledgeable in the affiliated such as technical field, must contain by claim of the present invention not breaking away from all equivalence modifications of being accomplished under disclosed spirit and the technological thought or changing.

Claims (10)

1. multi-mode Reed-Solomon decoder cheaply is characterized in that the said Reed-Solomon of multi-mode cheaply decoder comprises at least:

Disease value computing module comprises 2t Galois Field constant multiplier, is used for coming the calculating of executed in parallel disease value based on inserting coded message to be corrected, and t is the maximum error code figure place that can correct;

Cyclic shifter, the disease value that the said disease value computing module that is used to be shifted calculates;

The error location polynomial computing module is connected said cyclic shifter output, comprises 1 Galois field multiplier and the Galois Field device of inverting, and is used for serial and carries out the Berlekamp-Massey algorithm that flattens and ask for error location polynomial;

The money search module connects said cyclic shifter and said error location polynomial computing module output, is used for the Search Error position;

The improper value computing module connects said cyclic shifter, said error location polynomial computing module and money search module output, is used for asking for improper value based on good fortune Buddhist nun algorithm;

Correction module, input inserts coded message to be corrected and connects said improper value computing module output, is used to ask for correct coded message;

Time schedule controller, the displacement that is used to control said cyclic shifter comes for the computing each time of said error location polynomial computing module corresponding disease value to be provided.

2. the Reed-Solomon of multi-mode cheaply decoder according to claim 1, it is characterized in that: said Galois field multiplier comprises the full parallel multiplier that is made up of Galois Field constant multiplier, MUX and adder.

3. the Reed-Solomon of multi-mode cheaply decoder according to claim 1 is characterized in that also comprising: the access interface control module that is connected with the memory of storing pending coded message.

4. the Reed-Solomon of multi-mode cheaply decoder according to claim 2 is characterized in that: the Galois Field constant multiplier that the multiplexing said disease value computing module of the Galois Field constant multiplier that said Galois field multiplier comprises comprises.

5. according to claim 1 or the 2 or 4 described Reed-Solomon of multi-mode cheaply decoders, it is characterized in that: the Galois field multiplier that the multiplexing said error location polynomial computing module of said improper value computing module comprises is carried out the multiplying in the good fortune Buddhist nun algorithm.

6. the Reed-Solomon of multi-mode cheaply decoder according to claim 1 is characterized in that: the Galois Field that the multiplexing said error location polynomial computing module of said improper value computing module the comprises device of inverting is carried out the inversion operation in the good fortune Buddhist nun algorithm.

7. according to claim 1 or the 5 described Reed-Solomon of multi-mode cheaply decoders, it is characterized in that: the Galois Field constant multiplier that the multiplexing said disease value computing module of said improper value computing module comprises is carried out the key equation computing in the good fortune Buddhist nun algorithm.

8. the Reed-Solomon of multi-mode cheaply decoder according to claim 1 is characterized in that: the search that the Galois Field constant multiplier that the multiplexing said disease value computing module of said money search module comprises comes the execution error position.

9. the Reed-Solomon of multi-mode cheaply decoder according to claim 1 is characterized in that: the Galois Field constant multiplier that said money search module and said improper value computing module comprise with the common multiplexing said disease value computing module of ping-pong.

10. the Reed-Solomon of multi-mode cheaply decoder according to claim 1, it is characterized in that: the logic of the computed range in the Berlekamp-Massey algorithm of the multiplexing said flattening of said improper value computing module is calculated the key equation coefficient.

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