CN102546336A

CN102546336A - IEEE (Institute of Electrical and Electronics Engineers)-1394b optical bus protocol converter based on Versa PHY (Physical Layer)

Info

Publication number: CN102546336A
Application number: CN2011104479810A
Authority: CN
Inventors: 伊小素; 王明; 张春熹; 龙映雪; 朱榆涵
Original assignee: Beihang University
Current assignee: Beihang University
Priority date: 2011-12-28
Filing date: 2011-12-28
Publication date: 2012-07-04

Abstract

The invention discloses an IEEE (Institute of Electrical and Electronics Engineers)-1394b optical bus protocol converter based on a Versa PHY (Physical Layer), which comprises a photoelectric conversion module, an IEEE 1394 protocol module and a central processing module, wherein the photoelectric conversion module is used for converting data received from an IEEE 1394 optical bus into an electrical signal and sending the electrical signal to the IEEE 1394 protocol module and is used for converting data received from the IEEE 1394 protocol module into an optical signal and sending the optical signal onto the IEEE 1394 optical bus; the IEEE 1394 protocol module is used for sending the electrical signal sent by the photoelectric conversion module after conversion by an IEEE 1394 protocol to the central processing module and is used for sending data sent by the central processing module after conversion by the IEEE 1394 protocol to the photoelectric conversion module; and the central processing module is used for sending the data sent by the IEEE 1394 protocol module after conversion by a Versa PHY protocol and is used for sending the received data after conversion by the Versa PHY protocol to the IEEE 1394 protocol module. According to the IEEE-1394b optical bus protocol converter based on the Versa PHY, the system design is simplified, the cost is saved, the power consumption is reduced and the real-time performance of protocol conversion is increased.

Description

A kind of IEEE-1394b light bus protocol transducer based on VersaPHY

Technical field

The present invention relates to a kind of IEEE-1394b light bus protocol transducer, belonged to IEEE-1394b protocol conversion technology field based on VersaPHY.

Background technology

IEEE 1394 buses form standard by Apple company exploitation in 1986 and in 1987, and present IEEE 1394b agreement has adopted new arbitration mode and coded system, supports Optical Fiber Transmission simultaneously, and bandwidth is supported 3.2Gbps, has greatly improved transmission performance.Because the real-time of IEEE 1394b bus is good, transmission rate is high, topology is flexible, expansion is easy and support hot plug, becomes one of candidate's bussing technique of Aero-Space of future generation, industrial control field.

No matter be at present at aerospace field, military field and industrial control field; Usually adopt different bus protocols according to different transfer of data demands; Like IEEE 1394b, FC, USB, CAN, RS232, RS485 etc.; Protocol converter can provide path between the equipment for the employing different agreement, thereby improves the compatibility and the autgmentability of system, saves system design time and cost.

Prior art has adopted a kind of IEEE-1394b bus and CAN bus protocol transducer based on microprocessor; This transducer provides the transducer between CAN bus and the IEEE 1394b bus protocol, has comprised CAN control chip, microprocessor, IEEE 1394b bus control unit and photoelectric conversion module in its structure.In this design, adopted the MPC5200 microprocessor as core, realize control based on embedded OS to CAN and IEEE 1394b protocol chip.

In above-mentioned protocol converter design, owing to adopt the MPC5200 microprocessor, utilize the software program realization CAN of operating system and the protocol conversion of IEEE 1394b as core, this control mode has following shortcoming:

1, the wasting of resources.MPC5200 has abundant extended resources, like CAN, IIC, USB, PCI, GPIO and Ethernet interface; Utilize MPC5200 only to realize protocol conversion function; Wasted this processor ample resources; Need there be FLASH and SDRAM could realize the MPC5200 operate as normal in the simultaneity factor, cause design cost greatly to improve, and also cause power consumption to increase several times at work;

2, inefficiency.Protocol conversion based on the embedded OS exploitation; Need to realize the driver of CAN and IEEE 1394b protocol chip and design upper level applications and realize protocol conversion; This soft implementation, cause conversion efficiency low, postpone greatly, will worsen the performance of system for real-time messages.

Summary of the invention

The present invention has proposed a kind of IEEE-1394b light bus protocol transducer based on VersaPHY for solving system complex, the wasting of resources, power consumption height and the high problem of cost that existing IEEE-1394b bus and CAN bus protocol transducer exist, and comprising:

Photoelectric conversion module, being used for the data transaction that receives from IEEE 1394 smooth buses is that the signal of telecommunication sends to the IEEE1394 protocol module, and will be that light signal sends on the IEEE 1394 smooth buses from the data transaction that IEEE 1394 protocol modules receive;

IEEE 1394 protocol modules; Send to central processing module after signal of telecommunication process IEEE 1394 protocol conversions that are used for photoelectric conversion module is sent, and send to photoelectric conversion module after data process IEEE 1394 protocol conversions with the central processing module transmission;

Central processing module; Send to RS232 interface, CAN interface or GPIO interface after the data process VersaPHY protocol conversion that is used for IEEE 1394 protocol modules are sent, and send to IEEE 1394 protocol modules after the data process VersaPHY protocol conversion with RS232 interface, CAN interface or the transmission of GPIO interface.

Can find out by technique scheme; Bus protocol transducer provided by the invention adopts the VersaPHY agreement; The VersaPHY agreement is expanded based on IEEE 1394b physical chip, and expansion passes through FPGA to be realized, thereby has deducted the use of link layer chip; Compare embedded microprocessor, simplified system design, provided cost savings, reduced power consumption and improved the real-time of protocol conversion.In order to improve the autgmentability of agreement, realize the conversion between IEEE1394b and the multiple interfaces in addition,, and realized that GPIO adapts to the demand of different application like RS232, CAN through FPGA.

Description of drawings

Fig. 1 is the structural representation based on the IEEE-1394b light bus protocol transducer of VersaPHY that the specific embodiment of the invention provides;

Fig. 2 is the hardware block diagram based on the IEEE-1394b light bus protocol transducer of VersaPHY that the specific embodiment of the invention provides;

Fig. 3 is the EP2C5T144 internal truss frame structure figure that the specific embodiment of the invention provides;

Fig. 4 is EP2C5T144 and the TSB81BA3 connecting circuit figure that the specific embodiment of the invention provides;

Fig. 5 is photoelectric conversion module and the IEEE 1394 protocol module connecting circuit sketch mapes that the specific embodiment of the invention provides;

Fig. 6 is the FPGA multi-protocols module circuit diagram that the specific embodiment of the invention provides;

Fig. 7 is the IEEE 1394b packet sketch map of the VersaPHY form that provides of the specific embodiment of the invention;

Fig. 8 is that the VersaPHY packet that the specific embodiment of the invention provides converts multi-protocols program circuit sketch map into;

Fig. 9 is that the RS232 data transaction that embodiment of the present invention provides is a VersaPHY packet flow process sketch map;

Figure 10 is that the CAN data transaction that embodiment of the present invention provides is a VersaPHY packet flow process sketch map;

Figure 11 is that the VersaPHY packet that embodiment of the present invention provides is ordered schematic flow sheet for reading GPIO.

Embodiment

The specific embodiment of the invention provides a kind of IEEE-1394b light bus protocol transducer based on VersaPHY, it is characterized in that, and is as shown in Figure 1, comprising:

Photoelectric conversion module 11; Being used for to be that the signal of telecommunication sends to IEEE1394 protocol module 12 from the data transaction that IEEE 1394 smooth buses receive, and will be that light signal sends on the IEEE1394 light bus from the data transaction that IEEE 1394 protocol modules 12 receive;

IEEE 1394 protocol modules 12; Send to central processing module 13 after signal of telecommunication process IEEE 1394 protocol conversions that are used for photoelectric conversion module 11 is sent, and send to photoelectric conversion module 11 after data process IEEE 1394 protocol conversions with central processing module 13 transmissions;

Central processing module 13; Send to RS232 interface, CAN interface or GPIO interface after the data process VersaPHY protocol conversion that is used for IEEE 1394 protocol modules 12 are sent, and send to IEEE 1394 protocol modules 12 after the data process VersaPHY protocol conversion with RS232 interface, CAN interface or the transmission of GPIO interface.

Concrete; Fig. 2 is the hardware block diagram of this embodiment, and system is made up of central processing module 13 (EP2C5T144), IEEE 1394 protocol modules 12 (TSB81BA3), RS232 controller (MAX232), CAN controller (SJA1000) and photoelectric conversion module 11 (FTLF8519).

In the hardware configuration of this embodiment; As shown in Figure 3; Adopt the core processor of the fpga chip EP2C5T144 of altera corp as protocol conversion; It connects IEEE 1394b physical chip (IEEE 1394 protocol modules 12), RS232 control chip and CAN protocol chip, and GPIO is provided.In order to realize the function of protocol conversion, its inside comprises following module: VersaPHY submodule, packet route, six road FIFO, UART register, CAN register, GPIO register, RS232 logic, CAN logic and GPIO logic.The VersaPHY submodule is used for after the IEEE 1394 protocol modules process VersaPHY protocol conversion; Carry out exchanges data with UART register, CAN register and GPIO register respectively through packet route and six road FIFO, UART register, CAN register and GPIO register are used for carrying out exchanges data through RS232 logic, CAN logic and GPIO logical AND RS232 interface, CAN interface or GPIO interface respectively.

In with upper module, RS232 logic, CAN logic, GPIO logic and VersaPHY module are responsible for respectively and RS232 transceiver, CAN controller, GPIO interface and IEEE 1394b physical layer are SECO, realize working alone of each interface.And the packet route is the core of transfer of data between VersaPHY module and other interfaces; When the packet that receives from the VersaPHY module; The packet route deposits bag in the corresponding interface register in according to register offset address in the packet, and each interface module will send from the data that the packet route is received according to the state of corresponding registers; Equally, the data that receive from each interface can send to the packet route through FIFO, and the packet route sends to IEEE 1394b physical layer with the data that obtain through the VersaPHY module.

FPGA and IEEE 1394b physical chip interconnection circuit are as shown in Figure 4.Main signal between the two comprises: data-signal D [0:7], control signal CTL [0:1], link layer request signal LREQ, power state signal LPS, PHY interrupt PINT, physical layer clock PCLK, link layer clock LCLK.FPGA realizes carrying out transfer of data with IEEE 1394b physical chip through control signal and data-signal.

The design of IEEE 1394b physical layer signal opto-electronic conversion is as shown in Figure 5.Optical module selects to have the FTLF8519 series of SFP standard packaging, its with IEEE 1394b physical layer between through impedance matching network 1～4 interconnection, the while has increased comparator and level switch in order to improve reliability.Comparator is used for the data transmission and enables, and enables optical module work thereby when physical layer has data to send, will produce low level; Level switch is used for Data Receiving and enables, when optical module receives data unblocked level transition enabled when sending to physical layer.Design through comparator and level conversion can effectively reduce the error code that produces in the photoelectric conversion process, improves transmission reliability.

FPGA multi-protocols modular circuit is shown in 6.Multi-protocols module based on FPGA mainly contains RS232, CAN, GPIO.In inner RS232 logic, CAN logic and the GPIO logic of EP2C5T144 as multi-protocols circuit control module:

1, the RS232 logic module directly connects the transceiver MAX3232 realization RS232 interface of RS232;

2, the CAN logic module is connected with CAN controller SJA1000 and realizes the CAN protocol interface through transceiver 82C251;

3, the GPIO logic directly provides the GPIO interface to be used for the various device connection.

This embodiment realizes IEEE 1394b light bussing technique and various protocols modular converter based on VersaPHY technology, in programming, realizes the conversion of agreement based on the VersaPHY label that proposes in the VersaPHY standard, VersaPHY register, VersaPHY packet.In design, the VersaPHY packet has wherein comprised the operating state that corresponding VersaPHY label and VersaPHY register information are indicated protocol converter as the elementary cell of transfer of data.The VersaPHY data packet format is as shown in Figure 7.

The VersaPHY label is one 14 bit data, and wherein preceding 6 are expression bus space, back 8 bit representation device labels.For this protocol converter, adopted the mode of static VersaPHY label, device label is set to fixedly VP_Label value (it is 8 bit data), and promptly this node is that the packet of VP_Label carries out protocol conversion to label in the network.

The VersaPHY register is used for indicating the concrete function of VersaPHY module.In design, have three registers group: RS232 register, CAN register and GPIO register.These three groups of registers are respectively applied for the conversion of different agreement.LReg_Off represents the relevant register group in packet, and Blk_Number represents relevant register in the registers group.VersaPHY makes protocol conversion trigger according to LReg_Off in the VersaPHY packet of receiving and definite data are deposited in of Blk_Number value in the corresponding registers.

FPGA is responsible for whole protocol conversion flow process in protocol conversion,, comprising to shown in Figure 10 like Fig. 8: the VersaPHY packet converts RS232 into and CAN packet, RS232 and CAN packet convert VersaPHY packet, control GPIO input and output into.Wherein need read the GPIO state and design, promptly when the VersaPHY packet is ordered for reading GPIO, need the GPIO register value is returned through the VersaPHY packet the control of GPIO.

If the VersaPHY packet is for reading GPIO when order, convert in the multi-protocols program circuit GPIO at the packet of VersaPHY shown in the 2.2.3.1 and read register and be set to 1,, carries out GPIO flow process shown in figure 11 when reading register and be 1.

The technical scheme that adopts this embodiment to provide has following technique effect:

1. the present invention adopts the VersaPHY agreement, reduces the use of IEEE1394 link layer chip, and simplified design reduces cost;

2. the present invention adopts the VersalPHY agreement, compatible IEEE1394 physical chip, and compatible IEEE1394 agreement helps promoting;

3. the present invention adopts FPGA to realize VersaPHY expansion module function; And in FPGA, realize the conversion of many interface protocols and IEEE1394b agreement; Avoid adopting independent, improved the integrated level and the compatibility of system design for processor controls realizes protocol conversion;

4. the present invention realizes the conversion of multiple low speed bus agreement and IEEE 1394 agreements in a fpga chip, has realized the integrated of many low-speed interfaces in the one chip, improves the integrated level of system, reduces cost, and helps the popularization of IEEE1394 bus.

The above; Be merely the preferable embodiment of the present invention, but protection scope of the present invention is not limited thereto, any technical staff who is familiar with the present technique field is in the technical scope that the present invention discloses; The variation that can expect easily or replacement all should be encompassed within protection scope of the present invention.

Claims

1. the IEEE-1394b light bus protocol transducer based on VersaPHY is characterized in that, comprising:

2. the IEEE-1394b light bus protocol transducer based on VersaPHY according to claim 1; It is characterized in that; Said central processing module comprises VersaPHY submodule, packet route, six road FIFO, UART register, CAN register, GPIO register, RS232 logic, CAN logic and GPIO logic; The VersaPHY submodule is used for after the IEEE 1394 protocol modules process VersaPHY protocol conversion; Carry out exchanges data with UART register, CAN register and GPIO register respectively through packet route and six road FIFO, UART register, CAN register and GPIO register are used for carrying out exchanges data through RS232 logic, CAN logic and GPIO logical AND RS232 interface, CAN interface or GPIO interface respectively.

3. the IEEE-1394b light bus protocol transducer based on VersaPHY according to claim 1; It is characterized in that; Said IEEE 1394 protocol modules comprise comparator; Be used for the data transmission and enable, enable photoelectric conversion module work thereby when IEEE 1394 protocol modules have data to send, will produce low level; Said photoelectric conversion module comprises level switch, is used for Data Receiving and enables, when photoelectric conversion module receives data and sends to unblocked level transition enabled when stating IEEE 1394 protocol modules.