CN102298314B - Smooth transition timing method for timed equipment in intelligent power equipment timing system - Google Patents
Smooth transition timing method for timed equipment in intelligent power equipment timing system Download PDFInfo
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- CN102298314B CN102298314B CN 201110254885 CN201110254885A CN102298314B CN 102298314 B CN102298314 B CN 102298314B CN 201110254885 CN201110254885 CN 201110254885 CN 201110254885 A CN201110254885 A CN 201110254885A CN 102298314 B CN102298314 B CN 102298314B
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Abstract
The invention discloses a smooth transition timing method for timed equipment in an intelligent power equipment timing system. The method comprises the following steps of: (1) receiving timing signals, counting the timing signals by using an internal crystal oscillation clock, and recording the interval counting value C1 of timing edges of two times, namely obtaining a whole second counting value of the timing clock; (2) when the whole second counting value of the internal crystal oscillation clock is a constant C2, calculating the whole second counting difference delta C1=C1-C2 between the internal clock and the timing clock; and obtaining the time difference delta C2 of the new and old clocks by measuring the time point; and (3) generating the frequency f of the device system by an intelligent averaging method, wherein the intelligent averaging method means to average the whole second counting difference delta C1 and the time difference delta C2 of the new and old clocks to one second. The intelligent averaging method is adopted in the timing system, so that the timed equipment radically avoids system frequency discontinuity in the timing process, and data loss and error in the intelligent power system are prevented. The method is low in resource consumption and easy to implement, the calorific power of the device is reduced, and the operating stability of the device is further enhanced.
Description
Technical field
The present invention relates to be a kind of intelligent power equipment to the time system in, when receiving equipment to the time smooth transient method in the process, belong to Automation of Electric Systems manufacturing technology field.
Background technology
Along with the continuous popularization of intelligent grid scale, electrical network is intelligent, the power station is information-based, equipment digitalized, and the network system structure is also increasingly sophisticated, and is more and more important thereby the clock synchronization of electric system just seems.Thus, Clock Synchronization Technology is used widely in electric system.At present, clock synchronization has been applied to data processing and ultra-high-tension power transmission line fault localization of double sampling system, intelligent primary equipment system, electric power dispatching system, protective relaying device, EMS, fault oscillograph, distributed remote terminal unit, comprehensive automation system of transformer substation and remote measurement, remote signalling etc.
Time synchronized comprises that Absolute Time Synchronization and relative time are synchronous.The former is meant with universal time synchronous, and the latter is meant an intrasystem each several part clock synchronization.For the wide area clock synchronization system, what mainly use is that relative time is synchronous, if but can guarantee that clock reaches Absolute Time Synchronization, it is synchronous just to satisfy relative time so naturally.High-precise synchronization clock signal based on GPS (GPS) has extensive utilization in electric system; But exist problem such as satellite losing lock to cause the problem of synchronizing clock signals step-out in the practical application, the therefore normal synchronizing clock signals of homemade Big Dipper GPS that adopts replenishes subsequent use with it each other.Often occur in the realization system thus step-out and again to the time process.
To the time process in because mistiming of new and old clock is a random number, the relative time clock of device systems will produce sudden change in various degree when respectively receiving.This sudden change possibly influence the data-signal that relies on clock to be handled, and produces beyond thought fault.For example, the protective device malfunction and the tripping that cause unusually of sampled data.Usually system uses the method that improves data sampling rate with the reduction rate of breakdown, but the method consumption has increased the device thermal value than multi-system resource, and does not fundamentally solve contingent failure problems, and also operation has brought labile factor to device.
Summary of the invention
To the deficiency that exists on the prior art, the object of the invention provide a kind of intelligent power equipment to the time system in, equipment seamlessly transits setting means when receiving, and can make when receiving equipment avoid frequency discontinuity, to prevent loss of data and mistake in the intelligent electric power system.
To achieve these goals, the present invention realizes through following technical scheme:
A kind of intelligent power equipment to the time when receiving in the system equipment seamlessly transit setting means, its step is following:
(1) receive to the time signal, with inner crystal oscillator clock count, the interval count value C1 on edge when writing down twice couple, be to the time clock whole second of count value.
(2) the whole second count value of inner crystal oscillator clock is a constant C 2, calculating can get internal clocking with to the time clock whole second count difference △ C1=C1-C2; The mistiming that Measuring Time point can get new and old clock is △ C2;
(3) share out equally method generation device system frequency f through intelligence, it is with the mistiming △ C2 of new and old clock that this intelligence is shared out equally method, divides equally in one second.
In the above-mentioned steps (1), if be pps pulse per second signal, directly use pulse edge be to the time edge; If be the IRIG-B coded signal, decoding earlier find to the time code element, again with this code element rising edge be to the time edge.
In the above-mentioned steps (3):
A) when not to the time state under, apparatus system frequency pulse f is produced by inner crystal oscillator clock C2;
B) when to the time state under, apparatus system frequency pulse f, by inner crystal oscillator clock weigh to the time clock 1 second C1 produce;
C) when to the time process in, apparatus system frequency pulse f, by inner crystal oscillator clock weigh to the time clock 1 second C1 and new and old clock time difference △ C2 generation.
The intelligence that generation device system frequency pulse f adopts in the above-mentioned steps (A) is shared out equally method and is: every N count value produces a pulse, can get f=C/N thus.
The intelligence that the generation device system frequency pulse f of above-mentioned steps (B) adopts is shared out equally method and is: preceding y pulse produces a pulse by N+x+1 count value, and later pulse produces a pulse by N+x count value; Wherein, whole second count difference △ C1 is x divided by the merchant of system frequency f, and remainder is y.
The intelligence that above-mentioned steps (C) generation device system frequency pulse f adopts is shared out equally method and is: preceding b pulse produces a pulse by N+a+1 count value, and later pulse produces a pulse by N+a count value; Wherein, (△ C1+ △ C2) is a divided by the merchant of f, and remainder is b.
The present invention compares the beneficial effect that is reached with the way of existing generation system frequency:
To the time system in; The present invention shares out equally method through adopting intelligence; With the mistiming of new and old clock, divide equally in one second, make seamlessly transit system clock fundamentally avoid to the time system frequency sudden change in the process; Can make when receiving equipment avoid frequency discontinuity, to prevent loss of data and mistake in the intelligent electric power system.Consumed resource of the present invention is little, is easy to realize, has reduced the device thermal value, and then has strengthened the device operation stability.
Description of drawings
Specify the present invention below in conjunction with accompanying drawing and embodiment;
Fig. 1 is a principle flow chart of the present invention;
Fig. 2 for the present invention not to the time intelligence under the state share out equally the method synoptic diagram;
Fig. 3 for the present invention to the time intelligence under the state share out equally the method synoptic diagram;
Fig. 4 for the present invention to the time intelligence in the process share out equally method contrast synoptic diagram;
Fig. 5 for the present invention to the time intelligence in the process share out equally the method synoptic diagram.
Embodiment
For technological means, creation characteristic that the present invention is realized, reach purpose and effect and be easy to understand and understand, below in conjunction with embodiment, further set forth the present invention.
For making the stable operation more of full station system, the present invention will use intelligence share out equally method seamlessly transit equipment when respectively receiving to the time process system clock, avoid sudden change to take place.
Fig. 1 is a principle flow chart of the present invention; The present invention be applied in intelligent power equipment to the time system in; When receiving equipment to the time smooth transient method in the process; It has adopted intelligence to share out equally method; Be mistiming, divide equally in one second new and old clock, make seamlessly transit system clock fundamentally avoid to the time system frequency sudden change in the process.Its detailed step is following:
(a) record old times clock count value; At first, old times clock count value is carried out record.
(b) obtain to the time signal; Then, with inner crystal oscillator clock count, the interval count value C1 on edge when writing down twice couple, be to the time clock whole second count value.
(c) judge signal type; If be pps pulse per second signal, directly use pulse edge be to the time edge, promptly directly get into step (d); If be the IRIG-B coded signal, decoding earlier find to the time code element, again with this code element rising edge be to the time edge, promptly through decoding back entering step (d).
(d) new clock count value of record and the new and old clock count value difference of record; Whole second count value of inner crystal oscillator clock is constant C 2, calculating can get internal clocking with to the time clock whole second count difference △ C1=C1-C2; The mistiming that Measuring Time point can get new and old clock is △ C2.
(e) intelligence is shared out equally method and is produced system frequency f; Share out equally method through intelligence and produce system frequency f and then return step (a), circulation successively, thereby with mistiming of new and old clock, divide equally in one second, seamlessly transit system clock, fundamentally avoid to the time system frequency sudden change in the process.
The method that intelligence in the following steps (e) under the different conditions is shared out equally method is following:
Not to the time state under, apparatus system frequency pulse f is produced by inner crystal oscillator clock C2.Method is that every N count value produces a pulse.Can get f=C2/N thus, be illustrated in fig. 2 shown below.
To the time state under, apparatus system frequency pulse f, by inner crystal oscillator clock weigh to the time clock 1 second C1 produce.Wherein, whole second count difference △ C1 is x divided by the merchant of system frequency f, and remainder is y.Method is that preceding y pulse produces a pulse by N+x+1 count value, and later pulse produces a pulse by N+x count value, is illustrated in fig. 3 shown below.
As shown in Figure 4, to the time process in, be prone to produce the system frequency sudden change.In order to prevent system frequency sudden change, apparatus system frequency pulse f, by inner crystal oscillator clock weigh to the time clock 1 second C1 and new and old clock time difference △ C2 generation.Wherein, (△ C1+ △ C2) is a divided by the merchant of f, and remainder is b.Method is that preceding b pulse produces a pulse by N+a+1 count value, and later pulse produces a pulse by N+a count value, and is as shown in Figure 5.
In sum, to the time system in, the present invention can make when receiving equipment avoid frequency discontinuity, to prevent loss of data and mistake in the intelligent electric power system.The way of traditional raising system frequency has expended a large amount of system resources, has increased the device thermal value, and also operation has brought labile factor to device.Consumed resource of the present invention is little, is easy to realize, has reduced the device thermal value, and then has strengthened the device operation stability.
More than show and described ultimate principle of the present invention and principal character and advantage of the present invention.The technician of the industry should understand; The present invention is not restricted to the described embodiments; That describes in the foregoing description and the instructions just explains principle of the present invention; Under the prerequisite that does not break away from spirit and scope of the invention, the present invention also has various changes and modifications, and these variations and improvement all fall in the scope of the invention that requires protection.The scope of the claimed invention by the appended claims and their equivalents defined
.
Claims (2)
- An intelligent power equipment to the time when receiving in the system equipment seamlessly transit setting means, it is characterized in that its step is following:(1) receive to the time signal, with inner crystal oscillator clock count, the interval count value C1 on edge when writing down twice couple, be to the time clock whole second of count value;(2) the whole second count value of inner crystal oscillator clock is a constant C 2, calculating can get internal clocking with to the time clock whole second count difference △ C1=C1-C2; The mistiming that Measuring Time point can get new and old clock is △ C2;(3) share out equally the corresponding pulse of method generation device system frequency f through intelligence, it is with the mistiming △ C2 of new and old clock that this intelligence is shared out equally method, divides equally in one second;In the above-mentioned steps (3):A) not to the time state under, the corresponding pulse of apparatus system frequency f is shared out equally method by inner crystal oscillator clock C2 through intelligence and is produced;B) to the time state under, the corresponding pulse of apparatus system frequency f, by inner crystal oscillator clock weigh to the time clock 1 second C1 share out equally method through intelligence and produce;C) to the time process in, the corresponding pulse of apparatus system frequency f, by inner crystal oscillator clock weigh to the time clock 1 second C1 share out equally the method generation with new and old clock time difference △ C2 through intelligence;The intelligence that the corresponding pulse of generation device system frequency f is adopted in the above-mentioned steps (A) is shared out equally method and is: every N count value produces a pulse, can get f=C2/N thus;The intelligence that the corresponding pulse of generation device system frequency f is adopted in the above-mentioned steps (B) is shared out equally method and is: a preceding y pulse produces a pulse by N+x+1 count value, and later pulse produces a pulse by N+x count value; Wherein, whole second count difference △ C1 is x divided by the merchant of system frequency f, and remainder is y;The intelligence that the corresponding pulse of generation device system frequency f is adopted in the above-mentioned steps (C) is shared out equally method and is: a preceding b pulse produces a pulse by N+a+1 count value, and later pulse produces a pulse by N+a count value; Wherein, (△ C1+ △ C2) is a divided by the merchant of f, and remainder is b.
- 2. a kind of intelligent power equipment according to claim 1 to the time when receiving in the system equipment seamlessly transit setting means, it is characterized in that, in the above-mentioned steps (1),If be pps pulse per second signal, directly use pulse edge be to the time edge;If be the IRIG-B coded signal, decoding earlier find to the time code element, again with this code element rising edge be to the time edge.
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| CN 201110254885 CN102298314B (en) | 2011-08-31 | 2011-08-31 | Smooth transition timing method for timed equipment in intelligent power equipment timing system |
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| CN 201110254885 CN102298314B (en) | 2011-08-31 | 2011-08-31 | Smooth transition timing method for timed equipment in intelligent power equipment timing system |
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| CN109561497B (en) * | 2018-12-27 | 2021-06-22 | 山东山大电力技术股份有限公司 | Wireless synchronization method and system applied to one master device and multiple slave devices |
| CN111381486B (en) * | 2018-12-28 | 2022-02-08 | 北京金风科创风电设备有限公司 | Controller timing method and device, controller and wind generating set |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101582690A (en) * | 2009-06-26 | 2009-11-18 | 江苏北斗科技有限公司 | Oscillator disciplining system for satellite clock device of power system |
| CN101930211A (en) * | 2010-08-24 | 2010-12-29 | 西安交通大学 | Clock source device based on GPS second pulse and control method thereof |
| CN102004441A (en) * | 2010-12-15 | 2011-04-06 | 许继集团有限公司 | Adaptive crystal oscillator frequency timekeeping method |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| JP3085511B2 (en) * | 1994-11-24 | 2000-09-11 | 株式会社アドバンテスト | Reference frequency generator |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101582690A (en) * | 2009-06-26 | 2009-11-18 | 江苏北斗科技有限公司 | Oscillator disciplining system for satellite clock device of power system |
| CN101930211A (en) * | 2010-08-24 | 2010-12-29 | 西安交通大学 | Clock source device based on GPS second pulse and control method thereof |
| CN102004441A (en) * | 2010-12-15 | 2011-04-06 | 许继集团有限公司 | Adaptive crystal oscillator frequency timekeeping method |
Non-Patent Citations (1)
| Title |
|---|
| JP特开平8-146166A 1996.06.07 |
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