CA2544090A1 - Stable driving scheme preventing the accumulative aging in active matrix displays - Google Patents
Stable driving scheme preventing the accumulative aging in active matrix displays Download PDFInfo
- Publication number
- CA2544090A1 CA2544090A1 CA002544090A CA2544090A CA2544090A1 CA 2544090 A1 CA2544090 A1 CA 2544090A1 CA 002544090 A CA002544090 A CA 002544090A CA 2544090 A CA2544090 A CA 2544090A CA 2544090 A1 CA2544090 A1 CA 2544090A1
- Authority
- CA
- Canada
- Prior art keywords
- aging
- pixel
- driving scheme
- accumulative
- active matrix
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
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Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
- G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
- G09G2300/0809—Several active elements per pixel in active matrix panels
- G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
- G09G2300/0809—Several active elements per pixel in active matrix panels
- G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
- G09G2300/0809—Several active elements per pixel in active matrix panels
- G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
- G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
- G09G2300/0866—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes by means of changes in the pixel supply voltage
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0243—Details of the generation of driving signals
- G09G2310/0254—Control of polarity reversal in general, other than for liquid crystal displays
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/04—Maintaining the quality of display appearance
- G09G2320/043—Preventing or counteracting the effects of ageing
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/04—Maintaining the quality of display appearance
- G09G2320/043—Preventing or counteracting the effects of ageing
- G09G2320/045—Compensation of drifts in the characteristics of light emitting or modulating elements
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Electroluminescent Light Sources (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
Disclosed is a technique for controlling the aging of the pixels in light emitting displays.
Description
STABLE DRIVING SCHEME PREVENTING THE ACCUMULATIVE
AGING IN ACTIVE MATRIX DISPLAYS
FIELD OF THE INVENTION
The present invention generally relates to light emitting device displays, and particularly, to a driving technique for AMOLED, and to enhance the lifetime of the displays.
SUMMARY OF INVENTION
The new method reduces the aging speed by dividing the frame into driving and relaxation (annealing) phase.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 shows the proposed timing schedule.
FIG. 2 shows a 2-TFT pixel circuit and proposed compensation scheme.
FIG. 3 shows the lifetime results for the compensated and conventional driving scheme.
FIG. 4 shows the modified frame time of 2-TFT based on proposed timing schedule.
FIG. 5 shows the lifetime results for the compensated 2-TFT with the proposed timing schedule.
DETAILED DESCRIPTION
FIG. 1 shows the proposed timing schedule that suppresses the aging for pixel circuits in AMOLED displays. As will be explained later, the measurement results show that letting the pixel relax for a fraction of each frame can control the aging of the pixel including the aging of the driving devices (i.e. TFTs), and the OLED. Thus, a frame can be divided into three phases:
programming, driving (i.e. emitting), and relaxing. During the programming cycle, pixel is programmed with required data to provide the wanted brightness. During the driving cycle, the OLED emits required brightness based on the programming data. Finally, during the relaxing cycle, the pixel is OFF or biased with reverse polarity of driving cycle.
Consequently, the aging effect causes by driving cycle is annealed. This prevents aging accumulation effect from one frame to the other frame, and so the pixel life time increases significantly.
However, to obtain the wanted average brightness, the pixel must be programmed for a higher brightness since it is OFF for a fraction of frame time. The programming brightness based on wanted one is given by LCP = LN (1) Z'F - ZR
in which LcP is the compensating luminance, LN the normal luminance, TR the relaxation time, and TF the frame time.
In the following, we review a pixel example employing this method, but it must be denoted that the above timing schedule is applicable to any other pixel circuit despite its configuration and type.
FIG. 2 shows a 2-TFT pixel circuit and a compensating driving scheme. The operation of the pixel can be explained as the following.
During the first operating cycle (VcP_Ge1), VDD changes to a negative voltage (-VCPB) while VDATA has a positive voltage (VCPA). Thus, node A is charged to VCPA, and node B is discharged to -VCPB. During the second operating cycle (VT_Ge1), VDD changes to Vdd2, i.e. the
AGING IN ACTIVE MATRIX DISPLAYS
FIELD OF THE INVENTION
The present invention generally relates to light emitting device displays, and particularly, to a driving technique for AMOLED, and to enhance the lifetime of the displays.
SUMMARY OF INVENTION
The new method reduces the aging speed by dividing the frame into driving and relaxation (annealing) phase.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 shows the proposed timing schedule.
FIG. 2 shows a 2-TFT pixel circuit and proposed compensation scheme.
FIG. 3 shows the lifetime results for the compensated and conventional driving scheme.
FIG. 4 shows the modified frame time of 2-TFT based on proposed timing schedule.
FIG. 5 shows the lifetime results for the compensated 2-TFT with the proposed timing schedule.
DETAILED DESCRIPTION
FIG. 1 shows the proposed timing schedule that suppresses the aging for pixel circuits in AMOLED displays. As will be explained later, the measurement results show that letting the pixel relax for a fraction of each frame can control the aging of the pixel including the aging of the driving devices (i.e. TFTs), and the OLED. Thus, a frame can be divided into three phases:
programming, driving (i.e. emitting), and relaxing. During the programming cycle, pixel is programmed with required data to provide the wanted brightness. During the driving cycle, the OLED emits required brightness based on the programming data. Finally, during the relaxing cycle, the pixel is OFF or biased with reverse polarity of driving cycle.
Consequently, the aging effect causes by driving cycle is annealed. This prevents aging accumulation effect from one frame to the other frame, and so the pixel life time increases significantly.
However, to obtain the wanted average brightness, the pixel must be programmed for a higher brightness since it is OFF for a fraction of frame time. The programming brightness based on wanted one is given by LCP = LN (1) Z'F - ZR
in which LcP is the compensating luminance, LN the normal luminance, TR the relaxation time, and TF the frame time.
In the following, we review a pixel example employing this method, but it must be denoted that the above timing schedule is applicable to any other pixel circuit despite its configuration and type.
FIG. 2 shows a 2-TFT pixel circuit and a compensating driving scheme. The operation of the pixel can be explained as the following.
During the first operating cycle (VcP_Ge1), VDD changes to a negative voltage (-VCPB) while VDATA has a positive voltage (VCPA). Thus, node A is charged to VCPA, and node B is discharged to -VCPB. During the second operating cycle (VT_Ge1), VDD changes to Vdd2, i.e. the
2 voltage during the driving cycle. As a result, node B is charged to the point at which Tl turns off.
At this point, the voltage at node B is VCPA-VT, and the voltage stored in the storage capacitor (Cs) is the VT of T1. It is worth mentioning that VCPA should be smaller than VTO+VOLEDO, where the VTO is the threshold voltage of the unstressed T1 and the VOLEDO is the ON
voltage of the unstressed OLED. During the third operating cycle, VDATA changes to a programming voltage, VCPA+VP. Assuming that the OLED capacitance (CLD) is large, the voltage at node A remains at VCPA-VT. Therefore, the gate-source voltage of T1 ideally becomes VP+VT.
Consequently, the pixel current becomes independent of the AVT and AVoLED.
FIG. 3 signifies the effectiveness of the compensating driving scheme. the pixel circuits are programmed for 2 A at a frame rate of -60 Hz by using both the conventional and the novel compensation driving schemes. It is evident that the newly designed driving scheme is highly stable, reducing the total aging error to less than 11 %. However, the aging effects result in a 50%
error in the pixel current over the measurement period in the conventional driving scheme. The total shift in the OLED voltage and threshold voltage of Tl (A(VOLED+ VT) ) is -4 V.
FIG. 4 shows a frame using compensating driving scheme and the proposed timing schedule presented in FIG. 1. Two new operating cycles are added to the pixel operation as shown in FIG.
4. During the first operating cycle of the kth row, SEL[i] is high, and so the storage capacitors of the pixel circuits at the ith row are charged to VCPA. Considering that VCPA
is smaller than VOLED+VT, the pixel circuits at ith row are OFF and also the corresponding drive TFTs are negatively biased resulting in partial annealing of the VT-shift.
At this point, the voltage at node B is VCPA-VT, and the voltage stored in the storage capacitor (Cs) is the VT of T1. It is worth mentioning that VCPA should be smaller than VTO+VOLEDO, where the VTO is the threshold voltage of the unstressed T1 and the VOLEDO is the ON
voltage of the unstressed OLED. During the third operating cycle, VDATA changes to a programming voltage, VCPA+VP. Assuming that the OLED capacitance (CLD) is large, the voltage at node A remains at VCPA-VT. Therefore, the gate-source voltage of T1 ideally becomes VP+VT.
Consequently, the pixel current becomes independent of the AVT and AVoLED.
FIG. 3 signifies the effectiveness of the compensating driving scheme. the pixel circuits are programmed for 2 A at a frame rate of -60 Hz by using both the conventional and the novel compensation driving schemes. It is evident that the newly designed driving scheme is highly stable, reducing the total aging error to less than 11 %. However, the aging effects result in a 50%
error in the pixel current over the measurement period in the conventional driving scheme. The total shift in the OLED voltage and threshold voltage of Tl (A(VOLED+ VT) ) is -4 V.
FIG. 4 shows a frame using compensating driving scheme and the proposed timing schedule presented in FIG. 1. Two new operating cycles are added to the pixel operation as shown in FIG.
4. During the first operating cycle of the kth row, SEL[i] is high, and so the storage capacitors of the pixel circuits at the ith row are charged to VCPA. Considering that VCPA
is smaller than VOLED+VT, the pixel circuits at ith row are OFF and also the corresponding drive TFTs are negatively biased resulting in partial annealing of the VT-shift.
3 FIG. 5(a) demonstrates a longer lifetime test for the pixel circuit employing the newly developed timing cycles. The result signifies that the above method and results in a highly stable pixel current even after 90 days of operation. Here, the pixel is programmed for 2.5 A to compensate for the luminance lost during the relaxing cycle. The A(VOLED+ VT) is extracted once after a long timing interval (few days) to not disturb pixel operation. The result depicted in FIG. 5(b) confirms that the enhanced timing diagram suppresses aging significantly, resulting in longer lifetime. Here, A(VOLED+ VT) is 1.8 V after a 90 days of operation, whereas it is 3.6 V for the compensation driving scheme without the relaxing cycle after a shorter time.
4
Claims
1. A method for reducing aging speed comprising the step of dividing a frame into driving and relaxation (annealing) phases.
Priority Applications (16)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CA002544090A CA2544090A1 (en) | 2005-12-06 | 2006-04-19 | Stable driving scheme preventing the accumulative aging in active matrix displays |
| KR1020087027752A KR20090006198A (en) | 2006-04-19 | 2007-04-18 | Stable driving scheme for active matrix displays |
| CN2007800228406A CN101501748B (en) | 2006-04-19 | 2007-04-18 | Stable driving scheme for active matrix displays |
| TW096113684A TW200746022A (en) | 2006-04-19 | 2007-04-18 | Stable driving scheme for active matrix displays |
| CA2583708A CA2583708C (en) | 2006-04-19 | 2007-04-18 | Stable driving scheme for active matrix displays |
| US11/736,751 US8477121B2 (en) | 2006-04-19 | 2007-04-18 | Stable driving scheme for active matrix displays |
| EP16192749.6A EP3133590A1 (en) | 2006-04-19 | 2007-04-18 | Stable driving scheme for active matrix displays |
| EP07719579.0A EP2008264B1 (en) | 2006-04-19 | 2007-04-18 | Stable driving scheme for active matrix displays |
| JP2009505692A JP5397219B2 (en) | 2006-04-19 | 2007-04-18 | Stable drive scheme for active matrix display |
| PCT/CA2007/000652 WO2007118332A1 (en) | 2006-04-19 | 2007-04-18 | Stable driving scheme for active matrix displays |
| US13/909,177 US8743096B2 (en) | 2006-04-19 | 2013-06-04 | Stable driving scheme for active matrix displays |
| US14/263,628 US9633597B2 (en) | 2006-04-19 | 2014-04-28 | Stable driving scheme for active matrix displays |
| US15/462,529 US9842544B2 (en) | 2006-04-19 | 2017-03-17 | Stable driving scheme for active matrix displays |
| US15/807,339 US10127860B2 (en) | 2006-04-19 | 2017-11-08 | Stable driving scheme for active matrix displays |
| US16/159,944 US10453397B2 (en) | 2006-04-19 | 2018-10-15 | Stable driving scheme for active matrix displays |
| US16/568,511 US10650754B2 (en) | 2006-04-19 | 2019-09-12 | Stable driving scheme for active matrix displays |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CA002526436A CA2526436C (en) | 2004-12-07 | 2005-12-06 | Method and system for programming and driving active matrix light emitting device pixel |
| CA2,526,436 | 2005-12-06 | ||
| CA002544090A CA2544090A1 (en) | 2005-12-06 | 2006-04-19 | Stable driving scheme preventing the accumulative aging in active matrix displays |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA2544090A1 true CA2544090A1 (en) | 2007-06-06 |
Family
ID=38121211
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA002544090A Abandoned CA2544090A1 (en) | 2005-12-06 | 2006-04-19 | Stable driving scheme preventing the accumulative aging in active matrix displays |
Country Status (1)
| Country | Link |
|---|---|
| CA (1) | CA2544090A1 (en) |
-
2006
- 2006-04-19 CA CA002544090A patent/CA2544090A1/en not_active Abandoned
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FZDE | Dead |