CA2490860A1 - Real-time calibration scheduling method and algorithm for amoled displays - Google Patents
Real-time calibration scheduling method and algorithm for amoled displays Download PDFInfo
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- CA2490860A1 CA2490860A1 CA002490860A CA2490860A CA2490860A1 CA 2490860 A1 CA2490860 A1 CA 2490860A1 CA 002490860 A CA002490860 A CA 002490860A CA 2490860 A CA2490860 A CA 2490860A CA 2490860 A1 CA2490860 A1 CA 2490860A1
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0285—Improving the quality of display appearance using tables for spatial correction of display data
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/029—Improving the quality of display appearance by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel
- G09G2320/0295—Improving the quality of display appearance by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel by monitoring each display pixel
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/04—Maintaining the quality of display appearance
- G09G2320/043—Preventing or counteracting the effects of ageing
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Control Of El Displays (AREA)
Abstract
This invention presents a scheduling method and algorithm for calibration of pixels in active-matrix organic light-emitting diode (AMOLED) displays. The pixels are calibrated based on their aging and usage during the normal operation of active matrix display. The display data is used to determine the pixels with high brightness for calibration, which guarantees high speed and accurate calibration. This method can be used with any current programmed pixels, in particular, current mirror based designs.
Description
Real-Time Calibration Scheduling Method and Algorithm for AMOLED Displays PRIOR ART
Methods for data line voltage measurement for passive pixels are presented for precharge purposes [1]. However, they do not provide the accuracy needed for active matrix, and after precharge, current programming must be performed. In addition, current-programming of current-driven pixels is slow due to parasitic line capacitances and suffers from non-uniformity for large displays. In particular, the speed is a major issue when programming with small currents.
PRESENT INVENTION
The present invention discloses a method for calibration of pixels at high brightness to achieve the high speed and accuracy that is needed in large or small area displays.
Voltage-programming is used for fast pixel programming. According to the disclosed calibration-scheduling algorithm herein, pixels with high brightness are selected. For these pixels, the pixel current is measured during voltage programming and the results are compared with the expected pixel current. The difference will be used to adjust the data voltage for programming of that pixel in future. Due to speed, accuracy, and ease of implementation, the applications of the disclosed technique ranges from electroluminescent devices used for cellphones, personal organizers, monitors, TVs, to large area display boards.
DESCRIPTION OF THE DRAWINGS
Figure 1 presents the proposed calibration-scheduling algorithm. A Linked List of pixels is generated in step 201. This Linked List is used to schedule the priority in calibration of different pixels. The number of pixels that are calibrated in each programming cycle is referred to as n and is found in step 202 based on the display size and shift in characteristics.
In step 203, n pixels are selected ("Selected Pixels") in the selected column from the beginning of the Linked List. To improve the accuracy and speed of calibration, we calibrate the pixels that must be programmed with currents higher than a threshold current ITH. Calibration at low currents is slow and often not accurate. In addition, maximum shift in characteristics happen for pixels with high current. The algorithm works also for !r,., = 0, where calibration is performed for all pixels irrespective of their programming current. In step 204, we enable "Calibration Model° for the "Selected Pixels" and "Normal Operation" for the rest of the pixels in the selected column. In step 205, all pixels in the selected column are programmed by a voltage source driver. For the "Selected Pixels° the current flowing through the data line is monitored during the programming cycle. in step 206, the monitored current is compared with the expected current that must flow through the data line, and a calibration data curve for the "Selected Pixels" is generated. The calibration data is used to boost programming voltage in the next programming cycles during the "Normal Operation". The "Selected Pixels° are calibrated and as a result are sent to the end of the linked List in step 207.
During display operation, the Linked List will provide a sorted list of pixels that must be calibrated.
This is performed by going back 208 to step 203 in the beginning of the next programming cycle.
This number n is determined based on the display size and expected instability in device characteristics with time. The total number of pixels N = 3.m~.m2, where m~
and m2 are the number of rows and columns in the display, respectively. The highest rate in characteristics shift is K (=~ll~t.l~. Each programming cycle takes t=1/f.m2. The maximum expected shift in characteristics after the entire display is calibrated is ~I11= K.f.Nln < e, where a is the allowed error. After this we can redo the calibration from the beginning and eliminate the error. This shows that n > K t.Nle or n > 3.K.m~lfe. For instance, if K =1 °~lhr, m~ =1024, f= 60 Hz, and a =
0.1 %, we have n > 0.14, which implies that we need to calibrate once in 5 programming cycles.
This is achievable with just one calibration unit, which operates only one time in 5 programming cycles. If we want a = 0.01 %, we have n > 1.4. This means we require two calibration units calibrating two pixels in each programming cycle. This shows that it is feasible to implement this calibration system with very low cost. The frequency of calibration can be reduced automatically as the display ages, since shifts in characteristics will become slower as the time progresses. In addition, the calibration can be performed at multiple brightness levels for one pixel to achieve higher accuracy.
Figure 2 shows an architectural implementat'ron of such calibration system showing the Calibration Scheduler and Memory 307 and Compensation Memory 308. It also shows Display Array 300, Pixels 301, Gate Lines 302, Data Lines 303, and Power Lines 304.
The Gate Lines 302 are connected to the Gate Driver 305 and Power Lines to the Power Supply 306. In each programming cycle a column of pixels are selected. The Digital Data Input is added to the ~V
compensation voltage value that is stored in Compensation Memory 308 for each pixel by the Adder 309 and the corresponding voltage is applied to the Data Lines 303 by the Voltage Data Driver 310. When the Calibration Scheduler and Memory 307 has enabled the Normal Operation for that data line, switch 311 is activated and the voltage is directly applied to the pixel. When the Calibration Scheduler and Memory 307 has enabled the Calibration Mode for that data line, switch 312 is activated and the voltage is applied to the pixel through the accurate resistor R 313.
The voltage drop across the resistor 313 at the final stages of the programming time is measured by the voltage sensor 314 and converted to digital data by AID 316. The resulting value of the voltage drop is proportional to the current flowing through the pixel if a current programmed pixel circuit is present. This value is compared with the Comparator 316 to the expected value obtained from the Digital Data Input by the translator 317. The difference between the expected and measured value is stored in the compensation memory 308 and will be used for subsequent programming use.
[1] US Patent No. 6,594,606
Methods for data line voltage measurement for passive pixels are presented for precharge purposes [1]. However, they do not provide the accuracy needed for active matrix, and after precharge, current programming must be performed. In addition, current-programming of current-driven pixels is slow due to parasitic line capacitances and suffers from non-uniformity for large displays. In particular, the speed is a major issue when programming with small currents.
PRESENT INVENTION
The present invention discloses a method for calibration of pixels at high brightness to achieve the high speed and accuracy that is needed in large or small area displays.
Voltage-programming is used for fast pixel programming. According to the disclosed calibration-scheduling algorithm herein, pixels with high brightness are selected. For these pixels, the pixel current is measured during voltage programming and the results are compared with the expected pixel current. The difference will be used to adjust the data voltage for programming of that pixel in future. Due to speed, accuracy, and ease of implementation, the applications of the disclosed technique ranges from electroluminescent devices used for cellphones, personal organizers, monitors, TVs, to large area display boards.
DESCRIPTION OF THE DRAWINGS
Figure 1 presents the proposed calibration-scheduling algorithm. A Linked List of pixels is generated in step 201. This Linked List is used to schedule the priority in calibration of different pixels. The number of pixels that are calibrated in each programming cycle is referred to as n and is found in step 202 based on the display size and shift in characteristics.
In step 203, n pixels are selected ("Selected Pixels") in the selected column from the beginning of the Linked List. To improve the accuracy and speed of calibration, we calibrate the pixels that must be programmed with currents higher than a threshold current ITH. Calibration at low currents is slow and often not accurate. In addition, maximum shift in characteristics happen for pixels with high current. The algorithm works also for !r,., = 0, where calibration is performed for all pixels irrespective of their programming current. In step 204, we enable "Calibration Model° for the "Selected Pixels" and "Normal Operation" for the rest of the pixels in the selected column. In step 205, all pixels in the selected column are programmed by a voltage source driver. For the "Selected Pixels° the current flowing through the data line is monitored during the programming cycle. in step 206, the monitored current is compared with the expected current that must flow through the data line, and a calibration data curve for the "Selected Pixels" is generated. The calibration data is used to boost programming voltage in the next programming cycles during the "Normal Operation". The "Selected Pixels° are calibrated and as a result are sent to the end of the linked List in step 207.
During display operation, the Linked List will provide a sorted list of pixels that must be calibrated.
This is performed by going back 208 to step 203 in the beginning of the next programming cycle.
This number n is determined based on the display size and expected instability in device characteristics with time. The total number of pixels N = 3.m~.m2, where m~
and m2 are the number of rows and columns in the display, respectively. The highest rate in characteristics shift is K (=~ll~t.l~. Each programming cycle takes t=1/f.m2. The maximum expected shift in characteristics after the entire display is calibrated is ~I11= K.f.Nln < e, where a is the allowed error. After this we can redo the calibration from the beginning and eliminate the error. This shows that n > K t.Nle or n > 3.K.m~lfe. For instance, if K =1 °~lhr, m~ =1024, f= 60 Hz, and a =
0.1 %, we have n > 0.14, which implies that we need to calibrate once in 5 programming cycles.
This is achievable with just one calibration unit, which operates only one time in 5 programming cycles. If we want a = 0.01 %, we have n > 1.4. This means we require two calibration units calibrating two pixels in each programming cycle. This shows that it is feasible to implement this calibration system with very low cost. The frequency of calibration can be reduced automatically as the display ages, since shifts in characteristics will become slower as the time progresses. In addition, the calibration can be performed at multiple brightness levels for one pixel to achieve higher accuracy.
Figure 2 shows an architectural implementat'ron of such calibration system showing the Calibration Scheduler and Memory 307 and Compensation Memory 308. It also shows Display Array 300, Pixels 301, Gate Lines 302, Data Lines 303, and Power Lines 304.
The Gate Lines 302 are connected to the Gate Driver 305 and Power Lines to the Power Supply 306. In each programming cycle a column of pixels are selected. The Digital Data Input is added to the ~V
compensation voltage value that is stored in Compensation Memory 308 for each pixel by the Adder 309 and the corresponding voltage is applied to the Data Lines 303 by the Voltage Data Driver 310. When the Calibration Scheduler and Memory 307 has enabled the Normal Operation for that data line, switch 311 is activated and the voltage is directly applied to the pixel. When the Calibration Scheduler and Memory 307 has enabled the Calibration Mode for that data line, switch 312 is activated and the voltage is applied to the pixel through the accurate resistor R 313.
The voltage drop across the resistor 313 at the final stages of the programming time is measured by the voltage sensor 314 and converted to digital data by AID 316. The resulting value of the voltage drop is proportional to the current flowing through the pixel if a current programmed pixel circuit is present. This value is compared with the Comparator 316 to the expected value obtained from the Digital Data Input by the translator 317. The difference between the expected and measured value is stored in the compensation memory 308 and will be used for subsequent programming use.
[1] US Patent No. 6,594,606
Claims
Priority Applications (26)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CA002490860A CA2490860A1 (en) | 2004-12-15 | 2004-12-15 | Real-time calibration scheduling method and algorithm for amoled displays |
CA002526782A CA2526782C (en) | 2004-12-15 | 2005-12-15 | Method and system for programming, calibrating and driving a light emitting device display |
EP11168677.0A EP2383720B1 (en) | 2004-12-15 | 2005-12-15 | Method and system for programming, calibrating and driving a light emitting device display |
PCT/CA2005/001897 WO2006063448A1 (en) | 2004-12-15 | 2005-12-15 | Method and system for programming, calibrating and driving a light emitting device display |
EP13187593.2A EP2688058A3 (en) | 2004-12-15 | 2005-12-15 | Method and system for programming, calibrating and driving a light emitting device display |
CA002590366A CA2590366C (en) | 2004-12-15 | 2005-12-15 | Method and system for programming, calibrating and driving a light emitting device display |
JP2007545796A JP5128287B2 (en) | 2004-12-15 | 2005-12-15 | Method and system for performing real-time calibration for display arrays |
KR1020077016146A KR20070101275A (en) | 2004-12-15 | 2005-12-15 | Method and system for programming, calibrating and driving a light emitting device display |
CN2005800480205A CN101116129B (en) | 2004-12-15 | 2005-12-15 | Method and system for programming, calibrating and driving a light emitting device display |
TW094144535A TWI402790B (en) | 2004-12-15 | 2005-12-15 | Method and system for programming, calibrating and driving a light emitting device display |
EP05819617.1A EP1836697B1 (en) | 2004-12-15 | 2005-12-15 | Method and system for programming, calibrating and driving a light emitting device display |
US11/304,162 US7619597B2 (en) | 2004-12-15 | 2005-12-15 | Method and system for programming, calibrating and driving a light emitting device display |
US12/571,968 US8259044B2 (en) | 2004-12-15 | 2009-10-01 | Method and system for programming, calibrating and driving a light emitting device display |
JP2012045806A JP5822759B2 (en) | 2004-12-15 | 2012-03-01 | System for display array |
US13/568,784 US8736524B2 (en) | 2004-12-15 | 2012-08-07 | Method and system for programming, calibrating and driving a light emitting device display |
US14/157,031 US8994625B2 (en) | 2004-12-15 | 2014-01-16 | Method and system for programming, calibrating and driving a light emitting device display |
US14/175,493 US8816946B2 (en) | 2004-12-15 | 2014-02-07 | Method and system for programming, calibrating and driving a light emitting device display |
US14/253,422 US9275579B2 (en) | 2004-12-15 | 2014-04-15 | System and methods for extraction of threshold and mobility parameters in AMOLED displays |
US14/261,755 US9280933B2 (en) | 2004-12-15 | 2014-04-25 | System and methods for extraction of threshold and mobility parameters in AMOLED displays |
JP2014240307A JP6086893B2 (en) | 2004-12-15 | 2014-11-27 | Method for extracting circuit parameters |
US14/643,584 US9970964B2 (en) | 2004-12-15 | 2015-03-10 | Method and system for programming, calibrating and driving a light emitting device display |
US14/738,393 US10012678B2 (en) | 2004-12-15 | 2015-06-12 | Method and system for programming, calibrating and/or compensating, and driving an LED display |
US14/816,817 US10013907B2 (en) | 2004-12-15 | 2015-08-03 | Method and system for programming, calibrating and/or compensating, and driving an LED display |
US16/005,177 US10699624B2 (en) | 2004-12-15 | 2018-06-11 | Method and system for programming, calibrating and/or compensating, and driving an LED display |
US16/914,533 US11270621B2 (en) | 2004-12-15 | 2020-06-29 | Method and system for programming, calibrating and/or compensating, and driving an LED display |
US17/582,446 US20220223094A1 (en) | 2004-12-15 | 2022-01-24 | Method and system for programming, calibrating and/or compensating, and driving an led display |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CA002490860A CA2490860A1 (en) | 2004-12-15 | 2004-12-15 | Real-time calibration scheduling method and algorithm for amoled displays |
Publications (1)
Publication Number | Publication Date |
---|---|
CA2490860A1 true CA2490860A1 (en) | 2006-06-15 |
Family
ID=36585864
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA002490860A Abandoned CA2490860A1 (en) | 2004-12-15 | 2004-12-15 | Real-time calibration scheduling method and algorithm for amoled displays |
Country Status (2)
Country | Link |
---|---|
CN (1) | CN101116129B (en) |
CA (1) | CA2490860A1 (en) |
Families Citing this family (22)
Publication number | Priority date | Publication date | Assignee | Title |
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CN101939776A (en) * | 2008-03-06 | 2011-01-05 | 富士电机控股株式会社 | Display device of active matrix type |
US9351368B2 (en) * | 2013-03-08 | 2016-05-24 | Ignis Innovation Inc. | Pixel circuits for AMOLED displays |
US20140368491A1 (en) | 2013-03-08 | 2014-12-18 | Ignis Innovation Inc. | Pixel circuits for amoled displays |
US9886899B2 (en) | 2011-05-17 | 2018-02-06 | Ignis Innovation Inc. | Pixel Circuits for AMOLED displays |
JP5893550B2 (en) * | 2012-04-12 | 2016-03-23 | キヤノン株式会社 | Imaging apparatus and imaging system |
JP5955073B2 (en) | 2012-04-23 | 2016-07-20 | キヤノン株式会社 | Display device and driving method of display device |
US8922544B2 (en) * | 2012-05-23 | 2014-12-30 | Ignis Innovation Inc. | Display systems with compensation for line propagation delay |
KR102033374B1 (en) * | 2012-12-24 | 2019-10-18 | 엘지디스플레이 주식회사 | Organic light emitting display device and method for driving the same |
US9721505B2 (en) | 2013-03-08 | 2017-08-01 | Ignis Innovation Inc. | Pixel circuits for AMOLED displays |
CA2894717A1 (en) | 2015-06-19 | 2016-12-19 | Ignis Innovation Inc. | Optoelectronic device characterization in array with shared sense line |
CN105247603B (en) * | 2013-06-27 | 2017-07-11 | 夏普株式会社 | Display device and its driving method |
WO2015083136A1 (en) * | 2013-12-05 | 2015-06-11 | Ignis Innovation Inc. | Charge-based compensation and parameter extraction in amoled displays |
CN110264955A (en) * | 2014-06-06 | 2019-09-20 | 伊格尼斯创新公司 | The determination method of display system, the system for controlling display and circuit element characteristic |
KR102333739B1 (en) | 2014-10-06 | 2021-12-01 | 엘지디스플레이 주식회사 | Organic electro luminescent display device and transitor structure for display device |
KR102322708B1 (en) | 2014-12-24 | 2021-11-09 | 엘지디스플레이 주식회사 | Organic light emitting diode display device and method of sensing device characteristic |
KR102636683B1 (en) | 2016-12-30 | 2024-02-14 | 엘지디스플레이 주식회사 | Orgainc emitting diode display device |
DE102019205253A1 (en) * | 2018-04-11 | 2019-10-17 | Ignis Innovation Inc. | Display system with controllable connection |
CN111445844B (en) * | 2019-01-17 | 2021-09-21 | 奇景光电股份有限公司 | Cumulative brightness compensation system and organic light emitting diode display |
CN109887465B (en) * | 2019-03-07 | 2020-05-12 | 深圳市华星光电半导体显示技术有限公司 | Pixel driving circuit and display panel |
CN112098043B (en) * | 2019-06-17 | 2022-04-15 | 光宝科技新加坡私人有限公司 | Fault detection circuit for detecting laser transmitter |
US10957243B1 (en) | 2019-11-13 | 2021-03-23 | Tcl China Star Optoelectronics Technology Co., Ltd. | Display drive circuit, method for operating same, and display panel |
CN110910817A (en) * | 2019-11-13 | 2020-03-24 | Tcl华星光电技术有限公司 | Display driving circuit, working method thereof and display panel |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6738035B1 (en) * | 1997-09-22 | 2004-05-18 | Nongqiang Fan | Active matrix LCD based on diode switches and methods of improving display uniformity of same |
US6259424B1 (en) * | 1998-03-04 | 2001-07-10 | Victor Company Of Japan, Ltd. | Display matrix substrate, production method of the same and display matrix circuit |
US6690344B1 (en) * | 1999-05-14 | 2004-02-10 | Ngk Insulators, Ltd. | Method and apparatus for driving device and display |
US6414661B1 (en) * | 2000-02-22 | 2002-07-02 | Sarnoff Corporation | Method and apparatus for calibrating display devices and automatically compensating for loss in their efficiency over time |
-
2004
- 2004-12-15 CA CA002490860A patent/CA2490860A1/en not_active Abandoned
-
2005
- 2005-12-15 CN CN2005800480205A patent/CN101116129B/en active Active
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Publication number | Publication date |
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CN101116129B (en) | 2011-03-30 |
CN101116129A (en) | 2008-01-30 |
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