CA1315901C - Characterized fast tuning control for a television system - Google Patents

Characterized fast tuning control for a television system

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Publication number
CA1315901C
CA1315901C CA000552971A CA552971A CA1315901C CA 1315901 C CA1315901 C CA 1315901C CA 000552971 A CA000552971 A CA 000552971A CA 552971 A CA552971 A CA 552971A CA 1315901 C CA1315901 C CA 1315901C
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Canada
Prior art keywords
frequency
signal
tuning
controlled oscillator
voltage controlled
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CA000552971A
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French (fr)
Inventor
W. Andrew Wright, Jr.
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Information Resources Inc
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Information Resources Inc
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Abstract

CHARACTERIZED FAST TUNING
CONTROL FOR A TELEVISION SYSTEM
Abstract of the Disclosure A fast tuning subsystem for use in switching from a current channel to a selected channel of a television system includes a tuner for selecting a channel to be received, the tuner having a voltage controlled oscillator responsive to voltage applied to its control input for determining the channel frequency the tuner selectively receives. Predictive means supplies a selected predicted voltage signal to the control input. This predictive means has an associated memory in which is stored signals corresponding to respective voltage signals predicted for tuning to receive the channel frequencies of the respective channels. A selected predicted voltage signal is applied to the control input to cause the selected predicted voltage signal to slew the channel frequency at a rapid slew rate to the frequency corresponding to the selected predicted voltage signal. An error detector including a reference, generates a tuning error signal indicative of the tuning error of the tuner off the frequency for the selected channel. Feedback combines the tuning error signal with the selected predicted voltage signal to provide a control signal at the control input for adjusting the channel frequency to reduce the tuning error. The predictive means is substantially decoupled from the operation of the feedback means to prevent transients in the slew mode from substantially perturbing the feedback mode.
Preferably, the subsystem utilizes a phase-locked loop in the feedback mode. A method for predicting control voltages for a slew control for a fast tuning subsystem is also disclosed, preferably utilizing a combination of binary and linear search.

Description

0 ~

CHARACTERIZED FAST TUNING
CONTROL FOR A TELEVISION SYSTEM
The present invention relates to television systems and more parti~ularly to fast tuning subsystems for switching channels in a television system. Still more particularly it relates to such subsystems in which a selected substitute television signal in a substitute channel can be substituted indistinguishably for one or more normal television signals in respective normal channels, as for market research purposes.
Back~round of the Invention Marketing research techniques have been daveloped in which a substitute television signal in a substitute channel, containing a commercial the effectiveness of which is to be assessed, is substituted for a normal television signal in a normal channel in homes of selected test viewers so that the effectiveness of the commercial can bP evaluatPd. This allows the promoter of a service or product to assess the reaction of a small, demographically controlled panel ~f test viewers before the wide airing of a commercial which may prove ineffective.
One example of such a television signal substitution system is disclosed in United States Patent No. 4,404,589. As there disclosed, substitute television program signals are transmitted in at least one substitute channal along with signal substitution control signals. A control box or terminal at each test viewer receiver responds to the signal substitution : 30 control signals by selectively switching to a substitute television program from a normal program. The signal substitution control signals include a numbçr of ; different terminal command si~nals and a number ~f di~ferent event command signalsO Each of the terminal command signals incllldes a respective test viewer address ignal for identifying a respective test viewer receiver and a number o~ event identification signals .
: identi~ying respective signal substitution events in -, - l~l 59~1 which this terminal is to participate. Each of the event command signals includes a respectiYe event address signal corresponding to a respective event, an appropriate substitution control command, a substitute channel identification signal, and one or more normal channel identification signals for identifying the normal channels ~rom which the receiver is to ~e switched. The current event command signals correspond-ing to each allowable event address are stored in the terminal for later correlation with the terminal's participation event list and wi~h the viewer'~ selected channel signal. When the viewer selected channel corresponds to a normal channel identification signal associated with a current event command whose event address signal corresponds to an event in which the respective terminal is to participate, the substitute channel is substituted for the channel selected by the viewer for a period determined by the event command signals. Subsequent responses to the events, such as purchases, of the respective vi~wers are then individually tabulated and analyzed against the responses of viewers receiving the normal signals.
When a viewer changes channels on a modern television receiver, the channel change is carried out in, for example, about a quarter of a second. The change is accompanied by momentary disruption of the picture and a sound pop or a period of sound muting.
When a market research company causes a channel substitution, it is desirable that the substitution be carried out so quickly and uno~trusively a~ to be imperceptible to the normal test viewer. If the substitution were distinguishable, it ~ould, at least subconsciously, influence the response o~ the test viewer to the commercial. That is, were the viewer to know or suspect he was receiving a test commercial, he might react in a manner in which he believes he is expected to re~ct, rather than acting normally, skewing the test results from normal response. Therefore, it is desirable that the tuning be accomplished extremely rapidly so as to be indistinguishable. More specifically, the transition time between channels should be kept well within about 60 microseconds to prevent an a~dible pop due to loss of the television signal intercarrier frPquency modulated with the sound subcarrier. The normal and substitute channel tuning should bP very accurately matched to ensure no shift in picture quality, particularly that o~ the chroma signal. The transition should be timed to occur during the vertical blanking interval between picture fields so that the change is not seen by the viewer.
Switching channels may require a large frequency change in the tuner. For example, if ~he normal channel is a low YHF channel ~wherein Channel 2 has a video carrier frequency of 55.25 MHz) and the substitute channel is a high UHF channel (wherein Channel 70 has a video carrier frequency of 807.25 MHz), the tuner might have to slew through more than 700 MHz.
The vertical blanking interval of standard NTSC video, during which the substitution is to be effected, takes 1.3 milliseconds. The factor that is most critical in making the substitution indistinguishable is the sound.
The audio stage of the television receiver is not tuned to the sound carrier, but is tuned to the 4~5 MHz intercarrier beat frequency generated between the video carrier and the sound carrier in each VHF and UHF
channel. When the tuner of the receiver tunes between channels, the intercarrier beat frequency disappears because both the video and sound carriers are no longer simultaneously present in the IF pass band. When the audio stage of the television receiver has no signal applied, its internal limiter amplifier will amplify noise up to an audible ampli~ude level. This causes the pop heard during viewer controlled channel rhanging.
This presents no problem when the viewer changes channels, for it to be expected. However, if an audible pop were produced during siynal substitution, it wsuld .,.
,~, ,.

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alert the viewPr to the fact of substitution.
In order to avoid the effect of noise during signal substitution, the channel change must be sufficiently fast that the human ear cannot distinguish it. The total energy of a noise burst is the integral of power over time, but the human ear is essentially logarithmic in perception and can hear extremely low energy noise pulses. To make the noise attendant a channel change unobtrusive, the change should be accomplished in less than about 60 microsecond~. Not only is relatively fa~t tuning required, but al~o the tuning must be relatively accurate to recover the 4.5 MHz intercarrier beat. Due to the close proximity of the sound carrier o~ an adjacent channel to the video carrier o~ a substitute channel, a maximum error of about + 500 KHz is requir~d ~or both the video and sound subcarriers of the substitute channel to be within the pass band.
Previous signal substitution systems have employed a cable television distribution system with a control box for channel switching located at each test viewer's home. ~hese systems have employed a fast electronic tuner having a voltage controlled oscillator whose output frequency determined the channel to which the tuner was tuned. A voltage divider network estab-lished predicted tuning voltages n~cessary to cause the local oscillator to translate each individual channel's frequency to that o~ at least one channel of the tele-vision receiver. The tuner was made to select ~
particular channel very quickly by jamming the appro-priate control voltage into the local o~cillator causing it to slew rapidly to the n~w ~requency. This is ~nown as jam tuning. Thus, by directing an electronic switch in the local ~scillator control circuit to change ~rom a normal channel voltage to the su~stitute channel volt-age, a rapid substitution could be made, This prior art tuner controller system was predictive in nature in that the channel tuning control voltages corresponding to the ~::
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desired input channels were determined by testing prior to or during installation of the control box at the home 0f the test viewer. A problem encountered was that with time the correct tuning voltages tended to drift.
Drifting resulted in frequency errors which caused loss of picture definition, and color hue or saturation changes. The automatic fine tuning circuitry in the tele~ision set of the test viewer might correct the error, but it would correct the error in a visible manner due to its slow operating speed. With time) the driftin~ became so extreme as to require that the control boxes be removed from test view~r homes for recalibration.
Brief Summarv of the Invention The present invention provides an improved fast tuning subsystem combining accurate jam tuning with feedback to take care of long term drift. A phase--locked loop feedback system samples the output of the local oscillator in the tuner to determine if a frequen-cy error be present. The frequencies of the ~hannels are generally very accurately maintained, but signifi-cant frequency error could arise from the tuner in the control box. If such an error were present, the phase detector would provide an error signal for combination with the predicted voltaqe signal and application of the resultant voltage signal to the voltage controlled local oscillator o~ the tuner, thereby causing the tuner to provide the desired frequency output. In this control-ler system, the predicted or characterization voltages for each frequency is stored in a look-up table in a memory associated with a ~iCrOprOceSSQr. Each of the predicted voltag~ signals is pr~determined for the respective channels for a particular tuner to be s~bstan-tially equal at the time of characterization to the volt-age applied to the voltage controlled oscillator that provides a null tuning error signal~ In the predictive, feed forward portion of the control operation, the micro-processor, upon selection of a substitute channel, :

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13~9~1 applies a signal representative of that characterization voltage to a precision digital to analog converter which applies its analog output to the voltage controlled oscillator. With time, due to aging of the components, the voltage values for the various ~requencies stored in the look-up tab~e become somewhat err~neous. This results in the voltages applied during the feed ~orward moda becoming incorrect for the various channels, and the relatively slow operating phase-locked loop adding a corrective offset to assure accurate tuning to the desired frequency. The response time of the feedback mode is made substantially slower than that of the predictive mode so as to decouple ~he one control from the other.
Accsrding to one aspect o~ the invention a fast tuning subsystem is used in switching from a current channel to a selected channel of a television system.
The tuning su~system includes a tuner for selecting a channel to be received, the tuner including a voltage controlled oscillator having a control input for determining, in response to voltage applied to its control input, the channel ~requency the tuner selectively receives. Predictive means supplies a selected predicted voltage signal to the control input of said oscillator, the predictive means including an associated memory in which is stored siynals corresponding to respective voltage signals predicted for applying ~o the oscillator to tune the tuner to receive the channel frequencies of the respective channels. The oscillator is responsive to a selected predicted voltage signal to slew the channel frequency at a rapid ~lew rate to the ~requency corresponding to said selected predicted voltage signal. An error detector generates a tuning error signal indicative of the frequency error o~ the tuner off the frequency for the selected channel. A feedback circuit combines the tuning error signal with the selected predicted voltag~
signal to provide a control signal at the control input ,' .

_7_ 131 ~901 for adjusting the channel frequency to reduce khe tuning error. The operation of the predictive means is substantially decoupled from the operation of the feedback circuit to prevent transients in the slew mode of the predictive means from ~ubstantially perturbing the feedback mod~.
~ t is an aspect of the invention that the channel frequency be slewed su~ficiently fast that the total spurious intercarrier sound energy detected during the slew mode be sufficiently small as to be inaudible to a viewer, and where transients occasioned by operation o the predictive means do not perturb the operation of the feedback circuit so as to cause transient visible de~radation of picture as observed by a viewer.
In another aspect the response time of the feedback circuit is made sufficiently slower than the response time of the predictive means as to result in substantial decoupling. Preferably, the response time of the feedback circuit is at least four orders of magnitude slower than the response time of the predictive means. In another aspect the error detector means includes means for limiting the error signal in magnitude during the interchannel slewing, preferably a phase-error detector limiting the error signal to +
radians during interchannel slewing.
According to another aspect, the error detector compares the frequency of the voltage controlled ; oscillator with the reference to generate the tuning error signal. According to another aspect, such an ~ error detector comprises a reference oscillator for i generating a referance signal at a frequency that is l/N
ti~es the frequency of the voltage controlled oscillator at the frequency at which the tuner selectively receives respecti~e channels, where N is a different respective integer for each channelO The error detector further includes divide by N means for dividing the output 131~9~

frequency of the voltage controlled oscillator by ~ and means for comparing the divided by N signal with the reference signal to produce the tuning error signal~
Preferably, the means for decoupling includes a loop filter in circuit with the feedback means.
Another important aspect is the characterizing of the predictive control signal. This must be done accurately and rapidly in the course of manufacture or the cost of characterization of a large number of channels could well become excessive. According to the present invention, the control signals for each tuner are characterized by, for each channel, applying a respectiYe preliminary control voltage signal estimate to the respective control input, utilizing the resulting tuning error signal from the error detecting means to determin~ the control voltage signal at the control input so as to reduce the tuning error signal to less than a predetermined magnitude, and storing in the memory means a signal corresponding to the determined control voltage as a signal corresponding to a respective predicted control voltage signal.
In another aspect the error detector and the feedback means comprise ~ phase-locked loop generating a tuning error signal indicative of phase error, the derivative of the tuning error ~i~nal is utilized to determine successive incremental updates to the preliminary control voltage signal so as to reduce the tuning error ~ignal to less than a predete~mined magnitude, and a signal corresponding to the then characteriz~d preli~inary control voltage signal is ~tored in memory as corresponding to the determined control voltage signal.
In anoth2r aspect the determination of the characterized con~rol voltage signal is made for each channel by applying a respective preliminary control volta~e signal to the control input, utilizing the resulting tuning error signal to modify the preliminary 131,~g~1 control voltage signal by a predetermined amount to produce a modified preliminary control voltage signal, applying the modified preliminary control voltage signal to the control input, and repeating the steps until th~
resulting tuning error signal is less than the predetermined magnitude.
In another aspect each predetermined amount is in acc~rdance with a binary search process wherein successive predetermined amounts decrease by half. In another aspect each predetermined amount is substanti~lly the same in accordance with a linear search process. In 5till another aspect each pr~determined amount is in accordance with a binary search process for a nu-mber of steps wherein successive predetormin d amounts decrease by half and is thereafter in accordance with a linear ~earch process wher~in each said predetermined amount is substantially the same~
Other aspects, objects and advantages of the invention will become apparent from the following detailed description, particularly when taken in conjunction with the accompanying drawings.
Brief Description of the Drawinas FIG. 1 is a diagram, partly schematic and partly bl~ck in nature, illustrating a prior art fast tuning subsystem having predictive tuning voltage control;
FIG. 2 is a block diagram illustrating a f~st tuning subsystem according to the present invention having not only predictive tuning voltage control but al o a slowly operating phase-lo~ked 1OGP for improYing the accuracy of the tuned freguency over time; and FIG. 3 is a block diagram illustrating the characterizing of the subsystem in the course of its production.
Corresponding reference characters indicate corresponding components throughout the several figures.
Detailed Description of the Preferred Embodiments A control box is used in a television system .

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for switching between substitute channels and normal channels. The control box is located, for example, at the home of each test viewer and provides a signal input on one of the channels selectable by the televisisn receiver ~f the test viewer. Each box is under the c~ntrol of a remote superYiSory controller which selects, for example, commercials in a substitute channel for insertion into a selected norMal channel for the purpose of testing the effectiveness of each commercial using an appr~priately selected panel of viewers. An example of a television ~ystem with multi-event signal substitution is shown and discussed in the above-mentioned United States Patent No.
4,~04,589.
As mentioned above, it is desirable that a test viewer not know when a substitute commercial is inserted in place of a commercial in a normal television channel. The jud~ment of the test viewer could be influenced, if only subconsciously, if the substitution were visually or aurally distinguisha~le. one way the test viewer could distinguish a substitution is interference with or disruption of the picture or sound. Such interference typically occurs when a television viewer changes normal channels because the electronic tuner of a conventional television set usually takes a fraction o~ a second to tune to the chosen channel. During this time the 4.5 M~z intercarrier sound signal disappears resulting in a popping noise because the limiter amplifier in the audio FM receiver of the television set amplifies random thermal noise and intervening spurious signals up to the full amplitude levelO One aspect of the present invention is the ~bility to switch between channals so : swiftly that the act of signal substitution is ~ 35 indistinguishable by the test viewer.
: A previously used predictive tuning system is shown in FIG. 1. A control box 100 as previously , ,.

employ~d in fast tuning a cable system is th~re shown.
A voltage divider 102 is formed by a number of potentiometers 104 each of whi~h is factory calibrated for the estimated tuning voltag~ of a respective one of the normal and substitute channels (shown as normal channels 2-13 and substitutP channels A and B, respectively). A switch SW3 permits the t~st ~iewer to select a normal channel. ~n electronic switch SW4 is under the control o~ a signal from a substitute conkrol circuit 106 as provided by way of a data receiver 107 which extracts the control signals from signals r~ceived over a cable 108 from a testing facility. The switch SW4 switches among the viewer selected normal ~hannel and the two substitute channels to apply the respective estimated control voltage to a tuner or frequency converter 110. The tuner 110 includes a local oscillator (L.0) 112 and a mixer 114O The local oscillat~r 112 is a voltage controlled oscillator oscillating at a frequency determined ~y the control voltage applied to its control input terminal ~rom the switch SW4. The output of the local oscillator 112 is mixed in the mixer 114 with the signal on the cable 1~8 to produce beat frequencies. A beat frequency for the channel to be detected is at an intermediat frequency which is later converted by a second converter 115 to the frequency to which the viewer's television set 116 is tuned, such as that of a channel not used in the local broadcast area, usually channel 3 or channel 4.
Upon operation of the switch SW4 during a vertical blanking interval, the predetermined control voltage for tuning to the desired channel is jammed into the tuner 110. Among the shortcomings ~f ~his system are that potentiometers are difficult to adjust precisely during factory calibration, and the system sffers no pr~vision for compensation for drift due to the aging of compone~ts. With time, the freguency errors o~ this predicti~e system became so intolerable that the various -12- 1 3J .~
channels could not be properly tuned, necessitating the return of the control boxes 100 to the factory for recalibration.
A fast tuning control subsystem according to the present invention is illustrated in FIG. 2. The subsystem includes a control box 120 ~or receiving signals over a signal transmission medium, which includes a cable 122 in this embodiment. The signals are received by a fast tuner or frequency csnverter 124 and a data receiver 126. The t.uner 124 separates the television signals; whereas the data receiver dete~ts and separates the control signals received ~rom the supervisory testing facility. The ~ast tuner 124 is under the control of a microprocessor 128 and has two phases or modes of operation, a jam phase and a feedback phase.
The first phase is the ja~ phase where a predicted control voltage for the desired channel is applied to the local oscillator (LØ) 130 of the tuner 124. The local oscillator 130 is a voltage controlled oscillator oscillating at a frequency determined by the control voltage applied to its control input terminal.
The output of the local oscillator 130 is mixed in a mixer 132 with the signals received on the cable 122 to produce a beat frequency that for the selected channel corresponds to a fixed intermediate frequency. The signals at the intermediate frequency are then converted by a second converter 133 to a frequency to which the viewer's television set 134 is tuned. Signals corresponding to respective control voltages for tuning the various channel~, both substitute and normal, are contained in a channel table 138 in an addressable read only memory associated with the microprocessor 128. The various voltages are predetermined as part of a characterization process performed as a last step of the manufacture of the control box 120, as will be explained further below in connection with FIG. 3. The corresponding signals are tored in the memory table 138 13159~1 at respective addresses where they are addressed in accordance with an appropriat channel sel~ction algorithm of a channel ~elector 136 of the microprocessor 128 under the control of a substitution controller 137 of the microprocessor, acting under instructions from the data receiver 126. The microprocessor 128 also receives a signal indicating the channel selection made by the television viewer, as from a selector switch, not shown. Upon channel selection, the microprocessor 128 calls up the corresponding control signal from the memory table 138 and applies the corresponding predetermined, estimated or predicted voltage signal (in digital form) to a precision digital to analog converter (DAC) 140 haviny 12-14 bit accuracy. The DAC 140 converts the signal to analog form and applies it to the local o~cillator 130 by way of a summing circuit 142. The memory table 138 used to store the predicted ~ignal is an erasable programmable read only memory such as an EPROM or an EEPROM. These programmable devices contain a channel table 138 custom programmed to contain signals corresponding to accurate estimates of the frequency control ~oltage required for each individual frequPncy converter module 124.
The second phase of tuning is the feedback mode employing an error detection system to determine the difference between the desired frequenry output of the local oscillator 130 and actual frequency output. It can usually be safely assumed that the input signal has a reasonably accurate and stable frequency and that significant freguency error results only from the local oscillator 130 in the tuner 124. Thus any frequency error of the tuner output can be accurately assessed by measuring the frequency output of the local oscillator 130. The output of the local oscillator serv~s as an input to a ph~ae-locked loop (PLL) 144 includiny a divide by N divider 146 controlled by the microprocesaor 128 ~or selecting an integer N by which the tuner output frequency i~ divided to reduce it to a frequency that is -14~
supposed to match that of a crystal reference oscillator 148. ~y comparing the phase of the reference oscillator 148 and the phase of the output of the divider 146 using a phase detector 150, an error signal i5 established ~or feeding back through a loop filter 152 to the su~mer 142 ~or c~mbining with the output of the DAC 140 to bring the local oscillator precisely on the frequency for tuninq in the desired channel.
This second or feedback mode of operation is substantially decoupled ~rom the ~irst or jam mode of operation in order that th2 two modes not interfere with one anoth~r. It would be counterproductive for the phase-locked loop to be trying to synchronize the oscillator frequency with the reference while the predicted control voltage is slewing $he frequency.
More specifically, the act of slewing or jamming provides a random unbalance of the phase-locked loop 144 which ~he phase-locked loop seeks ~o reduc~. By making the response time of the phase-locked loop 144 sufficiently long relative to the response time o~ the predictive jamming mode, the two modes may be substantially decoupled. Specifically, the response time must be sufficiently long so that the rate of correction of the random phasP unbalance be sufficiently slow so that the resulting transient local oscillator frequency of~set be bounded to prevent significant transient visible picture degradation. The response time of the jamming mode i~ made sufficiently rapid as to slew the tuner to the new channel so fast that the total intercarrier sound noise energy detected during the slew mode is so small as to be inaudible to the ~iewer. The transients generated as the tunex slews through intervening channel frequencies do not perturb the operation of the feedback means so much as to cause transient visible degrada~ion of the picture observed by a viewer immediately after the jam mode. A response time for the jam mode of less than 60 microseconds has 13 1 ?~

been found appropriate and is readily achieved by appropriate choice of a common local oscillator 130 and a common DAC 1~0. A response time for the phase-locked loop 144 four orders o~ magnitude ~lower than the response time of the predictive slewing circuit has proven effective in providing adequate decoupling. In the specific embodiment actually used, a settling time of the order of three seconds for the phase-locked loop 144 provided effective decoupling. Such settling time for the phase-locked loop 144 is provided by the filter constants of the loop filter 152. The error det~ctor 150 includes means for limiting the error ~ignal during interchannel slewing to furth~r limit the error that must be corrected. This is an inherent property of a pha~e-locked loop, which limits the error signal to less than + ~.
Characterization Characterization is a process performed at the end of the production cycle of each control box 120, or during the recalibration of each control ~ox 120, in which the table of predicted tuning voltages for each normal and substitute channel, called the channel table, is determined and entered in the memory 138. It is these tuning voltages which are jammed into the local oscillator 130 of the tuner 124 to cause the tuner to slew quickly to th~ chosen channelO These voltages are predetermined with high accuracy because the tuner must arrive promptly within a narrow range of the desired channel in order to prevent a correction in the feedback mode of an initia~ frequency error suf~icient to cause visible picture degradation. Within 1~0 kHz has proven ade~uate. In order to realize the desired accuracy, which may approach one part in 10,000, a digital to analog converter having 12 to 14 bit accuracy is provided.
A problem with this factory characterization is that it is a very expensive operation because each :~

~ ~31~901 individual box 120 must be individually characterized for each of up to about 70 channels. Up to 1000 decisions may be necessary to characterize each box 12~. The phase-locked loop 144 settles to equilibrium relatively slowly, taXing at least several ~econds.
This is much too ~low to be able to use the equilibrium condition in making these charac-terization decisions in a low cost manner. As will be explained in greater detail below, these decisions are each more efficiently made in a fraction of a second using a process based upon the derivative of the output of the phase detector 150. The process depends upon the ~act that frequency is the instantaneous derivative of phase.
There are numerous considerations in obtaining the desired accuracy. A first consideration is that all critical components of a control box 120 mu~t be used in the characterization of that box. That is, at least th2 digital to analog converter 140, the ~requency co~verter 124 and the phase-locked loop 144 of the control box 120 are actually used in its characterization. This is because the required accuracy is so high that minute differences which could occur due to the use of different yroupings of components cannot be tolerated.
A second accuracy consideration is burn in and stabilization. To achieve the required acruracy, the control box 120 is brought up to its final operating temperature and allowed to operate at that temperature until the components reach thermal equilibrium. A third area of concPrn where extreme accuracy is required relates to th linearity and hysteresis of the components, ~uch as resi~tors and capacitors.
In order to achieve high speed and ~t the same time remove th~ effect~ of hysteresis, the ¢haracterization search for the estimated tuning voltage for each channel is divided into two parts~ ~he first part is a high speed binary sear~h. A crude estimate of `` 1315~01 the channel tuning voltage is made initially, but typically an eight bit binary search is carried out to get a more accurate estimate of the tuning voltage for the channel. Binary or dichotomizing searches are well known to those o~ skill in the art and need not be further discussed herein. Such a search involves stepping the test signal in the proper direction by amounts successively decreasing by half to narrow the error. To the extent that components in the circuit exhibit hysteresis sr any degree of thermal m~mory, the result of the binary search is not accurate e~en when carried to small steps.
The second part of the characterization ~earch involves backing off in the test value some small extent and then proceeding to sweep up through the estimated value (resulting from the binary search) using a linear and constant velocity sweep. Throuyh the u~e of a linear and constant velocity sweep, all hysteresis effects are aligned in a common direction for all the channels characterized. Any residual hysteresis error is reduced to a constant error term, like the error due to characterizing the box in a temperature environment slightly different than ambient temperature of a test viewer's home, and can readily be removed by the PLL
control loop 144.
To implement the characterization process, a characterization test jig 154 is used. The test jig 154 is connected between the output of the phase detector 150 and the microprocessor 128. The test jig includes a differentiator 156 and a polarity discriminat~r 158 for detecting the sense of tuning error, an EP~OM programmer 160~and a characterization control computer 162 ~or car-rying out the test seguence. An incxamental weighting algorithm is provided by weighting operator 164 included in the microproc~ssor 128 itsel~. A ~witch SW~ switches the input of the 190p ~ilter 152 to ground from its connection to the phase detector 150 to assure that the phase-locked loop 144 does not simultaneously try to correct incremental tuning voltage steps introduced during the characterization process. The phase detector thus sanses only the error of the control voltage applied to the summer 142 by the DAC 140.
The characterization control computer 162 puts the test jig 154 through its program sequence. The incremental weighting algorithm responds to the sense of the error as determined by the polarity discriminator 162. It responds by putting out an incremental signal corresponding to an increment or decrement in the control signal to the local oscillator 130. This signal is summed by a summer 166 with a tentative predicted voltage signal from the channel table 138. The initial tentative predicted voltage signals are stored in a test read only m~mory (ROM) which is plugged into the microprocessor 128 for test purposes to provide initial tentative predicted voltage signals for each channel.
As each incremental signal is added to a tentative predicted voltage signal, the sum is stored in a random access memory as a current tentative predicted voltage signal. When the test program is completed for all channels, the EPROM programmer is enabled to put the final predicted voltage signals in an EPROM. The EPROM
is then physically inserted in the microprocessor 128 in lieu of the test ROM.
Regarding the necessary speed of the decision making during both the binary saarch mode and the linear ; sweep mode of the characterization process for each channel, there may be as many as 1000 decisions necessary to fully characterize each tuner. For the . sake of economy, each decision must be made within a smal~ fraction of a second. This speed cannot be obtained by allowing khe phasP locked loop 144 to settle to accurate values~because the time constant of the phase-locked loop itsel~ is many seconds. On the other hand, frequency is the instantaneous derivative of ,, .

~ 13~901 phase. In a search process, all that is required for each decision is a determination of the sense o~ any error; that may be determined by observing whether a currently observed phase error is increasing or S decreasing. This is determined from the slcpe of the instantaneous derivative of pha~e by the differentiator 156 which determines the derivative and the polarity discriminator 158 which determines sen~e. Put more basically, the output of the differentiation is proportional to the rate of change of the phase. If the slope is downward, it means the current value i~- above the proper value. On the other hand/ if the slope is upward, the present value is below the proper value. In this way simple binary decisions can be made rapidly.
In the binary search mode, the incremental weighting algorithm 164 puts out incremental signals wherein each signal after the first is half the value of the preoeding incremental signal and vf sense determined by the signal from the polarity discriminator 158. The binary search is programmed for eight jumps or tests.
After the binary search the linear search continues by fixed increments until the sense changes. That determines the final predicted voltage signal. Thus, the resulting table of tuning voltages is a merger of the invariant field and the accumulated increments to create a channel table, customized to each control box 120. This table is burned into a nonvolatil~ read only memory, EPROM, and assembled into the memory 138 of each microprocessor assembly 128. As critical components age, ths control boxes 120 may be returned to the factory occasionally ~or recalibration.
Although a preferred embodiment of the inYention has bee~ disclosed in some detail, various modifications may be made therein within the ~cope of the invention. For example, although in the preferred embodiment the system has been de~igned for operation over cable, the invention may also be used with over the-air signals.

Claims (91)

1. A fast tuning subsystem for use in switching from a current channel to a selected channel of a television system, said tuning subsystem comprising a tuner for selecting a channel to be received, said tuner including a voltage controlled oscillator having a control input for determining, in response to voltage applied to said control input, the channel frequency said tuner selectively receives, and predictive means for supplying a selected predicted voltage signal to said control input of said oscillator, said predictive means including an associated memory means in which is stored signals corresponding to respective voltage signals predicted for applying to said oscillator to tune said tuner to receive the channel frequencies of the respective channels, and further including means interconnected between said memory means and said control input of said oscillator for applying one of said respective predicted voltage signals as said selected predicted voltage signal to said control input of said oscillator, said oscillator being responsive to said selected predicted voltage signal to slew the channel frequency at a rapid slew rate to the frequency corresponding to said selected predicted voltage signal, characterized by error detecting means, including a reference, for generating a tuning error signal indicative of the tuning error of the tuner off the frequency for the selected channel; feedback means for combining said tuning error signal with said selected predicted voltage signal to provide a control signal at said control input for adjusting said channel frequency to reduce said tuning error; and means for substantially decoupling the operation of said predictive means from the operation of said feedback means to prevent transients in the slew mode of said predictive means from substantially perturbing the feedback mode of said feedback means.
2. A fast tuning subsystem according to Claim 1 characterized in that said means for substantially decoupling causes the rate at which the channel frequency is slewed by said predictive means to be sufficiently fast that the total intercarrier sound noise energy detected during the slew mode is sufficiently small as to be inaudible to a viewer, whereby transients occasioned by operation of said predictive means do not perturb the operation of said feedback means as to cause transient visible or audible degradation of picture or sound as observed or heard by a viewer.
3. A fast tuning subsystem according to Claim 2 characterized in that said means for substantially decoupling makes the response time of said feedback means sufficiently slower than the response time of said predictive means as to result in said substantially decoupling.
4. A fast tuning subsystem according to Claim 3 characterized in that said means for substantially decoupling makes the response time of said feedback means at least four orders of magnitude slower than the response time of said predictive means.
5. A fast tuning subsystem according to Claim 4 characterized in that said error detecting means includes means for limiting the error signal in magnitude during said interchannel slewing.
6. A fast tuning subsystem according to Claim 5 characterized in that said error detecting means comprises a phase-error detector limiting said error signal to ?.pi. radians during said interchannel slewing.
7. A fast tuning subsystem according to Claim 6 characterized in that said memory means comprises an addressable memory storing at respective addresses therein a plurality of digital data signals corresponding to predicted voltage signals for respective channels that may be selected.
8. A fast tuning subsystem according to Claim 1 characterized in that said means for substantially decoupling makes the response time of said feedback means sufficiently slower than the response time of said predictive means as to result in said substantially decoupling.
9. A fast tuning subsystem according to Claim 8 characterized in that said means for substantially decoupling makes the response time of said feedback means at least four orders of magnitude slower than the response time of said predictive means.
10. A fast tuning subsystem according to Claim 9 characterized in that said error detecting means includes means for limiting the error signal in magnitude during said interchannel slewing.
11. A fast tuning subsystem according to Claim 10 characterized in that said error detecting means comprises a phase-error detector limiting said error signal to ?.pi. radians during said interchannel slewing.
12. A fast tuning subsystem according to Claim 11 characterized in that said memory means comprises an addressable memory storing at respective addresses therein a plurality of digital data signals corresponding to predicted voltage signals for respective channels that may be selected.
13. A fast tuning subsystem according to Claim 1 characterized in that said error detecting means includes means for limiting the error signal in magnitude during said interchannel slewing.
14. A fast tuning subsystem according to Claim 13 characterized in that said error detecting means comprises a phase-error detector limiting said error signal to ?.pi. radians during said interchannel slewing.
15. A fast tuning subsystem according to Claim 14 characterized in that said memory means comprises an addressable memory storing at respective addresses therein a plurality of digital data signals corresponding to predicted voltage signals for respective channels that may be selected.
16. A fast tuning subsystem according to Claim 2 characterized in that said error detecting means includes means for limiting the error signal in magnitude during said interchannel slewing.
17. A fast tuning subsystem according to Claim 16 characterized in that said error detecting means comprises a phase-error detector limiting said error signal to ?.pi. radians during said interchannel slewing.
18. A fast tuning subsystem according to Claim 17 characterized in that said memory means comprises an addressable memory storing at respective addresses therein a plurality of digital data signals corresponding to predicted voltage signals for respective channels that may be selected.
19. A fast tuning subsystem according to Claim 3 characterized in that said error detecting means includes means for limiting the error signal in magnitude during said interchannel slewing.
20. A fast tuning subsystem according to Claim 19 characterized in that said error detecting means comprises a phase-error detector limiting said error signal to ?.pi. radians during said interchannel slewing.
21. A fast tuning subsystem according to Claim 20 characterized in that said memory means comprises an addressable memory storing at respective addresses therein a plurality of digital data signals corresponding to predicted voltage signals for respective channels that may be selected.
22. A fast tuning subsystem according to Claim 8 characterized in that said error detecting means includes means for limiting the error signal in magnitude during said interchannel slewing.
23. A fast tuning subsystem according to Claim 22 characterized in that said error detecting means comprises a phase-error detector limiting said error signal to ?.pi. radians during said interchannel slewing.
24. A fast tuning subsystem according to Claim 23 characterized in that said memory means comprises an addressable memory storing at respective addresses therein a plurality of digital data signals corresponding to predicted voltage signals for respective channels that may be selected.
25. A fast tuning subsystem according to Claim 1 characterized in that said memory means comprises an addressable memory storing at respective addresses therein a plurality of digital data signals corresponding to predicted voltage signals for respective channels that may be selected.
26. A fast tuning subsystem according to Claim 2 characterized in that said memory means comprises an addressable memory storing at respective addresses therein a plurality of digital data signals corresponding to predicted voltage signals for respective channels that may be selected.
27. A fast tuning subsystem according to Claim 3 characterized in that said memory means comprises an addressable memory storing at respective addresses therein a plurality of digital data signals corresponding to predicted voltage signals for respective channels that may be selected.
28. A fast tuning subsystem according to Claim 4 characterized in that said memory means comprises an addressable memory storing at respective addresses therein a plurality of digital data signals corresponding to predicted voltage signals for respective channels that may be selected.
29. A fast tuning subsystem according to Claim 5 characterized in that said memory means comprises an addressable memory storing at respective addresses therein a plurality of digital data signals corresponding to predicted voltage signals for respective channels that may be selected.
30. A fast tuning subsystem according to Claim 8 characterized in chat said memory means comprises an addressable memory storing at respective addresses therein a plurality of digital data signals corresponding to predicted voltage signals for respective channels that may be selected.
31. A fast tuning subsystem according to Claim 9 characterized in that said memory means comprises an addressable memory storing at respective addresses therein a plurality of digital data signals corresponding to predicted voltage signals for respective channels that may be selected.
32. A fast tuning subsystem according to Claim 10 characterized in that said memory means comprises an addressable memory storing at respective addresses therein a plurality of digital data signals corresponding to predicted voltage signals for respective channels that may be selected.
33. A fast tuning subsystem according to Claim 13 characterized in that said memory means comprises an addressable memory storing at respective addresses therein a plurality of digital data signals corresponding to predicted voltage signals for respective channels that may be selected.
34. A fast tuning subsystem according to Claim 16 characterized in that said memory means comprises an addressable memory storing at respective addresses therein a plurality of digital data signals corresponding to predicted voltage signals for respective channels that may be selected.
35. A fast tuning subsystem according to Claim 19 characterized in that said memory means comprises an addressable memory storing at respective addresses therein a plurality of digital data signals corresponding to predicted voltage signals for respective channels that may be selected.
36. A fast tuning subsystem according to Claim 22 characterized in that said memory means comprises an addressable memory storing at respective addresses wherein a plurality of digital data signals corresponding to predicted voltage signals for respective channels that may be selected.
37. A fast tuning subsystem according to any one of Claims 1 to 3 characterized in that each of said predicted voltage signals is predetermined for the respective channels for the particular said tuner to be substantially equal at the time of predetermination to the voltage applied to said voltage controlled oscillator that provides a null tuning error signal.
38. A fast tuning subsystem according to any one of Claims 4 to 6 characterized in that each of said predicted voltage signals is predetermined for the respective channels for the particular said tuner to be substantially equal at the time of predetermination to the voltage applied to said voltage controlled oscillator that provides a null tuning error signal.
39. A fast tuning subsystem according to any one of Claims 7 to 9 characterized in that each of said predicted voltage signals is predetermined for the respective channels for the particular said tuner to be substantially equal at the time of predetermination to the voltage applied to said voltage controlled oscillator that provides a null tuning error signal.
40. A fast tuning subsystem according to any one of Claims 10 to 12 characterized in that each of said predicted voltage signals is predetermined for the respective channels for the particular said tuner to be substantially equal at the time of predetermination to the voltage applied to said voltage controlled oscillator that provides a null tuning error signal.
41. A fast tuning subsystem according to any one of Claims 13 to 15 characterized in that each of said predicted voltage signals is predetermined for the respective channels for the particular said tuner to be substantially equal at the time of predetermination to the voltage applied to said voltage controlled oscillator that provides a null tuning error signal.
42. A fast tuning subsystem according to any one of Claims 16 to 18 characterized in that each of said predicted voltage signals is predetermined for the respective channels for the particular said tuner to be substantially equal at the time of predetermination to the voltage applied to said voltage controlled oscillator that provides a null tuning error signal.
43. A fast tuning subsystem according to any one of Claims 19 to 21 characterized in that each of said predicted voltage signals is predetermined for the respective channels for the particular said tuner to be substantially equal at the time of predetermination to the voltage applied to said voltage controlled oscillator that provides a null tuning error signal.
44. A fast tuning subsystem according to any one of Claims 22 to 24 characterized in that each of said predicted voltage signals is predetermined for the respective channels for the particular said tuner to be substantially equal at the time of predetermination to the voltage applied to said voltage controlled oscillator that provides a null tuning error signal.
45. A fast tuning subsystem according to any one of Claims 25 to 27 characterized in that each of said predicted voltage signals is predetermined for the respective channels for the particular said tuner to be substantially equal at the time of predetermination to the voltage applied to said voltage controlled oscillator that provides a null tuning error signal.
46. A fast tuning subsystem according to any one of Claims 28 to 30 characterized in that each of said predicted voltage signals is predetermined for the respective channels for the particular said tuner to be substantially equal at the time of predetermination to the voltage applied to said voltage controlled oscillator that provides a null tuning error signal.
47. A fast tuning subsystem according to any one of Claims 31 to 33 characterized in that each of said predicted voltage signals is predetermined for the respective channels for the particular said tuner to be substantially equal at the time of predetermination to the voltage applied to said voltage controlled oscillator that provides a null tuning error signal.
48. A fast tuning subsystem according to any one of Claims 34 to 36 characterized in that each of said predicted voltage signals is predetermined for the respective channels for the particular said tuner to be substantially equal at the time of predetermination to the voltage applied to said voltage controlled oscillator that provides a null tuning error signal.
49. A fast tuning subsystem according to any one of Claims 1 to 3 characterized in that said error detecting means includes means for comparing the frequency of said voltage controlled oscillator with said reference to generate said tuning error signal.
50. A fast tuning subsystem according to any one of Claims 4 to 6 characterized in that said error detecting means includes means for comparing the frequency of said voltage controlled oscillator with said reference to generate said tuning error signal.
51. A fast tuning subsystem according to any one of Claims 7 to 9 characterized in that said error detecting means includes means for comparing the frequency of said voltage controlled oscillator with said reference to generate said tuning error signal.
52. A fast tuning subsystem according to any one of Claims 10 to 12 characterized in that said error detecting means includes means for comparing the frequency of said voltage controlled oscillator with said reference to generate said tuning error signal.
53. A fast tuning subsystem according to any one of Claims 13 to 15 characterized in that said error detecting means includes means for comparing the frequency of said voltage controlled oscillator with said reference to generate said tuning error signal.
54. A fast tuning subsystem according to any one of Claims 16 to 18 characterized in that said error detecting means includes means for comparing the frequency of said voltage controlled oscillator with said reference to generate said tuning error signal.
55. A fast tuning subsystem according to any one of Claims 19 to 21 characterized in that said error detecting means includes means for comparing the frequency of said voltage controlled oscillator with said reference to generate said tuning error signal.
56. A fast tuning subsystem according to any one of Claims 22 to 24 characterized in that said error detecting means includes means for comparing the frequency of said voltage controlled oscillator with said reference to generate said tuning error signal.
57. A fast tuning subsystem according to any one of Claims 25 to 27 characterized in that said error detecting means includes means for comparing the frequency of said voltage controlled oscillator with said reference to generate said tuning error signal.
58. A fast tuning subsystem according to any one of Claims 28 to 30 characterized in that said error detecting means includes means for comparing the frequency of said voltage controlled oscillator with said reference to generate said tuning error signal.
59. A fast tuning subsystem according to any one of Claims 31 to 33 characterized in that said error detecting means includes means for comparing the frequency of said voltage controlled oscillator with said reference to generate said tuning error signal.
60. A fast tuning subsystem according to any one of Claims 34 to 36 characterized in that said error detecting means includes means for comparing the frequency of said voltage controlled oscillator with said reference to generate said tuning error signal.
61. A fast tuning subsystem according to any one of Claims 1 to 3 characterized in that said error detecting means comprises means for comparing the frequency of said voltage controlled oscillator with said reference to generate said tuning error signal, a reference oscillator for generating a reference signal at a frequency that is 1/N times the frequency of said voltage controlled oscillator at the frequency at which said tuner selectively receives respective channels, where N is a different respective integer for each channel, means responsive to said voltage controlled oscillator for dividing the output frequency thereof by N, and comparison means for comparing the divided by N
signal with said reference signal to produce said tuning error signal.
62. A fast tuning subsystem according to any one of Claims 4 to 6 characterized in that said error detecting means comprises means for comparing the frequency of said voltage controlled oscillator with said reference to generate said tuning error signal, a reference oscillator for generating a reference signal at a frequency that is 1/N times the frequency of said voltage controlled oscillator at the frequency at which said tuner selectively receives respective channels, where N is a different respective integer for each channel, means responsive to said voltage controlled oscillator for dividing the output frequency thereof by N, and comparison means for comparing the divided by N
signal with said reference signal to produce said tuning error signal.
63. A fast tuning subsystem according to any one of Claims 7 to 9 characterized in that said error detecting means comprises means for comparing the frequency of said voltage controlled oscillator with said reference to generate said tuning error signal, a reference oscillator for generating a reference signal at a frequency that is 1/N times the frequency of said voltage controlled oscillator at the frequency at which said tuner selectively receives respective channels, where N is a different respective integer for each channel, means responsive to said voltage controlled oscillator for dividing the output frequency thereof by N, and comparison means for comparing the divided by N
signal with said reference signal to produce said tuning error signal.
64. A fast tuning subsystem according to any one of Claims 10 to 12 characterized in that said error detecting means comprises means for comparing the frequency of said voltage controlled oscillator with said reference to generate said tuning error signal, a reference oscillator for generating a reference signal at a frequency that is 1/N times the frequency of said voltage controlled oscillator at the frequency at which said tuner selectively receives respective channels, where N is a different respective integer for each channel, means responsive to said voltage controlled oscillator for dividing the output frequency thereof by N, and comparison means for comparing the divided by N
signal with said reference signal to produce said tuning error signal.
65. A fast tuning subsystem according to any one of Claims 13 to 15 characterized in that said error detecting means comprises means for comparing the frequency of said voltage controlled oscillator with said reference to generate said tuning error signal, a reference oscillator for generating a reference signal at a frequency that is 1/N times the frequency of said voltage controlled oscillator at the frequency at which said tuner selectively receives respective channels, where N is a different respective integer for each channel, means responsive to said voltage controlled oscillator for dividing the output frequency thereof by N, and comparison means for comparing the divided by N
signal with said reference signal to produce said tuning error signal.
66. A fast tuning subsystem according to any one of Claims 16 to 18 characterized in that said error detecting means comprises means for comparing the frequency of said voltage controlled oscillator with said reference to generate said tuning error signal, a reference oscillator for generating a reference signal at a frequency that is 1/N times the frequency of said voltage controlled oscillator at the frequency at which said tuner selectively receives respective channels, where N is a different respective integer for each channel, means responsive to said voltage controlled oscillator for dividing the output frequency thereof by N, and comparison means for comparing the divided by N
signal with said reference signal to produce said tuning error signal.
67. A fast tuning subsystem according to any one of Claims 19 to 21 characterized in that said error detecting means comprises means for comparing the frequency of said voltage controlled oscillator with said reference to generate said tuning error signal, a reference oscillator for generating a reference signal at a frequency that is 1/N times the frequency of said voltage controlled oscillator at the frequency at which said tuner selectively receives respective channels, where N is a different respective integer for each channel, means responsive to said voltage controlled oscillator for dividing the output frequency thereof by N, and comparison means for comparing the divided by N
signal with said reference signal to produce said tuning error signal.
68. A fast tuning subsystem according to any one of Claims 22 to 24 characterized in that said error detecting means comprises means for comparing the frequency of said voltage controlled oscillator with said reference to generate said tuning error signal, a reference oscillator for generating a reference signal at a frequency that is 1/N times the frequency of said voltage controlled oscillator at the frequency at which said tuner selectively receives respective channels, where N is a different respective integer for each channel, means responsive to said voltage controlled oscillator for dividing the output frequency thereof by N, and comparison means for comparing the divided by N
signal with said reference signal to produce said tuning error signal.
69. A fast tuning subsystem according to any one of Claims 25 to 27 characterized in that said error detecting means comprises means for comparing the frequency of said voltage controlled oscillator with said reference to generate said tuning error signal, a reference oscillator for generating a reference signal at a frequency that is 1/N times the frequency of said voltage controlled oscillator at the frequency at which said tuner selectively receives respective channels, where N is a different respective integer for each channel, means responsive to said voltage controlled oscillator for dividing the output frequency thereof by N, and comparison means for comparing the divided by N
signal with said reference signal to produce said tuning error signal.
70. A fast tuning subsystem according to any one of Claims 28 to 30 characterized in that said error detecting means comprises means for comparing the frequency of said voltage controlled oscillator with said reference to generate said tuning error signal, a reference oscillator for generating a reference signal at a frequency that is 1/N times the frequency of said voltage controlled oscillator at the frequency at which said tuner selectively receives respective channels, where N is a different respective integer for each channel, means responsive to said voltage controlled oscillator for dividing the output frequency thereof by N, and comparison means for comparing the divided by M
signal with said reference signal to produce said tuning error signal.
71. A fast tuning subsystem according to any one of Claims 31 to 33 characterized in that said error detecting means comprises means for comparing the frequency of said voltage controlled oscillator with said reference to generate said tuning error signal, a reference oscillator for generating a reference signal at a frequency that is 1/N times the frequency of said voltage controlled oscillator at the frequency at which said tuner selectively receives respective channels, where N is a different respective integer for each channel, means responsive to said voltage controlled oscillator for dividing the output frequency thereof by N, and comparison means for comparing the divided by N
signal with said reference signal to produce said tuning error signal.
72. A fast tuning subsystem according to any one of Claims 34 to 36 characterized in that said error detecting means comprises means for comparing the frequency of said voltage controlled oscillator with said reference to generate said tuning error signal, a reference oscillator for generating a reference signal at a frequency that is 1/N times the frequency of said voltage controlled oscillator at the frequency at which said tuner selectively receives respective channels, where N is a different respective integer for each channel, means responsive to said voltage controlled oscillator for dividing the output frequency thereof by N, and comparison means for comparing the divided by N
signal with said reference signal to produce said tuning error signal.
73. A fast tuning subsystem according to any one of Claims 1 to 3 characterized in that said error detecting means comprises means for comparing the frequency of said voltage controlled oscillator with said reference to generate said tuning error signal, a reference oscillator for generating a reference signal at a frequency that is 1/N times the frequency of said voltage controlled oscillator at the frequency at which said tuner selectively receives respective channels, where N is a different respective integer for each channel, means responsive to said voltage controlled oscillator for dividing the output frequency thereof by N, and comparison means for comparing the divided by N
signal with said reference signal to produce said tuning error signal, and said means for decoupling includes a loop filter in circuit with said feedback means.
74. A fast tuning subsystem according to any one of Claims 4 to 6 characterized in that said error detecting means comprises means for comparing the frequency of said voltage controlled oscillator with said reference to generate said tuning error signal, a reference oscillator for generating a reference signal at a frequency that is 1/N times the frequency of said voltage controlled oscillator at the frequency at which said tuner selectively receives respective channels, where N is a different respective integer for each channel, means responsive to said voltage controlled oscillator for dividing the output frequency thereof by N, and comparison means for comparing the divided by N
signal with said reference signal to produce said tuning error signal, and said means for decoupling includes a loop filter in circuit with said feedback means.
75. A fast tuning subsystem according to any one of Claims 7 to 9 characterized in that said error detecting means comprises means for comparing the frequency of said voltage controlled oscillator with said reference to generate said tuning error signal, a reference oscillator for generating a reference signal at a frequency that is 1/N times the frequency of said voltage controlled oscillator at the frequency at which said tuner selectively receives respective channels, where N is a different respective integer for each channel, means responsive to said voltage controlled oscillator for dividing the output frequency thereof by N, and comparison means for comparing the divided by N
signal with said reference signal to produce said tuning error signal, and said means for decoupling includes a loop filter in circuit with said feedback means.
76. A fast tuning subsystem according to any one of Claims 10 to 12 characterized in that said error detecting means comprises means for comparing the frequency of said voltage controlled oscillator with said reference to generate said tuning error signal, a reference oscillator for generating a reference signal at a frequency that is 1/N times the frequency of said voltage controlled oscillator at the frequency at which said tuner selectively receives respective channels, where N is a different respective integer for each channel, means responsive to said voltage controlled oscillator for dividing the output frequency thereof by N, and comparison means for comparing the divided by N
signal with said reference signal to produce said tuning error signal, and said means for decoupling includes a loop filter in circuit with said feedback means.
77. A fast tuning subsystem according to any one of Claims 13 to 15 characterized in that said error detecting means comprises means for comparing the frequency of said voltage controlled oscillator with said reference to generate said tuning error signal, a reference oscillator for generating a reference signal at a frequency that is 1/N times the frequency of said voltage controlled oscillator at the frequency at which said tuner selectively receives respective channels, where N is a different respective integer for each channel, means responsive to said voltage controlled oscillator for dividing the output frequency thereof by N, and comparison means for comparing the divided by N
signal with said reference signal to produce said tuning error signal, and said means for decoupling includes a loop filter in circuit with said feedback means.
78. A fast tuning subsystem according to any one of Claims 16 to 18 characterized in that said error detecting means comprises means for comparing the frequency of said voltage controlled oscillator with said reference to generate said tuning error signal, a reference oscillator for generating a reference signal at a frequency that is 1/N times the frequency of said voltage controlled oscillator at the frequency at which said tuner selectively receives respective channels, where N is a different respective integer for each channel, means responsive to said voltage controlled oscillator for dividing the output frequency thereof by N, and comparison means for comparing the divided by N
signal with said reference signal to produce said tuning error signal, and said means for decoupling includes a loop filter in circuit with said feedback means.
79. A fast tuning subsystem according to any one of Claims 19 to 21 characterized in that said error detecting means comprises means for comparing the frequency of said voltage controlled oscillator with said reference to generate said tuning error signal, a reference oscillator for generating a reference signal at a frequency that is 1/N times the frequency of said voltage controlled oscillator at the frequency at which said tuner selectively receives respective channels, where N is a different respective integer for each channel, means responsive to said voltage controlled oscillator for dividing the output frequency thereof by N, and comparison means for comparing the divided by N
signal with said reference signal to produce said tuning error signal, and said means for decoupling includes a loop filter in circuit with said feedback means.
80. A fast tuning subsystem according to any one of Claims 22 to 24 characterized in that said error detecting means comprises means for comparing the frequency of said voltage controlled oscillator with said reference to generate said tuning error signal, a reference oscillator for generating a reference signal at a frequency that is 1/N times the frequency of said voltage controlled oscillator at the frequency at which said tuner selectively receives respective channels, where N is a different respective integer for each channel, means responsive to said voltage controlled oscillator for dividing the output frequency thereof by N, and comparison means for comparing the divided by N
signal with said reference signal to produce said tuning error signal, and said means for decoupling includes a loop filter in circuit with said feedback means.
81. A fast tuning subsystem according to any one of Claims 25 to 27 characterized in that said error detecting means comprises means for comparing the frequency of said voltage controlled oscillator with said reference to generate said tuning error signal, a reference oscillator for generating a reference signal at a frequency that is 1/N times the frequency of said voltage controlled oscillator at the frequency at which said tuner selectively receives respective channels, where N is a different respective integer for each channel, means responsive to said voltage controlled oscillator for dividing the output frequency thereof by N, and comparison means for comparing the divided by N
signal with said reference signal to produce said tuning error signal, and said means for decoupling includes a loop filter in circuit with said feedback means.
82. A fast tuning subsystem according to any one of Claims 28 to 30 characterized in that said error detecting means comprises means for comparing the frequency of said voltage controlled oscillator with said reference to generate said tuning error signal, a reference oscillator for generating a reference signal at a frequency that is 1/N times the frequency of said voltage controlled oscillator at the frequency at which said tuner selectively receives respective channels, where N is a different respective integer for each channel, means responsive to said voltage controlled oscillator for dividing the output frequency thereof by N, and comparison means for comparing the divided by N
signal with said reference signal to produce said tuning error signal, and said means for decoupling includes a loop filter in circuit with said feedback means.
83. A fast tuning subsystem according to any one of Claims 31 to 33 characterized in that said error detecting means comprises means for comparing the frequency of said voltage controlled oscillator with said reference to generate said tuning error signal, a reference oscillator for generating a reference signal at a frequency that is 1/N times the frequency of said voltage controlled oscillator at the frequency at which said tuner selectively receives respective channels, where N is a different respective integer for each channel, means responsive to said voltage controlled oscillator for dividing the output frequency thereof by N, and comparison means for comparing the divided by N
signal with said reference signal to produce said tuning error signal, and said means for decoupling includes a loop filter in circuit with said feedback means.
84. A fast tuning subsystem according to any one of Claims 34 to 36 characterized in that said error detecting means comprises means for comparing the frequency of said voltage controlled oscillator with said reference to generate said tuning error signal, a reference oscillator for generating a reference signal at a frequency that is 1/N times the frequency of said voltage controlled oscillator at the frequency at which said tuner selectively receives respective channels, where N is a different respective integer for each channel, means responsive to said voltage controlled oscillator for dividing the output frequency thereof by N, and comparison means for comparing the divided by N
signal with said reference signal to produce said tuning error signal, and said means for decoupling includes a loop filter in circuit with said feedback means.
85. A method for establishing in memory a table of predicted control voltages for a slew control for a fast tuning subsystem for use in switching from a current channel to a selected channel of a television system, the tuning subsystem comprising a tuner for selecting a channel to be received, said tuner including a voltage controlled oscillator having a control input for determining, in response to a control voltage applied to said control input, the channel frequency said tuner selectively receives, and a slew control for supplying a selected predicted control voltage signal to said control input of said oscillator, said slew control including an associated memory means for storing signals corresponding to respective control voltage signals predicted for applying to said oscillator to tune said tuner to receive the channel frequencies of the respective channels, and further including means interconnected between said memory means and said control input of said oscillator for applying one of said respective predicted control voltage signals as said selected predicted control voltage signal to said control input of said oscillator, said oscillator being responsive to said selected predicted control voltage signal to slew the channel frequency at a rapid slew rate to the frequency corresponding to said selected predicted control voltage signal, error detecting means, including a reference, for generating a tuning error signal indicative of the tuning error of the tuner off the frequency for the selected channel, and feedback means for combining said tuning error signal with said selected predicted control voltage signal to provide a control signal at said control input for adjusting said channel frequency to reduce said tuning error, characterized by a calibration mode automatically performed to establish a table of the predicted control voltage signals, said calibration mode comprising, for each of a plurality of channels, applying a respective stored preliminary control voltage signal to said control input, utilizing the resulting tuning error signal from said error detecting means to determine the control voltage signal at said control input as reduces the tuning error signal to less than a predetermined magnitude, and storing in said memory means a signal corresponding to said determined control voltage as a signal corresponding to a respective predicted control voltage signal.
86. A method according to Claim 85 characterized in that the error detecting means and the feedback means comprise a phase-locked loop generating a tuning error signal indicative of phase error, the derivative of the tuning error signal is utilized to modify the preliminary control voltage signal to produce a modified preliminary control voltage signal, and a signal corresponding to the then modified preliminary control voltage signal is stored in memory as corresponding to said determined control voltage signal.
87. A method according to Claim 86 characterized in that said determination of said determined control voltage signal is made for each channel by applying a respective preliminary control voltage signal to said control input, utilizing the resulting tuning error signal to modify the preliminary control voltage signal by a predetermined amount to produce a modified preliminary control voltage signal, applying the modified preliminary control voltage signal to said control input, and repeating the steps until the resulting tuning error signal is less than said predetermined magnitude.
88. A method according to claim 85 characterized in that said determination of said determined control voltage signal is made for each channel by applying a respective preliminary control voltage signal to said control input, utilizing the resulting tuning error signal to modify the preliminary control voltage signal by a predetermined amount to produce a modified preliminary control voltage signal, applying the modified preliminary control voltage signal to said control input, and repeating the steps until the resulting tuning error signal is less than said predetermined magnitude.
89. A method according to either one of Claims 87 and 88 characterized in that each said predetermined amount is in accordance with a binary search process wherein successive predetermined amounts decrease by half.
90. A method according to either one of Claims 87 and 88 characterized in that each said predetermined amount is substantially the same in accordance with a linear search process.
91. A method according to either one of Claims 87 and 88 characterized in that each said predetermined amount is in accordance with a binary search process for a number of steps wherein successive predetermined amounts decrease by half and is thereafter in accordance with a linear search process wherein each said predetermined amount is substantially the same.
CA000552971A 1987-11-27 1987-11-27 Characterized fast tuning control for a television system Expired - Fee Related CA1315901C (en)

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CA000552971A CA1315901C (en) 1987-11-27 1987-11-27 Characterized fast tuning control for a television system

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CA000552971A CA1315901C (en) 1987-11-27 1987-11-27 Characterized fast tuning control for a television system

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