AU2001275252A1 - Hardware-enforced loop-level hard zoning for fibre channel switch fabric - Google Patents

Hardware-enforced loop-level hard zoning for fibre channel switch fabric

Info

Publication number
AU2001275252A1
AU2001275252A1 AU2001275252A AU7525201A AU2001275252A1 AU 2001275252 A1 AU2001275252 A1 AU 2001275252A1 AU 2001275252 A AU2001275252 A AU 2001275252A AU 7525201 A AU7525201 A AU 7525201A AU 2001275252 A1 AU2001275252 A1 AU 2001275252A1
Authority
AU
Australia
Prior art keywords
fabric
hardware
fibre channel
zoning
point
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001275252A
Inventor
Frank R. Dropps
William R. George
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
QLogic Switch Products LLC
Original Assignee
QLogic Switch Products LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by QLogic Switch Products LLC filed Critical QLogic Switch Products LLC
Publication of AU2001275252A1 publication Critical patent/AU2001275252A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L63/00—Network architectures or network communication protocols for network security
    • H04L63/10—Network architectures or network communication protocols for network security for controlling access to devices or network resources
    • H04L63/101—Access control lists [ACL]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/02—Details
    • H04L12/22—Arrangements for preventing the taking of data from a data transmission channel without authorisation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/35—Switches specially adapted for specific applications
    • H04L49/356—Switches specially adapted for specific applications for storage area networks
    • H04L49/357—Fibre channel switches
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/30—Peripheral units, e.g. input or output ports
    • H04L49/3009—Header conversion, routing tables or routing tags
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/35—Switches specially adapted for specific applications
    • H04L49/351—Switches specially adapted for specific applications for local area network [LAN], e.g. Ethernet switches
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/40—Constructional details, e.g. power supply, mechanical construction or backplane
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S707/00—Data processing: database and file management or data structures
    • Y10S707/99931—Database or file accessing
    • Y10S707/99939—Privileged access

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer Security & Cryptography (AREA)
  • General Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Computer Hardware Design (AREA)
  • Small-Scale Networks (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Electronic Switches (AREA)
  • Switches With Compound Operations (AREA)
  • Switches Operated By Changes In Physical Conditions (AREA)
  • Near-Field Transmission Systems (AREA)

Abstract

Hardware-enforced zoning is provided in Fibre Channel switches to protect against breaching of assigned zones in a switch network which can occur with software-based zoning techniques. The invention provides logic for performing a hardware-based validation of the Source ID S_ID of frames both at the point where the frame enters the Fibre Channel fabric, and at the point where the frame leaves the fabric. The S_ID is verified against an inclusion list or table of allowable S_IDs, which can be unique for each fabric port. The invention provides a way to increase the range of sources an inclusion table can express, by implementing wild cards, on an entry-by entry basis. If the S_ID is valid, it will enter the fabric and route normally. If invalid, the frame will not be routed but will be disposed of by the fabric according to FC rules. This prevents incorrect S_IDs from breaching the table-driven zoning at the point where frames exit the fabric, to prevent unauthorized access to devices connected to the switch network.
AU2001275252A 2000-06-05 2001-06-05 Hardware-enforced loop-level hard zoning for fibre channel switch fabric Abandoned AU2001275252A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US20941300P 2000-06-05 2000-06-05
US60209413 2000-06-05
PCT/US2001/018159 WO2001095566A2 (en) 2000-06-05 2001-06-05 Hardware-enforced loop-level hard zoning for fibre channel switch fabric

Publications (1)

Publication Number Publication Date
AU2001275252A1 true AU2001275252A1 (en) 2001-12-17

Family

ID=22778655

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001275252A Abandoned AU2001275252A1 (en) 2000-06-05 2001-06-05 Hardware-enforced loop-level hard zoning for fibre channel switch fabric

Country Status (9)

Country Link
US (2) US7248580B2 (en)
EP (1) EP1290837B1 (en)
JP (1) JP4741039B2 (en)
KR (1) KR100670084B1 (en)
AT (1) ATE376735T1 (en)
AU (1) AU2001275252A1 (en)
CA (1) CA2410932C (en)
DE (1) DE60131079T2 (en)
WO (1) WO2001095566A2 (en)

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Also Published As

Publication number Publication date
JP4741039B2 (en) 2011-08-03
US7684398B2 (en) 2010-03-23
CA2410932C (en) 2010-04-13
ATE376735T1 (en) 2007-11-15
WO2001095566A3 (en) 2002-06-13
DE60131079T2 (en) 2008-08-07
JP2004501565A (en) 2004-01-15
KR100670084B1 (en) 2007-01-17
EP1290837A2 (en) 2003-03-12
US20080002687A1 (en) 2008-01-03
EP1290837B1 (en) 2007-10-24
KR20030036216A (en) 2003-05-09
US20030179748A1 (en) 2003-09-25
WO2001095566A2 (en) 2001-12-13
CA2410932A1 (en) 2001-12-13
DE60131079D1 (en) 2007-12-06
US7248580B2 (en) 2007-07-24

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