AU2001231038A1 - High noise rejection voltage-controlled ring oscillator architecture - Google Patents

High noise rejection voltage-controlled ring oscillator architecture

Info

Publication number
AU2001231038A1
AU2001231038A1 AU2001231038A AU3103801A AU2001231038A1 AU 2001231038 A1 AU2001231038 A1 AU 2001231038A1 AU 2001231038 A AU2001231038 A AU 2001231038A AU 3103801 A AU3103801 A AU 3103801A AU 2001231038 A1 AU2001231038 A1 AU 2001231038A1
Authority
AU
Australia
Prior art keywords
supply terminal
power supply
differential
ring oscillator
current source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001231038A
Inventor
Bin Liu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Broadcom Corp
Original Assignee
Broadcom Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Broadcom Corp filed Critical Broadcom Corp
Publication of AU2001231038A1 publication Critical patent/AU2001231038A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
    • H03F3/45183—Long tailed pairs
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45479—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection
    • H03F3/45632—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with FET transistors as the active amplifying circuit
    • H03F3/45636—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with FET transistors as the active amplifying circuit by using feedback means
    • H03F3/45641—Measuring at the loading circuit of the differential amplifier
    • H03F3/4565—Controlling the common source circuit of the differential amplifier
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/72—Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/023—Generators characterised by the type of circuit or by the means used for producing pulses by the use of differential amplifiers or comparators, with internal or external positive feedback
    • H03K3/0231—Astable circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/03—Astable circuits
    • H03K3/0315—Ring oscillators
    • H03K3/0322—Ring oscillators with differential cells
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/133—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals using a chain of active delay devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0995—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator comprising a ring oscillator
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/72—Indexing scheme relating to gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal
    • H03F2203/7203—Indexing scheme relating to gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal the gated amplifier being switched on or off by a switch in the bias circuit of the amplifier controlling a bias current in the amplifier
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
    • H03K2005/0015—Layout of the delay element
    • H03K2005/00195—Layout of the delay element using FET's
    • H03K2005/00208—Layout of the delay element using FET's using differential stages

Abstract

A ring oscillator circuit, such as a VCO, with a relatively high level of noise rejection for noise originating from both the voltage supply and ground. The ring oscillator circuit is composed of a plurality of differential delay circuits, each differential delay circuit generating a differential output signal that is a delayed (and preferably inverted) version of a differential input signal. 'Each differential delay circuit includes first and second input transistors for receiving the differential input signal. Each differential delay circuit also includes first and second load transistors coupled in parallel with the respective first and second input transistors. Each differential delay circuit further includes a first current source coupled between the first input transistor and a first power supply terminal (e.g., a voltage supply terminal), a second current source coupled between the second input transistor and the first power supply terminal and a third current source coupled between the first and second input transistors and a second power supply terminal (e.g., a ground terminal). The first and second current sources reduce the coupling of noise from the first power supply terminal to the output. The third current source reduces the coupling of noise from the second power supply terminal to the output.
AU2001231038A 2000-02-17 2001-01-22 High noise rejection voltage-controlled ring oscillator architecture Abandoned AU2001231038A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09507114 2000-02-17
US09/507,114 US6414557B1 (en) 2000-02-17 2000-02-17 High noise rejection voltage-controlled ring oscillator architecture
PCT/US2001/001987 WO2001061853A1 (en) 2000-02-17 2001-01-22 High noise rejection voltage-controlled ring oscillator architecture

Publications (1)

Publication Number Publication Date
AU2001231038A1 true AU2001231038A1 (en) 2001-08-27

Family

ID=24017311

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001231038A Abandoned AU2001231038A1 (en) 2000-02-17 2001-01-22 High noise rejection voltage-controlled ring oscillator architecture

Country Status (6)

Country Link
US (4) US6414557B1 (en)
EP (1) EP1266453B1 (en)
AT (1) ATE273585T1 (en)
AU (1) AU2001231038A1 (en)
DE (1) DE60104826T2 (en)
WO (1) WO2001061853A1 (en)

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US6717478B1 (en) * 2001-04-09 2004-04-06 Silicon Image Multi-phase voltage controlled oscillator (VCO) with common mode control
US6642802B2 (en) * 2001-12-20 2003-11-04 Bae Systems Information And Electronic Systems Integration, Inc. Ring oscillator providing single event transient immunity
US6617888B2 (en) * 2002-01-02 2003-09-09 Intel Corporation Low supply voltage differential signal driver
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US7583155B2 (en) * 2003-03-26 2009-09-01 Telefonaktiebolaget L M Ericsson (Publ) Random sequence generator
EP1463202B1 (en) * 2003-03-26 2006-08-16 Telefonaktiebolaget LM Ericsson (publ) Random sequence generator
US7116147B2 (en) * 2004-10-18 2006-10-03 Freescale Semiconductor, Inc. Circuit and method for interpolative delay
US7498858B2 (en) * 2004-11-01 2009-03-03 Hewlett-Packard Development Company, L.P. Interpolator systems with linearity adjustments and related methods
US7502880B2 (en) * 2005-07-11 2009-03-10 Via Technologies, Inc. Apparatus and method for quad-pumped address bus
US7230499B2 (en) * 2005-07-18 2007-06-12 Dialog Semiconductor Gmbh Ring oscillator with constant 50% duty cycle and ground-noise insensitive
US7330060B2 (en) * 2005-09-07 2008-02-12 Agere Systems Inc. Method and apparatus for sigma-delta delay control in a delay-locked-loop
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US7545195B2 (en) * 2006-11-14 2009-06-09 Avago Technologies Enterprise IP (Singapore) Pte. Ltd. Variable delay element
US7977992B2 (en) * 2006-11-14 2011-07-12 Avago Technologies Enterprise IP (Singapore) Pte. Ltd. Precision phase generator and method for phase generation
US7532078B2 (en) * 2007-02-09 2009-05-12 International Business Machines Corporation Scannable virtual rail method and ring oscillator circuit for measuring variations in device characteristics
US7786750B2 (en) * 2007-03-15 2010-08-31 Agere Systems Inc. Methods and apparatus for compensating for skew in a differential signal using non-complementary inverters
DE102007059231A1 (en) * 2007-12-07 2009-06-10 Polyic Gmbh & Co. Kg Electronic assembly with organic switching elements
US8786359B2 (en) * 2007-12-12 2014-07-22 Sandisk Technologies Inc. Current mirror device and method
KR101559501B1 (en) * 2009-04-08 2015-10-15 삼성전자주식회사 Semiconductor integrated circuit compensating jitter and jitter compensation method
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US8207763B1 (en) * 2010-06-29 2012-06-26 The United States Of America As Represented By The Secretary Of The Navy Non-linear channelizer device with wideband, high-frequency operation and channel reconfigurability
US9774181B2 (en) 2012-03-16 2017-09-26 Hubbell Incorporated Enhanced auto-monitoring circuit and method for an electrical device
US9041370B2 (en) 2012-07-09 2015-05-26 Silanna Semiconductor U.S.A., Inc. Charge pump regulator circuit with a variable drive voltage ring oscillator
US9081399B2 (en) * 2012-07-09 2015-07-14 Silanna Semiconductor U.S.A., Inc. Charge pump regulator circuit with variable amplitude control
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CN111600606B (en) * 2020-06-18 2023-05-23 中国科学院微电子研究所 Multi-phase clock generation circuit for time interleaved sampling ADC

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Also Published As

Publication number Publication date
US6414557B1 (en) 2002-07-02
DE60104826D1 (en) 2004-09-16
DE60104826T2 (en) 2005-09-15
ATE273585T1 (en) 2004-08-15
US6657503B2 (en) 2003-12-02
US20040066242A1 (en) 2004-04-08
US6963251B2 (en) 2005-11-08
EP1266453A1 (en) 2002-12-18
EP1266453B1 (en) 2004-08-11
WO2001061853A1 (en) 2001-08-23
US6828866B2 (en) 2004-12-07
US20050068114A1 (en) 2005-03-31
US20020118072A1 (en) 2002-08-29

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