WO2026002153A1 - 电子设备 - Google Patents

电子设备

Info

Publication number
WO2026002153A1
WO2026002153A1 PCT/CN2025/104010 CN2025104010W WO2026002153A1 WO 2026002153 A1 WO2026002153 A1 WO 2026002153A1 CN 2025104010 W CN2025104010 W CN 2025104010W WO 2026002153 A1 WO2026002153 A1 WO 2026002153A1
Authority
WO
WIPO (PCT)
Prior art keywords
pin
battery
motherboard
switch
electronic device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
PCT/CN2025/104010
Other languages
English (en)
French (fr)
Inventor
黄碧光
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Vivo Mobile Communication Co Ltd
Original Assignee
Vivo Mobile Communication Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Vivo Mobile Communication Co Ltd filed Critical Vivo Mobile Communication Co Ltd
Publication of WO2026002153A1 publication Critical patent/WO2026002153A1/zh
Pending legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—ELECTRIC POWER NETWORKS; CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or discharging batteries or for supplying loads from batteries
    • H02J7/60—Circuit arrangements for charging or discharging batteries or for supplying loads from batteries including safety or protection arrangements
    • H02J7/663—Circuit arrangements for charging or discharging batteries or for supplying loads from batteries including safety or protection arrangements using battery or load disconnect circuits
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—ELECTRIC POWER NETWORKS; CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or discharging batteries or for supplying loads from batteries
    • H02J7/855—Circuit arrangements for charging or discharging batteries or for supplying loads from batteries with circuits adapted for supplying loads from the battery

Definitions

  • This application belongs to the field of battery technology, specifically relating to an electronic device.
  • Electronic devices are equipped with a Ship Mode. When the device is not in use, it can be controlled to enter Ship Mode, which allows the battery to stop supplying power to some components of the device. This reduces battery consumption, minimizes prolonged periods of low battery power, and reduces the risk of battery swelling, thus improving the safety of the electronic device.
  • the purpose of this application is to provide an electronic device that can solve the problem of low security in the use of electronic devices.
  • embodiments of this application provide an electronic device comprising: a motherboard with a first controller mounted thereon; a battery, the first terminal of which is connected to a first terminal of the motherboard; the battery including a first switching transistor and a first integrated circuit; the first terminal of the first switching transistor being connected to a second terminal of the battery and a second terminal of the first switching transistor being connected to a second terminal of the motherboard; the first integrated circuit including a first pin connected to a signal generation terminal of the first controller and a first terminal of the first integrated circuit connected to a third terminal of the first switching transistor.
  • the first controller is configured to adjust the voltage of the first pin to generate a first signal on the first pin when a power supply path between the battery and the motherboard is open; the first integrated circuit is configured to control the first switching transistor to disconnect when the first signal is detected on the first pin, thereby disconnecting the path between the battery and the motherboard.
  • embodiments of this application provide a control method applied to an electronic device as described in the first aspect.
  • the method includes: when a path is established between the battery of the electronic device and the motherboard of the electronic device, controlling a first controller of the motherboard to adjust the voltage of a first pin of a first integrated circuit of the electronic device to generate a first signal on the first pin; and when the first signal is detected on the first pin, controlling a first switch of the electronic device to turn off to disconnect the path between the battery and the motherboard.
  • control device which includes: a control module, configured to control a first controller on the motherboard to adjust the voltage of a first pin of a first integrated circuit of the control device to generate a first signal on the first pin when a connection is established between the battery of the control device and the motherboard of the control device; and to control a first switch of the control device to disconnect when the first signal is detected on the first pin, thereby disconnecting the connection between the battery and the motherboard.
  • embodiments of this application provide an electronic device including a processor and a memory, the memory storing programs or instructions executable on the processor, the programs or instructions, when executed by the processor, implementing the steps of the method described in the second aspect.
  • embodiments of this application provide a readable storage medium on which a program or instructions are stored, which, when executed by a processor, implement the steps of the method described in the second aspect.
  • embodiments of this application provide a chip, the chip including a processor and a communication interface, the communication interface being coupled to the processor, the processor being used to run programs or instructions to implement the steps of the method described in the second aspect.
  • embodiments of this application provide a computer program product stored in a storage medium, which is executed by at least one processor to implement the steps of the method described in the second aspect.
  • the electronic device may include a motherboard with a first controller and a battery with a first terminal connected to a first terminal of the motherboard.
  • the battery includes a first switching transistor and a first integrated circuit.
  • the first terminal of the first switching transistor is connected to a second terminal of the battery, and the second terminal of the first switching transistor is connected to a second terminal of the motherboard.
  • the first integrated circuit includes a first pin, which is connected to a signal generation terminal of the first controller, and the first terminal of the first integrated circuit is connected to a third terminal of the first switching transistor.
  • the first controller is used to adjust the voltage of the first pin to generate a first signal on the first pin when the path between the battery and the motherboard is open.
  • the first integrated circuit is used to control the first switching transistor to turn off when the first signal is detected on the first pin, thereby disconnecting the path between the battery and the motherboard. Because the battery contains a first switching transistor and a first integrated circuit, and the motherboard contains a first controller, the first controller can generate a first signal on the first pin by adjusting the voltage of the first pin when the path between the battery and the motherboard is open. This first signal triggers the first integrated circuit to control the first switching transistor to turn off, thus disconnecting the path between the battery and the motherboard. As a result, the battery can stop supplying power to all components of the electronic device, rather than just some components. Therefore, the number of battery-powered devices can be reduced, thereby reducing battery power consumption. This reduces the occurrence of prolonged periods of low battery power when the electronic device is not in use, and consequently reduces the occurrence of battery bulging and other issues, thus improving the safety of using electronic devices.
  • Figure 1 is one of the schematic diagrams of the circuit structure of the battery and motherboard of an electronic device in the related technology
  • Figure 2 is one of the circuit structure diagrams of the battery and motherboard of the electronic device provided in the embodiments of this application;
  • Figure 3 is a second schematic diagram of the circuit structure of the battery and motherboard of the electronic device provided in the embodiment of this application;
  • Figure 4 is a third schematic diagram of the circuit structure of the battery and motherboard of the electronic device provided in the embodiments of this application;
  • Figure 5 is a schematic diagram of the electronic device entering the shipping mode provided in the embodiment of this application.
  • Figure 6 is a fourth schematic diagram of the circuit structure of the battery and motherboard of the electronic device provided in the embodiments of this application;
  • Figure 7 is the fifth schematic diagram of the circuit structure of the battery and motherboard of the electronic device provided in the embodiments of this application.
  • Figure 8 is a schematic diagram of the electronic device exiting the shipping mode provided in the embodiment of this application.
  • FIG. 9 is a flowchart illustrating the control method provided in an embodiment of this application.
  • FIG. 10 is a schematic diagram of the control device provided in an embodiment of this application.
  • Figure 11 is one of the hardware structure diagrams of the electronic device provided in the embodiments of this application.
  • Figure 12 is a second schematic diagram of the hardware structure of the electronic device provided in the embodiments of this application.
  • first and second in the specification and claims of this application may explicitly or implicitly include one or more of the features.
  • multiple means two or more.
  • and/or in the specification and claims indicates at least one of the connected objects, and the character “/” generally indicates that the preceding and following objects are in an “or” relationship.
  • connection should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection between two components.
  • connection should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection between two components.
  • the electronic device provided in this application embodiment can be applied in scenarios where the electronic device enters transportation mode or in scenarios where the electronic device is turned off.
  • a battery pack 01 of an electronic device contains a battery.
  • the positive terminal of the battery is connected to the p+ terminal of the battery pack 01, and the negative terminal of the battery is connected to the p- terminal of the battery pack 01.
  • the p+ terminal of the battery pack 01 is connected to the VBAT pin of the power management integrated circuit (PMIC) 03 of the motherboard 02.
  • the VBAT pin can be connected to the switching transistor QBAT in the PMIC 03.
  • the switching transistor QBAT is also connected to the VPH_PWR pin of the PMIC 03.
  • the VPH_PWR pin can be connected to multiple devices of the electronic device, including a central processing unit (CPU), memory, screen driver, screen, speaker driver, speaker, RF power management, RF module, and other load modules.
  • CPU central processing unit
  • the VBAT pin of the PMIC 03 can also be connected to the VBAT load of the electronic device.
  • the p- terminal of the battery pack 01 is connected to the GND pin of the PMIC 03.
  • the switching transistor QBAT in PMIC 03 can be turned off to control the electronic device to enter Ship Mode.
  • This allows the battery pack 01 of the electronic device to stop supplying power to multiple devices connected to the VPH_PWR pin of the mainboard 02, thereby reducing the power consumption of the battery in battery pack 01 and minimizing prolonged periods of low battery power. This can reduce battery swelling and improve the safety of the electronic device.
  • the battery in battery pack 01 still supplies power to the VBAT load connected to the VBAT pin. Therefore, the battery power of the electronic device will continue to be consumed, and even when the electronic device is not in use for a long time, the battery may still be low for an extended period, potentially leading to battery swelling. This results in a lower level of safety for the electronic device.
  • FIG. 2 shows a schematic diagram of the circuit structure of an electronic device provided in this application.
  • the electronic device provided in this application may include: a motherboard 10, on which a first controller 11 is disposed; a battery 12, the first terminal of which is connected to the first terminal of the motherboard 10; the battery 12 includes a first switching transistor 13 and a first integrated circuit 14; the first terminal of the first switching transistor 13 is connected to the second terminal of the battery 12, and the second terminal of the first switching transistor 13 is connected to the second terminal of the motherboard 10; the first integrated circuit 14 includes a first pin 15, which is connected to the signal generation terminal of the first controller 11; and the first terminal of the first integrated circuit 14 is connected to the third terminal of the first switching transistor 13.
  • the first controller 11 described above can be an application processor (AP).
  • AP application processor
  • the first controller 11 can also be other processors, and this application embodiment does not limit this.
  • the motherboard 10 may also be provided with a power management integrated circuit (PMIC), which can be connected to at least one device of the electronic device, thereby supplying power to at least one device through the PMIC.
  • PMIC power management integrated circuit
  • the aforementioned PMIC can be connected to at least one device via the VPH_PWR pin.
  • the battery 12 can be any of the following: a lithium battery, a silicon anode battery, or a steel-cased battery.
  • the battery 12 can also be other types of batteries, and this application does not limit the specific types of batteries described herein.
  • the first electrode of the battery 12 can be either a positive or a negative electrode.
  • the second electrode of the battery 12 can be either a negative or a positive electrode.
  • the battery 12 may further include a protection integrated circuit.
  • the first terminal of the battery 12 can be connected to the first terminal of the motherboard 10 through the protection integrated circuit, and the second terminal of the battery 12 can be connected to the second terminal of the motherboard 10 through the first switching transistor 13 and the protection integrated circuit.
  • the first terminal of the battery 12 can be connected to the VBAT pin of the PMIC of the motherboard 10.
  • the second terminal of the battery 12 can be connected to the GND pin of the PMIC of the motherboard 10 through the first switching transistor 13 and the charging switching transistor of the protection integrated circuit. It can be understood that the VBAT pin of the PMIC can be regarded as the first terminal of the motherboard 10, and the GND pin of the PMIC can be regarded as the second terminal of the motherboard 10.
  • the first switch 13 includes a metal-oxide-semiconductor field-effect transistor (MOSFET).
  • MOSFET metal-oxide-semiconductor field-effect transistor
  • the first switch 13 can also be other devices, and this application does not limit the specific devices described herein.
  • the first integrated circuit 14 described above may be referred to as a shipping mode integrated circuit.
  • the first pin 15 described above may specifically be a SWI pin.
  • the first terminal of the first integrated circuit 14 described above may specifically be a PD pin.
  • the first integrated circuit 14 described above may be powered by the battery 12 or by other power sources, and this application does not limit the specific power source.
  • the second terminal of the first integrated circuit 14 is connected to the first terminal of the battery 12
  • the third terminal of the first integrated circuit 14 is connected to the second terminal of the battery 12.
  • the aforementioned battery 12 can also supply power to the first integrated circuit 14.
  • the second terminal of the first integrated circuit 14 can be the VDD terminal, and the third terminal of the first integrated circuit 14 can be the VSS terminal.
  • the second and third terminals of the first integrated circuit can be connected to the first and second terminals of the battery respectively, the first integrated circuit can be powered directly by the battery without the need for an additional power source in the electronic device. Therefore, the cost can be reduced while decreasing the circuit complexity of the electronic device.
  • the first controller 11 is used to adjust the voltage of the first pin 15 when the path between the battery 12 and the motherboard 10 is open, so as to generate a first signal on the first pin 15;
  • the first integrated circuit 14 is used to control the first switch 13 to turn off when the first signal is detected on the first pin, so as to disconnect the path between the battery 12 and the motherboard 10.
  • the first signal described above may specifically be a pulse signal.
  • the first controller 11 can alternately control the first pin 15 to be grounded and ungrounded in order to adjust the voltage of the first pin 15.
  • the first pin 15 when the first controller 11 controls the first pin 15 to be ungrounded, the first pin 15 can be supplied with voltage by other power sources of the electronic device so that the voltage of the first pin 15 is one voltage; when the first controller 11 controls the first pin 15 to be grounded, the first controller 11 can pull down the voltage of the first pin 15 so that the voltage of the first pin 15 is another voltage.
  • the first controller 11 includes: a second switch 16, the first end of which is connected to the signal generation terminal of the first controller 11, and the second end of which is grounded; a control module 17, which is connected to the third end of the second switch 16; wherein the voltage of the first pin 15 when the second switch 16 is off is different from the voltage when the second switch 16 is on.
  • the second switch 16 can be a MOS transistor, and the control terminal of the second switch 16 can be connected to the first controller 11, so that the first controller 11 can control the on/off state of the second switch 16.
  • control module 17 described above may specifically be any of the following: a central processing unit (CPU) or a microcontroller unit (MCU).
  • CPU central processing unit
  • MCU microcontroller unit
  • the motherboard 10 further includes a PMIC 18, which is connected to a first pin 15 via a diode 19; wherein the PMIC 18 is connected to the positive terminal of the diode 19, and the first pin 15 is connected to the negative terminal of the diode 19; the PMIC 18 is used to provide voltage to the first pin 15 when the path between the battery 12 and the motherboard 10 is open.
  • the PMIC 18 can be connected to the first pin 15 and the signal generation terminal of the first controller 11 via diode 19. Specifically, the PMIC 18 can be connected to the anode of diode 19, and the first pin 15 and the signal generation terminal of the first controller 11 can be connected to the cathode of diode 19. It can be understood that since the PMIC 18 can be connected to the first pin 15 and the signal generation terminal of the first controller 11 via diode 19, the influence of the voltage at the first pin 15 and/or the signal generation terminal of the first controller 11 on the PMIC 18 can be avoided during use.
  • the voltage at the first pin 15 when the second switch 16 is off can specifically be 1.8 volts (V).
  • the voltage at the first pin 15 when the second switch 16 is on can specifically be 0V.
  • the first pin 15 when the second switch 16 is off, the first pin 15 is connected to the PMIC 18 to pull up the voltage of the first pin 15 through the PMIC 18.
  • the first pin 15 can be considered to be grounded, therefore, the voltage of the first pin 15 will be pulled down to 0V.
  • control module 17 is specifically used to control the second switch 16 to turn on and off for the first number of times within a first duration, and the duration of each turn on of the second switch 16 is greater than or equal to a second duration; so as to generate a first signal that satisfies a first condition on the first pin 15;
  • the first integrated circuit 14 is specifically used to control the first switch 13 to turn off when the first signal that satisfies the first condition is detected on the first pin 15;
  • the first condition includes: the number of pulses of the first signal within the first duration is the same as the number of the first count, and the pulse duration of each pulse is greater than or equal to the second duration.
  • the first number can be 5.
  • the first number can also be other numbers, which are not limited in the embodiments of this application.
  • the control module 17 when the path between the battery 12 and the motherboard 10 is open, the control module 17 can first control the second switch 16 to turn off. In this way, when the control module 17 determines that the shipping mode needs to be accessed, it can first control the second switch 16 to turn on for a second time within a first duration. At this time, the first pin 15 is grounded, so the voltage of the first pin 15 will be pulled down to 0V. Then the control module 17 can control the second switch 16 to turn off for a fourth time, so that the PMIC 18 can provide voltage to the first pin 15. Therefore, the voltage of the first pin 15 will be pulled up. Then the control module 17 can control the second switch 16 to turn on for a second time again, and so on, until the number of times the second switch 16 is turned on is the same as the first time.
  • the first integrated circuit 14 may directly control the first switch 13 to turn off. Therefore, in order to avoid the above situation, the control module 17 will control the second switch 16 to turn on and off according to a special control method to generate a specific sequence of pulse signals (i.e., the first signal). The first integrated circuit 14 will only control the first switch 13 to turn off when the first signal meets the first condition.
  • the control module can control the second switch to turn on and off for the first time within the first duration, and the duration of each turn of the second switch is greater than or equal to the second duration, so as to generate a first signal that meets the first condition on the first pin.
  • the first integrated circuit can disconnect the connection between the battery and the motherboard based on the first signal that meets the first condition, rather than disconnecting the connection between the battery and the motherboard based on an arbitrary signal. Therefore, it can avoid the situation where the battery stops supplying power to the motherboard due to interference.
  • the first integrated circuit 14 may, upon receiving a first signal and determining that the first signal meets a first condition, delay for a fifth duration and output a low level to the third terminal of the first switch 13, thereby turning off the first switch 13, thus disconnecting the path between the battery 12 and the motherboard 10, and allowing the electronic device to enter the shipping mode.
  • the following example illustrates the process of an electronic device entering shipping mode.
  • the electronic device is in normal operation.
  • the second switch 16 is off, and the PMIC 18 provides a voltage (e.g., 1.8V) to the first pin 15, which is maintained at 1.8V.
  • the electronic device can be operated so that the first controller 11 can control the second switch 16 to turn on and off for the first number of times (e.g., 5) within a first duration (e.g., T2), and the duration of each turn on of the second switch 16 is greater than or equal to the second duration (e.g., T1).
  • the first integrated circuit 14 can delay for a fifth duration (e.g., T3) and output a low level to the third terminal of the first switch 13, so that the first switch 13 is turned off, thereby disconnecting the path between the battery 12 and the motherboard 10, and the electronic device can enter the shipping mode.
  • a fifth duration e.g., T3
  • the first integrated circuit 14 can directly control the first switch 13 to turn off, thereby disconnecting the path between the battery 12 and the motherboard 10.
  • This application provides an electronic device that may include a motherboard with a first controller and a battery with a first terminal connected to a first terminal of the motherboard.
  • the battery includes a first switching transistor and a first integrated circuit.
  • the first terminal of the first switching transistor is connected to a second terminal of the battery, and the second terminal of the first switching transistor is connected to a second terminal of the motherboard.
  • the first integrated circuit includes a first pin, which is connected to a signal generation terminal of the first controller, and the first terminal of the first integrated circuit is connected to a third terminal of the first switching transistor.
  • the first controller is used to adjust the voltage of the first pin to generate a first signal on the first pin when the path between the battery and the motherboard is open.
  • the first integrated circuit is used to control the first switching transistor to turn off when the first signal is detected on the first pin, thereby disconnecting the path between the battery and the motherboard. Because the battery contains a first switching transistor and a first integrated circuit, and the motherboard contains a first controller, the first controller can generate a first signal on the first pin by adjusting the voltage of the first pin when the path between the battery and the motherboard is open. This first signal triggers the first integrated circuit to control the first switching transistor to turn off, thus disconnecting the path between the battery and the motherboard. As a result, the battery can stop supplying power to all components of the electronic device, rather than just some components. Therefore, the number of battery-powered devices can be reduced, thereby reducing battery power consumption. This reduces the occurrence of prolonged periods of low battery power when the electronic device is not in use, and consequently reduces the occurrence of battery bulging and other issues, thus improving the safety of using electronic devices.
  • the first integrated circuit 14 can also reconnect the connection between the battery 12 and the motherboard 10 based on the signal detected on the first pin 15.
  • the motherboard 10 is further provided with a third switch transistor 20.
  • the first end of the third switch transistor 20 is connected to the first end of the first pin 15, and the second end of the third switch transistor 20 is grounded.
  • the third end of the first integrated circuit 14 is connected to the second end of the third switch transistor 20 through a first resistor 21.
  • the voltage of the first pin 15 when the third switch transistor 20 is off is different from the voltage when the third switch transistor 20 is on.
  • the third switch transistor 20 is used to conduct when pressed to generate a second signal on the first pin 15.
  • the first integrated circuit 14 is also used to control the first switch transistor 13 to conduct when the second signal is detected on the first pin 15, so as to conduct the path between the battery 12 and the motherboard 10.
  • the resistance value of the first resistor 21 is greater than or equal to a preset resistance value.
  • the preset resistance value can be 1000 ohms ( ⁇ ).
  • the preset resistance value can also be other threshold values, and this application does not limit this.
  • the resistance value of the first resistor can be set to a value greater than or equal to the preset resistance value, that is, the resistance value of the first resistor can be set to a larger value, the leakage current between the battery and the motherboard can be reduced when the circuit between the battery and the motherboard is broken.
  • a second signal can be generated on the first pin by controlling the on/off state of the third switch.
  • the first integrated circuit can connect the battery and the motherboard according to the second signal, thereby avoiding the situation where the battery cannot supply power to the motherboard.
  • the first integrated circuit 14 further includes a power supply device 22, which is connected to the first pin 15; wherein the power supply device 22 is used to provide voltage to the first pin 15 when the connection between the battery 12 and the motherboard 10 is broken.
  • a power supply device can also be set in the first integrated circuit, when the connection between the battery and the motherboard is broken, the power supply device can provide voltage to the first pin, so that a second signal can be generated on the first pin by controlling the on and off of the third switch.
  • the first integrated circuit can conduct the connection between the battery and the motherboard according to the second signal, thus avoiding the situation where the battery cannot supply power to the motherboard.
  • the power supply device 22 includes: a power supply unit 23 for providing voltage to the first pin 15; a fourth switch 24, the first end of which is connected to the power supply unit 23, and the second end of which is connected to the first pin 15 through a second resistor 25; wherein, when the path between the battery 12 and the motherboard 10 is broken, the fourth switch 24 is turned on; when the path between the battery 12 and the motherboard 10 is open, the fourth switch 24 is turned off.
  • the fourth switch 24 described above may specifically be a MOS transistor.
  • a second resistor 25 can be provided to divide the voltage supplied by the power supply unit 23, thereby reducing the voltage supplied by the power supply unit 23 to the first pin 15.
  • the power supply device can include a power unit and a fourth switching transistor, even when the connection between the battery and the motherboard is broken, the power supply device can supply voltage to the first pin by controlling the fourth switching transistor to conduct. This allows the voltage of the first pin to be adjusted by pressing the third switching transistor, accurately generating a second signal, which then accurately triggers the first integrated circuit to reconnect the connection between the battery and the motherboard. Alternatively, when the connection between the battery and the motherboard is established, the fourth switching transistor can be deactivated, thus preventing the first pin from affecting its connected components.
  • the third switch tube 20 may specifically be a push-button switch tube, which can be turned on when pressed and turned off when the pressing ends.
  • the third switch 20 described above can be connected to a physical button (e.g., a power button) of an electronic device, so that when the user presses the power button, it can be regarded as pressing the third switch 20.
  • a physical button e.g., a power button
  • the third switch 20 is used to be turned on when pressed to adjust the voltage of the first pin 15 so as to generate a second signal on the first pin 15.
  • the third switch 20 when the third switch 20 is not pressed, the third switch 20 is off, and the voltage at the first pin 15 can be the voltage supplied by the power supply device 22 to the first pin 15.
  • the third switch 20 When the third switch 20 is pressed, the third switch 20 is turned on. At this time, a current loop can be formed by the power supply device 22, the first pin 15, the third switch 20, the first resistor 21, the third terminal (e.g., the VSS terminal) of the first integrated circuit 14, and the second terminal of the battery 12. Since the resistance value in this current loop increases (i.e., the first resistor 21 is added), the voltage at the first pin 15 will decrease. It can be understood that when the third switch 20 is turned on, the voltage at the first pin 15 will decrease. Therefore, it can be understood that the voltage at the first pin 15 can be adjusted when the third switch 20 is pressed.
  • the voltage of the first pin 15 when the third switch 20 is off is different from the voltage when the third switch 20 is on; when the third switch 20 is pressed within a third duration, a second signal satisfying a second condition is generated on the first pin 15; the first integrated circuit 14 is specifically used to control the first switch 13 to turn on when the second signal satisfying the second condition is detected on the first pin 15; the second condition includes: the voltage corresponding to the second signal changes once, and the voltage corresponding to the second signal does not change within the third duration.
  • a second signal that satisfies the second condition can be generated on the first pin by controlling the third switch to conduct within a third time period.
  • the first integrated circuit can connect the battery and the motherboard based on the second signal that satisfies the second condition, instead of connecting the battery and the motherboard based on an arbitrary signal. Therefore, it can avoid the situation where the battery continues to supply power to the motherboard due to interference.
  • the following example illustrates the process of an electronic device exiting shipping mode.
  • the fourth switch 24 is turned on, and the power supply unit 23 provides voltage (e.g., Vpu) to the first pin 15 through the second resistor 25.
  • Vpu voltage
  • the user wants the electronic device to exit the shipping mode, the user can press the power button of the electronic device to press the third switch 20, so that the third switch 20 can be turned on.
  • the power supply unit 22, the first pin 15, the third switch 20, the first resistor 21, the third terminal (e.g., the VSS terminal) of the first integrated circuit 14, and the second terminal of the battery 12 can form a current loop.
  • the voltage of the first pin 15 will decrease to Vpu*(R1/(Rp+R1)), where R1 is the resistance of the first resistor 21 and Rp is the resistance of the second resistor 25, to form the second signal (i.e., the SWI signal).
  • the second signal can satisfy the second condition, that is, the voltage value corresponding to the second signal changes from Vpu to Vpu*(R1/(Rp+R1)), and remains at Vpu*(R1/(Rp+R1)) for the third duration. Consequently, the first integrated circuit 14 can conduct the path between the battery 12 and the motherboard 10.
  • the fourth switch 24 is turned off, and the PMIC 18 on the motherboard 10 can provide voltage (e.g., Vpu) to the first pin 15, so that the voltage of the first pin 15 is maintained at Vpu.
  • a third switching transistor can be installed on the motherboard and a power supply device is installed in the first integrated circuit, a voltage can be supplied to the first pin by the power supply device when the connection between the battery and the motherboard is broken.
  • the voltage of the first pin can be adjusted by pressing the third switching transistor to accurately generate a second signal.
  • the second signal can then accurately trigger the first integrated circuit to connect the connection between the battery and the motherboard.
  • Step 101 With the circuit between the battery of the electronic device and the motherboard of the electronic device connected, the first controller of the electronic device controls the motherboard to adjust the voltage of the first pin of the first integrated circuit of the electronic device to generate a first signal on the first pin.
  • a predetermined configuration can be performed in the electronic device first, so that after the configuration is completed, the electronic device can determine whether to enter the shipping mode, and if it is determined that it should enter the shipping mode, the electronic device can control the first controller to adjust the voltage of the first pin of the first integrated circuit.
  • Step 102 When the electronic device detects the first signal on the first pin, it controls the first switch of the electronic device to turn off through the first integrated circuit, so as to disconnect the circuit between the battery and the motherboard.
  • the electronic device when the electronic device detects a first signal on the first pin, it can directly control the first switch of the electronic device to turn off via the first integrated circuit to disconnect the path between the battery and the motherboard.
  • the electronic device when the electronic device detects a first signal on the first pin, it can first determine whether the first signal meets a condition (e.g., the first condition in the embodiments below), and only when the first signal meets the condition will it control the first switch of the electronic device to turn off via the first integrated circuit to disconnect the path between the battery and the motherboard.
  • a condition e.g., the first condition in the embodiments below
  • step 101 can be implemented by step 101a, and step 102 can be implemented by step 102a.
  • Step 101a When the circuit between the battery of the electronic device and the motherboard of the electronic device is connected, the control module of the electronic device controls the second switch to turn on and off for the first time within the first duration.
  • the duration of each turn on of the second switch is greater than or equal to the second duration.
  • Step 102a When the electronic device detects a first signal that meets the first condition on the first pin, it controls the first switch to turn off through the first integrated circuit.
  • the voltage at the first pin when the second switch is off is different from the voltage when the second switch is on.
  • the first condition includes: the number of pulses of the first signal within a first duration is the same as the number of pulses in the first count, and the pulse duration of each pulse is greater than or equal to the second duration.
  • This application provides a control method in which an electronic device, when the path between its battery and motherboard is open, controls a first controller on the motherboard to adjust the voltage of a first pin of a first integrated circuit in the electronic device to generate a first signal on the first pin.
  • the first integrated circuit controls a first switching transistor in the electronic device to disconnect, thus breaking the path between the battery and the motherboard.
  • the electronic device can generate a first signal on the first pin by controlling the first controller to adjust the voltage of the first pin when the path between the battery and the motherboard is open, and this first signal triggers the first integrated circuit to control the first switching transistor to disconnect, the path between the battery and the motherboard is broken.
  • This allows the battery to stop supplying power to all devices in the electronic device, rather than just some of them. Therefore, the number of battery-powered devices can be reduced, thus reducing battery consumption. This reduces the likelihood of prolonged periods of low battery power when the electronic device is not in use, thereby reducing the risk of battery swelling and improving the safety of the electronic device.
  • Step 201 Upon receiving a user's input to press the third switch on the motherboard, the electronic device adjusts the voltage of the first pin through the third switch to generate a second signal on the first pin.
  • the aforementioned pressing input is used to control the conduction of the third switch tube.
  • Step 202 When the electronic device detects the second signal on the first pin, it controls the first switch to be turned on through the first integrated circuit to connect the battery and the motherboard.
  • the electronic device when the electronic device detects a second signal on the first pin, it can directly control the first switch transistor to turn on via the first integrated circuit to establish a connection between the battery and the motherboard.
  • the electronic device when the electronic device detects a second signal on the first pin, it can first determine whether the second signal meets a condition (e.g., the second condition in the embodiments below), and if the second signal meets the condition, control the first switch transistor to turn on via the first integrated circuit to establish a connection between the battery and the motherboard.
  • a condition e.g., the second condition in the embodiments below
  • the input duration of the press input is a third duration.
  • step 202 can be implemented specifically through step 202a below.
  • Step 202a When the electronic device detects a second signal that meets the second condition on the first pin, it controls the first switch to turn on via the first integrated circuit.
  • the voltage of the first pin when the third switch is off is different from the voltage when the third switch is on;
  • the second condition includes: the voltage corresponding to the second signal changes once, and the voltage corresponding to the second signal does not change within the third time period.
  • the electronic device can directly control the first switch to turn on the first integrated circuit to connect the power supply between the battery and the motherboard, thereby causing the electronic device to exit the shipping mode.
  • a second signal that satisfies the second condition can be generated by controlling the third switch to conduct within a third time period.
  • the first integrated circuit can connect the battery and the motherboard based on the second signal that satisfies the second condition, instead of connecting the battery and the motherboard based on an arbitrary signal. Therefore, it can avoid the situation where the battery continues to supply power to the motherboard due to interference.
  • the control method provided in this application can be executed by a control device.
  • This application uses the example of a control device executing the control method to illustrate the control device provided in this application.
  • Figure 10 shows a schematic diagram of the structure of the control device provided in an embodiment of this application.
  • the control device 50 provided in this embodiment of the application may include: a control module 51, used to control a first controller on the motherboard to adjust the voltage of a first pin of a first integrated circuit of the control device 50 to generate a first signal on the first pin when the path between the battery of the control device 50 and the motherboard of the control device 50 is open; and when the first signal is detected on the first pin, to control the first switching transistor of the control device 50 to turn off through the first integrated circuit to disconnect the path between the battery and the motherboard.
  • a control module 51 used to control a first controller on the motherboard to adjust the voltage of a first pin of a first integrated circuit of the control device 50 to generate a first signal on the first pin when the path between the battery of the control device 50 and the motherboard of the control device 50 is open; and when the first signal is detected on the first pin, to control the first switching transistor of the control device 50 to turn off through the first integrated circuit to disconnect the path between the
  • This application provides a control device.
  • the control device can generate a first signal on the first pin by controlling the first controller to adjust the voltage of the first pin.
  • This first signal triggers the first integrated circuit to control the first switching transistor to turn off, thereby disconnecting the path between the battery and the motherboard.
  • the battery can stop supplying power to all devices in the control device, rather than stopping supplying power to only some devices. Therefore, the number of battery-powered devices can be reduced, thereby reducing battery power consumption. This can reduce the occurrence of situations where the battery has a low power level for a long time when the control device is not used for a long time, and thus reduce phenomena such as battery bulging. In this way, the safety of the control device can be improved.
  • control module 51 is specifically used to control the first controller to control the second switch to turn on and off a first number of times within a first duration, wherein the duration of each turn on of the second switch is greater than or equal to a second duration; the control module 51 is specifically used to control the first switch to turn off via the first integrated circuit when the first signal detected on the first pin satisfies a first condition.
  • the voltage at the first pin when the second switch is off is different from the voltage when the second switch is on;
  • the first condition includes: the number of pulses of the first signal within the first duration is the first number, and the pulse duration of each pulse is greater than or equal to the second duration.
  • control module 51 is further configured to, upon detecting a first signal on the first pin, control the first switch of the control device 50 to disconnect the circuit between the battery and the motherboard via the first integrated circuit, and upon receiving a user's pressing input on the third switch of the motherboard, adjust the voltage of the first pin via the third switch to generate a second signal on the first pin, the pressing input being used to control the third switch to turn on; and upon detecting a second signal on the first pin, control the first switch to turn on via the first integrated circuit to connect the circuit between the battery and the motherboard.
  • the input duration of the aforementioned press input is a third duration.
  • the control module 51 is used to control the first switch to turn on via the first integrated circuit when the second signal detected on the first pin satisfies a second condition.
  • the voltage of the first pin when the third switch is off is different from the voltage when the third switch is on;
  • the second condition includes: the voltage corresponding to the second signal changes once, and the voltage corresponding to the second signal does not change within the third duration.
  • the control device in this application embodiment can be an electronic device or a component within an electronic device, such as an integrated circuit or a chip.
  • the electronic device can be a terminal or other devices besides a terminal.
  • the electronic device can be a mobile phone, tablet computer, laptop computer, PDA, in-vehicle electronic device, mobile internet device (MID), augmented reality (AR)/virtual reality (VR) device, robot, wearable device, ultra-mobile personal computer (UMPC), netbook, or personal digital assistant (PDA), etc. It can also be a server, network attached storage (NAS), personal computer (PC), television (TV), ATM, or self-service machine, etc.
  • NAS network attached storage
  • PC personal computer
  • TV television
  • ATM or self-service machine, etc.
  • This application embodiment does not specifically limit the scope of the device.
  • the control device in this application embodiment can be a device with an operating system.
  • This operating system can be Android, iOS, or other possible operating systems; this application embodiment does not specifically limit the specific operating system used.
  • control device provided in this application embodiment can implement the various processes implemented in the method embodiment of FIG9. To avoid repetition, it will not be described again here.
  • this application also provides an electronic device 60, including a processor 61 and a memory 62.
  • the memory 62 stores a program or instructions that can run on the processor 61.
  • the program or instructions are executed by the processor 61, they implement the various process steps of the above-described control method embodiments and can achieve the same technical effect. To avoid repetition, they will not be described again here.
  • the electronic devices in the embodiments of this application include the aforementioned mobile electronic devices and non-mobile electronic devices.
  • Figure 12 is a schematic diagram of the hardware structure of an electronic device that implements an embodiment of this application.
  • the electronic device 100 includes, but is not limited to, components such as: radio frequency unit 101, network module 102, audio output unit 103, input unit 104, sensor 105, display unit 106, user input unit 107, interface unit 108, memory 109, and processor 110.
  • the electronic device 100 may also include a power supply (such as a battery) for powering various components.
  • the power supply may be logically connected to the processor 110 through a power management system, thereby enabling functions such as charging, discharging, and power consumption management through the power management system.
  • the electronic device structure shown in Figure 12 does not constitute a limitation on the electronic device.
  • the electronic device may include more or fewer components than shown, or combine certain components, or have different component arrangements, which will not be elaborated here.
  • the processor 110 is configured to control a first controller on the motherboard to adjust the voltage of a first pin of a first integrated circuit of the electronic device to generate a first signal on the first pin when the circuit between the battery and the motherboard of the electronic device is open; and to control a first switch of the electronic device to turn off through the first integrated circuit when the first signal is detected on the first pin, thereby disconnecting the circuit between the battery and the motherboard.
  • This application provides an electronic device in which, when the connection between the battery and the motherboard is established, the electronic device can generate a first signal on the first pin by controlling the voltage of the first pin through the first controller. This first signal triggers the first integrated circuit to control the first switching transistor to disconnect, thereby disconnecting the connection between the battery and the motherboard.
  • the battery can stop supplying power to all devices of the electronic device, rather than stopping supplying power to only some devices. Therefore, the number of battery-powered devices can be reduced, thereby reducing battery power consumption. This can reduce situations where the battery has a low charge for a long time when the electronic device is not used for a long time, and thus reduce phenomena such as battery bulging. In this way, the safety of using the electronic device can be improved.
  • the processor 110 is specifically used to control the first controller to control the second switch to turn on and off for the first time within a first duration, wherein the duration of each turn on of the second switch is greater than or equal to the second duration.
  • the processor 110 is specifically used to control the first switch to turn off via the first integrated circuit when the first signal detected on the first pin meets the first condition.
  • the voltage at the first pin when the second switch is off is different from the voltage when the second switch is on; the first condition includes: the number of pulses of the first signal within a first duration is the first number, and the pulse duration of each pulse is greater than or equal to the second duration.
  • the processor 110 is further configured to, upon detecting a first signal on a first pin, control the first switch of the electronic device to turn off via a first integrated circuit to disconnect the path between the battery and the motherboard; and upon receiving a user's pressing input on a third switch of the motherboard, adjust the voltage of the first pin via the third switch to generate a second signal on the first pin, the pressing input being used to control the third switch to turn on; and upon detecting a second signal on the first pin, control the first switch to turn on via the first integrated circuit to connect the path between the battery and the motherboard.
  • the input duration of the aforementioned press input is a third duration.
  • the processor 110 is used to control the first switch transistor to turn on via a first integrated circuit when the second signal detected on the first pin satisfies the second condition.
  • the voltage of the first pin when the third switch is off is different from the voltage when the third switch is on; the second condition includes: the voltage corresponding to the second signal changes once, and the voltage corresponding to the second signal does not change within the third time period.
  • the input unit 104 may include a graphics processing unit (GPU) 1041 and a microphone 1042.
  • the GPU 1041 processes image data of still images or videos obtained by an image capture device (such as a camera) in video capture mode or image capture mode.
  • the display unit 106 may include a display panel 1061, which may be configured in the form of a liquid crystal display, an organic light-emitting diode, or the like.
  • the user input unit 107 includes at least one of a touch panel 1071 and other input devices 1072.
  • the touch panel 1071 is also called a touch screen.
  • the touch panel 1071 may include a touch detection device and a touch controller.
  • Other input devices 1072 may include, but are not limited to, physical keyboards, function keys (such as volume control buttons, power buttons, etc.), trackballs, mice, and joysticks, which will not be described in detail here.
  • the memory 109 can be used to store software programs and various data.
  • the memory 109 may primarily include a first storage area for storing programs or instructions and a second storage area for storing data.
  • the first storage area may store the operating system, application programs or instructions required for at least one function (such as sound playback, image playback, etc.).
  • the memory 109 may include volatile memory or non-volatile memory, or both.
  • the non-volatile memory may be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory.
  • Volatile memory can be random access memory (RAM), static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDRSDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM), and direct rambus RAM (DRRAM).
  • RAM random access memory
  • SRAM static random access memory
  • DRAM dynamic random access memory
  • SDRAM synchronous dynamic random access memory
  • DDRSDRAM double data rate synchronous dynamic random access memory
  • ESDRAM enhanced synchronous dynamic random access memory
  • SLDRAM synchronous link dynamic random access memory
  • DRRAM direct rambus RAM
  • the memory 109 in the embodiments of this application includes, but is not limited to, these and any other suitable types of memory.
  • Processor 110 may include one or more processing units; optionally, processor 110 integrates an application processor and a modem processor, wherein the application processor mainly handles operations involving the operating system, user interface, and applications, and the modem processor mainly handles wireless communication signals, such as a baseband processor. It is understood that the aforementioned modem processor may also not be integrated into processor 110.
  • This application also provides a readable storage medium storing a program or instructions.
  • the program or instructions When the program or instructions are executed by a processor, they implement the various processes of the above-described control method embodiments and achieve the same technical effect. To avoid repetition, they will not be described again here.
  • the processor is the processor in the electronic device described in the above embodiments.
  • the readable storage medium includes computer-readable storage media, such as computer read-only memory (ROM), random access memory (RAM), magnetic disk, or optical disk.
  • This application embodiment also provides a chip, which includes a processor and a communication interface.
  • the communication interface is coupled to the processor.
  • the processor is used to run programs or instructions to implement the various processes of the above control method embodiments and can achieve the same technical effect. To avoid repetition, it will not be described again here.
  • chip mentioned in the embodiments of this application may also be referred to as a system-on-a-chip, system chip, chip system, or system-on-a-chip, etc.
  • This application provides a computer program product, which is stored in a storage medium and executed by at least one processor to implement the various processes of the control method embodiments described above, and can achieve the same technical effect. To avoid repetition, it will not be described again here.
  • the device embodiments described above are merely illustrative.
  • the units described as separate components may or may not be physically separate.
  • the components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without any creative effort.
  • an embodiment means that a particular feature, structure, or characteristic described in connection with an embodiment is included in at least one embodiment of this application. Furthermore, please note that the examples of the phrase “in one embodiment” do not necessarily all refer to the same embodiment.
  • any reference signs placed between parentheses should not be construed as limiting the claims.
  • the word “comprising” does not exclude the presence of elements or steps not listed in the claims.
  • the word “a” or “an” preceding an element does not exclude the presence of a plurality of such elements.
  • This application can be implemented by means of hardware comprising several different elements and by means of a suitably programmed computer. In a unit claim enumerating several means, several of these means may be embodied by the same item of hardware.
  • the use of the words first, second, and third, etc. does not indicate any order. These words can be interpreted as names.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Charge And Discharge Circuits For Batteries Or The Like (AREA)

Abstract

本申请公开了一种电子设备，属于电池技术领域。其中，电子设备包括：主板，该主板上设置有第一控制器；电池，该电池的第一极与主板的第一端连接，该电池包括第一开关管和第一集成电路，该第一开关管的第一端与电池的第二极连接，该第一开关管的第二端与主板的第二端连接，该第一集成电路包括第一引脚，该第一引脚与第一控制器的信号产生端连接，该第一集成电路的第一端与第一开关管的第三端连接。其中，上述第一控制器，用于在电池与主板供电之间的通路导通的情况下，调整第一引脚的电压，以在第一引脚上产生第一信号；上述第一集成电路，用于在第一引脚上检测到第一信号的情况下，控制第一开关管断开，以断开电池和主板之间的通路。

Description

电子设备
相关申请的交叉引用
本申请要求在2024年06月27日提交中国专利局、申请号为202410849560.8、名称为“电子设备”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请属于电池技术领域，具体涉及一种电子设备。
背景技术
通常，在电子设备中配置有船运模式(Ship Mode)，这样在不使用电子设备的情况下，可以控制电子设备进入船运模式，以使得电子设备的电池可以停止向电子设备的部分器件供电，从而可以减少电池的电量的消耗，以减少出现电池长时间电量较低的情况，进而可以减少电池出现鼓包等现象，提高电子设备的使用安全性。
但是，由于在船运模式下，电子设备的电池的电量仍会持续消耗，这样在长时间不使用电子设备的情况下，还是会出现电池长时间电量较低的情况，从而会出现电池鼓包等现象，因此，导致电子设备的使用安全性较低。
发明内容
本申请实施例的目的是提供一种电子设备，能够解决电子设备的使用安全性较低的问题。
第一方面，本申请实施例提供了一种电子设备，该电子设备包括：主板，该主板上设置有第一控制器；电池，该电池的第一极与主板的第一端连接，该电池包括第一开关管和第一集成电路，该第一开关管的第一端与电池的第二极连接，该第一开关管的第二端与主板的第二端连接，该第一集成电路包括第一引脚，该第一引脚与第一控制器的信号产生端连接，该第一集成电路的第一端与第一开关管的第三端连接。其中，上述第一控制器，用于在电池与主板供电之间的通路导通的情况下，调整第一引脚的电压，以在第一引脚上产生第一信号；上述第一集成电路，用于在第一引脚上检测到第一信号的情况下，控制第一开关管断开，以断开电池和主板之间的通路。
第二方面，本申请实施例提供了一种控制方法，应用于如第一方面所述的电子设备，该方法包括：在电子设备的电池与电子设备的主板之间的通路导通的情况下，控制主板的第一控制器调整电子设备的第一集成电路的第一引脚的电压，以在第一引脚上产生第一信号；在第一引脚上检测到第一信号的情况下，控制电子设备的第一开关管断开，以断开电池与主板之间的通路。
第三方面，本申请实施例提供了一种控制装置，该控制装置包括：控制模块，用于在控制装置的电池与控制装置的主板之间的通路导通的情况下，控制主板的第一控制器调整控制装置的第一集成电路的第一引脚的电压，以在第一引脚上产生第一信号；并在第一引脚上检测到第一信号的情况下，控制控制装置的第一开关管断开，以断开电池与主板之间的通路。
第四方面，本申请实施例提供了一种电子设备，该电子设备包括处理器和存储器，所述存储器存储可在所述处理器上运行的程序或指令，所述程序或指令被所述处理器执行时实现如第二方面所述的方法的步骤。
第五方面，本申请实施例提供了一种可读存储介质，所述可读存储介质上存储程序或指令，所述程序或指令被处理器执行时实现如第二方面所述的方法的步骤。
第六方面，本申请实施例提供了一种芯片，所述芯片包括处理器和通信接口，所述通信接口和所述处理器耦合，所述处理器用于运行程序或指令，实现如第二方面所述的方法的步骤。
第七方面，本申请实施例提供一种计算机程序产品，该程序产品被存储在存储介质中，该程序产品被至少一个处理器执行以实现如第二方面所述的方法的步骤。
在本申请实施例中，电子设备可以包括设置有第一控制器的主板和第一极与主板的第一端连接的电池，该电池包括第一开关管和第一集成电路，该第一开关管的第一端与电池的第二极连接，该第一开关管的第二端与主板的第二端连接，该第一集成电路包括第一引脚，该第一引脚与第一控制器的信号产生端连接，该第一集成电路的第一端与第一开关管的第三端连接；其中，该第一控制器，用于在电池与主板之间的通路导通的情况下，调整第一引脚的电压，以在第一引脚上产生第一信号；该第一集成电路，用于在第一引脚上检测到第一信号的情况下，控制第一开关管断开，以断开电池与主板之间的通路。由于电池中设置有第一开关管和第一集成电路，且主板上设置有第一控制器，这样第一控制器可以在电池与主板之间的通路导通的情况下，通过调整第一引脚的电压的方式，来在第一引脚上产生第一信号，以通过第一信号触发第一集成电路控制第一开关管断开，以断开电池与主板之间的通路，从而电池可以停止向电子设备的所有器件供电，而不是停止向电子设备的部分器件供电，因此，可以减少电池供电的器材的数量，以减少电池的电量消耗，这样可以减少出现在长时间不使用电子设备的情况下，电池长时间电量较低的情况，进而可以减少出现电池鼓包等现象，如此，可以提高电子设备的使用安全性。
附图说明
为了更清楚地说明本申请实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作一简单地介绍，显而易见地，下面描述中的附图是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是相关技术中的电子设备的电池和主板的电路结构示意图之一；
图2是本申请实施例提供的电子设备的电池和主板的电路结构示意图之一；
图3是本申请实施例提供的电子设备的电池和主板的电路结构示意图之二；
图4是本申请实施例提供的电子设备的电池和主板的电路结构示意图之三；
图5是本申请实施例提供的电子设备进入船运模式的示意图；
图6是本申请实施例提供的电子设备的电池和主板的电路结构示意图之四；
图7是本申请实施例提供的电子设备的电池和主板的电路结构示意图之五；
图8是本申请实施例提供的电子设备退出船运模式的示意图；
图9是本申请实施例提供的控制方法的流程示意图；
图10是本申请实施例提供的控制装置的结构示意图；
图11是本申请实施例提供的电子设备的硬件结构示意图之一；
图12是本申请实施例提供的电子设备的硬件结构示意图之二。
具体实施例
为使本申请实施例的目的、技术方案和优点更加清楚，下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
本申请的说明书和权利要求书中的术语“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。在本申请的描述中，除非另有说明，“多个”的含义是两个或两个以上。此外，说明书以及权利要求中“和/或”表示所连接对象的至少其中之一，字符“/”，一般表示前后关联对象是一种“或”的关系。
在本申请的描述中，需要理解的是，术语“中心”、“纵向”、“横向”、“长度”、“宽度”、“厚度”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”、“顶”、“底”“内”、“外”、“顺时针”、“逆时针”、“轴向”、“径向”、“周向”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本申请和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本申请的限制。
在本申请的描述中，需要说明的是，除非另有明确的规定和限定，术语“安装”、“相连”、“连接”应做广义理解，例如，可以是固定连接，也可以是可拆卸连接，或一体地连接；可以是机械连接，也可以是电连接；可以是直接相连，也可以通过中间媒介间接相连，可以是两个元件内部的连通。对于本领域的普通技术人员而言，可以具体情况理解上述术语在本申请中的具体含义。
本申请实施例提供的电子设备可以应用于电子设备进入运输模式的场景中，或应用于电子设备关机的场景中。
针对运输模式的场景
在相关技术中，电子设备的电池包01中设置有电池，该电池的正极与电池包01的p+端连接，该电池的负极与电池包01的p-端连接，该电池包01的p+端与主板02的电源管理集成电路(Power Management Integrated Circuit，PMIC)03的VBAT引脚连接，该VBAT引脚可以与PMIC 03中的开关管QBAT连接，该开关管QBAT还与PMIC 03的VPH_PWR引脚连接，该VPH_PWR引脚可以与电子设备的多个器件连接，该多个器件可以包括中央处理器CPU、内存、屏幕驱动、屏幕、扬声器驱动、扬声器、射频电源管理、射频模块以及其他负载模块，且该PMIC 03的VBAT引脚还可以与电子设备的VBAT负载连接，该电池包01的p-端与PMIC 03的GND引脚连接。这样在不使用电子设备的情况下，可以控制上述PMIC 03中的开关管QBAT断开，以控制电子设备进入船运模式(Ship Mode)，以使得电子设备的电池包01可以停止向电子设备的主板02的VPH_PWR引脚连接多个器件供电，从而可以减少电池包01中的电池的电量的消耗，以减少出现电池长时间电量较低的情况，进而可以减少电池出现鼓包等现象，提高电子设备的使用安全性。但是，由于在船运模式下，电池包01中的电池还是会向VBAT引脚连接的VBAT负载供电，这样电子设备的电池的电量仍会持续消耗，从而在长时间不使用电子设备的情况下，还是会出现电池长时间电量较低的情况，进而会出现电池鼓包等现象，因此，导致电子设备的使用安全性较低。
针对电子设备关机的场景
需要说明的是，针对电子设备关机的场景的说明，可以参考上文中的具体描述，本申请实施例在此不再赘述。
为了解决上述技术问题，本申请实施例提供了一种电子设备。图2示出了本申请实施例提供的一种电子设备的电路结构示意图。如图2所示，本申请实施例提供的电子设备可以包括：主板10，该主板10上设置有第一控制器11；电池12，该电池12的第一极与主板10的第一端连接，该电池12包括第一开关管13和第一集成电路14，该第一开关管13的第一端与电池12的第二极连接，该第一开关管13的第二端与主板10的第二端连接，该第一集成电路14包括第一引脚15，该第一引脚15与第一控制器11的信号产生端连接，该第一集成电路14的第一端与第一开关管13的第三端连接。
在本申请的一些实施例中，上述第一控制器11可以为应用处理器(Application Processor，AP)。当然，第一控制器11还可以为其他处理器，本申请实施例在此不作限定。
在本申请的一些实施例中，上述主板10上还可以设置有电源管理集成电路(Power Management Integrated Circuit，PMIC)，该PMIC可以与电子设备的至少一个器件连接，从而可以通过PMIC向至少一个器件供电。
其中，上述PMIC可以通过VPH_PWR引脚与至少一个器件连接。
在本申请的一些实施例中，上述电池12可以为以下任一项：锂电池、硅负极电池、钢壳电池。当然，上述电池12还可以为其他电池，本申请实施例在此不作限定。
在本申请的一些实施例中，上述电池12的第一极可以正极或负极。上述电池12的第二极可以为负极或正极。
在本申请的一些实施例中，上述电池12还可以包括保护集成电路，电池12的第一极可以通过保护集成电路与主板10的第一端连接，电池12的第二极可以通过第一开关管13和保护集成电路与主板10的第二端连接。
需要说明的是，针对保护集成电路的结构和作用，可以参考相关技术中的具体描述，本申请实施例在此不予赘述。
在本申请的一些实施例中，上述电池12的第一极可以与主板10的PMIC的VBAT引脚连接。上述电池12的第二极可以通过第一开关管13和保护集成电路的充电开关管与主板10的PMIC的GND引脚连接。可以理解，PMIC的VBAT引脚可以视作主板10的第一端。PMIC的GND引脚可以视作主板10的第二端。
在本申请的一些实施例中，第一开关管13包括金属氧化物半导体型场效应MOS管。当然，第一开关管13还可以为其他器件，本申请实施例在此不作限定。
在本申请的一些实施例中，上述第一集成电路14可以称为船运模式集成电路。上述第一引脚15具体可以为SWI引脚。上述第一集成电路14的第一端具体可以为PD引脚。
在本申请的一些实施例中，上述第一集成电路14可以由电池12供电，或可以由其他电源供电，本申请实施例在此不作限定。
在本申请的一些实施例中，在第一集成电路14由电池12供电的情况下，结合图2，如图3所示，上述第一集成电路14的第二端与电池12的第一极连接，该第一集成电路14的第三端与电池12的第二极连接。
可以理解，上述电池12还可以向第一集成电路14供电。
在本申请的一些实施例中，上述第一集成电路14的第二端具体可以为VDD端，第一集成电路14的第三端具体可以为VSS端。
如此可知，由于可以将第一集成电路的第二端和第三端，分别与电池的第一极和第二极连接，这样可以直接通过电池向第一集成电路供电，而无需在电子设备中额外设置其他电源向第一集成电路供电，因此，可以在减少电子设备的电路复杂度的情况下，可以减少成本。
本申请实施例中，上述第一控制器11，用于在电池12与主板10之间的通路导通的情况下，调整第一引脚15的电压，以在第一引脚15上产生第一信号；上述第一集成电路14，用于在第一引脚上检测到第一信号的情况下，控制第一开关管13断开，以断开电池12与主板10之间的通路。
在本申请的一些实施例中，上述第一信号具体可以为脉冲信号。
在本申请的一些实施例中，第一控制器11可以交替地控制第一引脚15接地和不接地，以调整第一引脚15的电压。
其中，在第一控制器11控制第一引脚15不接地的情况下，第一引脚15可以由电子设备的其他电源提供电压，以使得第一引脚15的电压为一个电压；在第一控制器11控制第一引脚15接地的情况下，第一控制器11可以对第一引脚15的电压进行下拉，以使得第一引脚15的电压为另一个电压。
下面将以上述其他电源为PMIC为例举例说明。
在本申请的一些实施例中，结合图2，如图4所示，上述第一控制器11包括：第二开关管16，该第二开关管16的第一端与第一控制器11的信号产生端连接，该第二开关管16的第二端接地；控制模块17，该控制模块17与第二开关管16的第三端连接；其中，该第一引脚15在第二开关管16断开的情况下的电压和在第二开关管16导通的情况下的电压不同。
在本申请的一些实施例中，上述第二开关管16具体可以为MOS管，该第二开关管16的控制端可以与第一控制器11连接，从而第一控制器11可以控制第二开关管16的通断。
在本申请的一些实施例中，上述控制模块17具体可以为以下任一项：中央处理器CPU、微控制单元MCU。
在本申请的一些实施例中，上述主板10上还包括：PMIC18，该PMIC18通过二极管19与第一引脚15连接；其中，该PMIC18与二极管19的正极连接，该第一引脚15与二极管19的负极连接；该PMIC18用于在电池12与主板10之间的通路导通的情况下，向第一引脚15提供电压。
在本申请的一些实施例中，结合图4，PMIC18可以通过二极管19与第一引脚15和第一控制器11的信号产生端连接。其中，PMIC18可以与二极管19的正极连接，第一引脚15和第一控制器11的信号产生端可以与二极管19的负极连接。可以理解，由于PMIC18可以通过二极管19与第一引脚15和第一控制器11的信号产生端连接，这样在使用过程中，可以避免第一引脚15和/或第一控制器11的信号产生端的电压对PMIC18的影响。
在本申请的一些实施例中，第一引脚15在第二开关管16断开的情况下的电压具体可以为1.8伏特(v)。第一引脚15在第二开关管16导通的情况下的电压具体可以为0v。
在本申请的一些实施例中，在第二开关管16断开的情况下，第一引脚15和PMIC18连接，以通过PMIC18上拉第一引脚15的电压。在第二开关管16导通的情况下，可以视作第一引脚15接地，因此，第一引脚15的电压会被下拉至0v。
本申请实施例中，上述控制模块17，具体用于在第一时长内控制第二开关管16通断第一次数，且每次导通第二开关管16的持续时长大于或等于第二时长；以在第一引脚15上产生满足第一条件的第一信号；上述第一集成电路14，具体用于在第一引脚15上检测到满足第一条件的第一信号的情况下，控制第一开关管13断开；上述第一条件包括：第一信号在第一时长内的脉冲的数量值与第一次数的数量值相同、且每个脉冲的脉冲时长大于或等于第二时长。
在本申请的一些实施例中，上述第一次数可以为5。当然，第一次数还可以为其他次数，本申请实施例在此不作限定。
在本申请的一些实施例中，在电池12与主板10之间的通路导通的情况下，控制模块17可以先控制第二开关管16断开，这样控制模块17在确定要接入船运模式的情况下，可以在第一时长内，先控制第二开关管16导通第二时长，此时第一引脚15接地，因此第一引脚15的电压会被下拉至0v，然后控制模块17可以控制第二开关管16断开第四时长，以使得PMIC18可以向第一引脚15提供电压，因此第一引脚15的电压会被上拉，再然后控制模块17可以再次控制第二开关管16导通第二时长，以此类推，直至导通第二开关管16的次数为第一次数为止。
本申请实施例中，由于可能会出现控制模块17或PMIC18因受到干扰，而导致第一引脚15的电压发生改变的情况，这样可能会导致第一集成电路14直接控制第一开关管13断开，因此，为了避免上述情况，控制模块17会按照特殊的控制方法来控制第二开关管16通断，以生成特定序列的脉冲信号(即第一信号)，且第一集成电路14会在第一信号满足第一条件的情况下，才控制第一开关管13断开。
如此可知，由于在需要断开电池与主板之间的通路时，控制模块可以在第一时长内控制第二开关管通断第一次数，且每次导通第二开关的持续时间大于或等于第二时长，以在第一引脚上产生满足第一条件的第一信号，这样第一集成电路可以根据满足第一条件的第一信号来断开电池与主板之间的通路，而不是根据任意的信号来断开电池与主板之间的通路，因此，可以避免因受到干扰，而导致电池停止向主板供电的情况。
在本申请的一些实施例中，第一集成电路14可以在接收到第一信号、且确定第一信号满足第一条件的情况下，延时第五时长，向第一开关管13的第三端输出低电平，以使得第一开关管13断开，从而断开电池12与主板10之间的通路，进而电子设备可以进入船运模式。
下面将以具体的示例，举例说明电子设备进入船运模式的流程。
如图5所示，电子设备处于正常状态，此时第二开关管16断开，PMIC18向第一引脚15提供电压(例如1.8v的电压)，第一引脚15的电压维持在1.8v。在需要控制电子设备进入船运模式时，可以在电子设备中进行操作，以使得第一控制器11可以在第一时长(例如T2)内控制第二开关管16通断第一次数(例如5)，且每次导通第二开关管16的持续时长大于或等于第二时长(例如T1)，每次导通第一引脚15的电压从1.8v变为0v，以在第一引脚15上产生第一信号(即SWI信号)。从而第一集成电路14可以在第一引脚15上检测到的第一信号中的低电平脉冲的数量为5个，且每个脉冲时间大于或等于第二时长T1，5个脉冲总的时间小于第一时长T2的情况下，延时第五时长(例如T3)，向第一开关管13的第三端输出低电平，以使得第一开关管13断开，从而断开电池12与主板10之间的通路，进而电子设备可以进入船运模式。
本申请实施例中，若第一集成电路14接收到第一信号，则可以认为可能需求进入船运模式，因此，第一集成电路14可以直接控制第一开关管13断开，以断开电池12与主板10之间的通路。
在相关技术中，在需要断开电池12与主板10之间的通路时，仅会断开PMIC中的开关管QBAT，以使得PMIC18的VPH_PWR引脚连接的器件下电，然而PMIC18的VBAT引脚连接的器件却仍处于工作状态，即电池12仍然会向PMIC18的VBAT引脚连接的器件供电，因此，会导致电池12的电量持续消耗。然而，在本申请实施例中，在需要断开电池12与主板10之间的通路时，可以断开第一开关管13，这样电池12与主板10之间的通路断开，此时PMIC18的VPH_PWR引脚和PMIC18的VBAT引脚连接的器件均会下电，因此，可以减少电池的电量的消耗。
本申请实施例提供一种电子设备，该电子设备可以包括设置有第一控制器的主板和第一极与主板的第一端连接的电池，该电池包括第一开关管和第一集成电路，该第一开关管的第一端与电池的第二极连接，该第一开关管的第二端与主板的第二端连接，该第一集成电路包括第一引脚，该第一引脚与第一控制器的信号产生端连接，该第一集成电路的第一端与第一开关管的第三端连接；其中，该第一控制器，用于在电池与主板之间的通路导通的情况下，调整第一引脚的电压，以在第一引脚上产生第一信号；该第一集成电路，用于在第一引脚上检测到第一信号的情况下，控制第一开关管断开，以断开电池与主板之间的通路。由于电池中设置有第一开关管和第一集成电路，且主板上设置有第一控制器，这样第一控制器可以在电池与主板之间的通路导通的情况下，通过调整第一引脚的电压的方式，来在第一引脚上产生第一信号，以通过第一信号触发第一集成电路控制第一开关管断开，以断开电池与主板之间的通路，从而电池可以停止向电子设备的所有器件供电，而不是停止向电子设备的部分器件供电，因此，可以减少电池供电的器材的数量，以减少电池的电量消耗，这样可以减少出现在长时间不使用电子设备的情况下，电池长时间电量较低的情况，进而可以减少出现电池鼓包等现象，如此，可以提高电子设备的使用安全性。
当然，为了使得用户能够正常使用电子设备，在电池12与主板10之间的通路断开之后，第一集成电路14还可以根据在第一引脚15上检测的信号，导通电池12与主板10之间的通路。
在本申请的一些实施例中，结合图2，如图6所示，上述主板10上还设置有第三开关管20，该第三开关管20的第一端与第一引脚15的第一端连接，该第三开关管20的第二端接地。上述第一集成电路14的第三端通过第一电阻21和第三开关管20的第二端连接；其中，上述第一引脚15在第三开关管20断开的情况下的电压和在第三开关管20导通的情况下的电压不同；该第三开关管20用于在被按压时导通，以在第一引脚15上产生第二信号；上述第一集成电路14，还用于在第一引脚15上检测到第二信号的情况下，控制第一开关管13导通，以导通电池12与主板10之间的通路。
在本申请的一些实施例中，上述第一电阻21的阻值大于或等于预设阻值。
在本申请的一些实施例中，上述预设阻值可以为1000欧(Ω)。当然，预设阻值还可以为其他阈值，本申请实施例对此不作限定。
可以理解，由于可以将第一电阻的阻值设置为大于或等于预设阻值的值，即可以将第一电阻的阻值设置为较大的阻值，因此，可以减少在电池与主板之间的通路断开的情况下，在电池和主板之间存在的漏电流。
如此可知，由于在需要导通电池与主板之间的通路时，可以通过控制第三开关管通断的方式，在第一引脚上产生第二信号，这样第一集成电路可以根据该第二信号来导通电池与主板之间的通路，因此，可以避免出现电池无法向主板供电的情况。
在本申请的一些实施例中，结合图6，上述第一集成电路14中还包括：电源装置22，该电源装置22与第一引脚15连接；其中，上述电源装置22用于在电池12与主板10之间的通路断开的情况下，向第一引脚15提供电压。
如此可知，由于在第一集成电路中还可以设置电源装置，这样在电池与主板之间的通路断开的情况下，电源装置可以向第一引脚提供电压，以使得可以通过控制第三开关管通断的方式，在第一引脚上产生第二信号，这样第一集成电路可以根据该第二信号来导通电池与主板之间的通路，因此，可以避免出现电池无法向主板供电的情况。
在本申请的一些实施例中，结合图6，如图7所示，上述电源装置22包括：电源单元23，该电源单元23用于向第一引脚15提供电压；第四开关管24，该第四开关管24的第一端与电源单元23连接，该第四开关管24的第二端通过第二电阻25与第一引脚15连接；其中，在电池12与主板10之间的通路断开的情况下，第四开关管24导通；在电池12与主板10之间的通路导通的情况下，第四开关管24断开。
在本申请的一些实施例中，上述第四开关管24具体可以为MOS管。
在本申请的一些实施例中，由于可能会出现电源单元23提供的电压较大的情况，因此，可以设置第二电阻25，以通过第二电阻25对电源单元23提供的电压进行分压，以降低电源单元23向第一引脚15提供的电压。
如此可知，由于电源装置中可以设置有电源单元和第四开关管，这样可以在电池与主板之间的通路断开的情况下，通过控制第四开关管导通的方式，来使得电源装置为第一引脚提供电压，从而可以通过按压第三开关管的方式来调整第一引脚的电压，以准确地产生第二信号，并通过第二信号准确地触发第一集成电路导通电池与主板之间的通路。或者，可以在电池与主板之间的通路导通的情况下，控制第四开关管断开，从而可以避免第一引脚对其连接的组件造成影响。
在本申请的一些实施例中，上述第三开关管20具体可以为按压式开关管，该按压式开关管可以在被按压时导通，并在按压结束时断开。
在本申请的一些实施例中，上述第三开关管20可以与电子设备的物理按键(例如电源键)连接，从而在用户对电源键按压时，可以视作对第三开关管20进行按压。
本申请实施例中，上述第三开关管20用于在被按压时导通，以调整第一引脚15的电压，以在第一引脚15上产生第二信号。
在本申请的一些实施例中，在第三开关管20未被按压时，第三开关管20断开，第一引脚15的电压可以为电源装置22向第一引脚15提供的电压。在第三开关管20被按压时，第三开关管20导通，此时由电源装置22、第一引脚15、第三开关管20、第一电阻21、第一集成电路14的第三端(例如VSS端)、电池12的第二极可以形成电流回路，由于该电流回路上的电阻值增大(即多了第一电阻21)，第一引脚15的电压会降低。可以理解，在第三开关管20导通时，第一引脚15的电压会降低，因此，可以理解第三开关管20在被挤压时是可以调整第一引脚15的电压的。
在本申请的一些实施例中，上述第一引脚15在第三开关管20断开的情况下的电压和在第三开关管20导通的情况下的电压不同；在第三开关管20在第三时长内被按压的情况下，第一引脚15上产生满足第二条件的第二信号；上述第一集成电路14，具体用于在第一引脚15上检测到满足第二条件的第二信号的情况下，控制第一开关管13导通；上述第二条件包括：第二信号对应的电压发生一次变化，且在第三时长内第二信号对应的电压未发生变化。
如此可知，由于在需要导通电池与主板之间的通路时，可以通过控制第三开关管在第三时长内导通的方式，在第一引脚上产生满足第二条件的第二信号，这样第一集成电路可以根据满足第二条件的第二信号来导通电池与主板之间的通路，而不是根据任意的信号来导通电池与主板之间的通路，因此，可以避免因受到干扰，而导致电池继续向主板供电的情况。
下面将以具体的示例，举例说明电子设备退出船运模式的流程。
如图8所示，电子设备进入船运模式，此时第四开关管24导通，电源单元23通过第二电阻25向第一引脚15提供电压(例如Vpu)。若用户想要电子设备退出船运模式，则用户可以对电子设备的电源键进行按压输入，以对第三开关管20进行按压输入，以使得第三开关管20可以导通，此时电源装置22、第一引脚15、第三开关管20、第一电阻21、第一集成电路14的第三端(例如VSS端)、电池12的第二极可以形成电流回路，由于该电流回路上的电阻值增大(即多了第一电阻21)，第一引脚15的电压会降低为Vpu*(R1/(Rp+R1))，其中，R1为第一电阻21的电阻，Rp为第二电阻25的电阻，以形成第二信号(即SWI信号)。从而在用户对电源键按压的时长达到第三时长(例如T4)的情况下，第二信号可以满足第二条件，即第二信号对应的电压值由Vpu变化为Vpu*(R1/(Rp+R1))，且在第三时长内维持在Vpu*(R1/(Rp+R1))，进而第一集成电路14可以导通电池12与主板10之间的通路，此时第四开关管24断开，主板10上的PMIC18可以向第一引脚15提供电压(例如Vpu)，从而第一引脚15的电压维持在Vpu。
本申请实施例中，若第一集成电路14接收到第二信号，则可以认为可能需求退出船运模式，因此，第一集成电路14可以直接控制第一开关管13导通，以导通电池12与主板10之间的通路。
如此可知，由于主板上可以设置有第三开关管，且第一集成电路中设置有电源装置，因此，可以在电池与主板之间的通路断开的情况下，通过电源装置为第一引脚提供电压，并通过按压第三开关管的方式来调整第一引脚的电压，以准确地产生第二信号，并通过第二信号准确地触发第一集成电路导通电池与主板之间的通路。
图9示出了本申请实施例提供的一种控制方法的流程示意图，应用于上述实施例中的电子设备。如图9所示，本申请实施例提供的控制方法可以包括下述的步骤101和步骤102。
步骤101、在电子设备的电池与电子设备的主板之间的通路导通的情况下，电子设备控制主板的第一控制器调整电子设备的第一集成电路的第一引脚的电压，以在第一引脚上产生第一信号。
在本申请的一些实施例中，在电子设备完成制造的情况下，可以先在电子设备中进行预定的配置，从而在完成配置后，电子设备可以确定是否进入船运模式，并在确定要进入船运模式的情况下，电子设备可以控制第一控制器调整第一集成电路的第一引脚的电压。
其中，电子设备可以根据是否接收到用户在电子设备上进行预设操作，来确定是否要进入船运模式。在电子设备接收到该预设操作，则电子设备可以确定要进入船运模式，在电子设备未接收到该预设操作，则电子设备可以确定不进入船运模式。
需要说明的是，针对第一控制器调整第一集成电路的第一引脚的电压的说明，可以参考上述实施例中的具体描述，本申请实施例在此不再赘述。
步骤102、电子设备在第一引脚上检测到第一信号的情况下，通过第一集成电路控制电子设备的第一开关管断开，以断开电池与主板之间的通路。
在本申请的一些实施例中，电子设备在第一引脚上检测到第一信号的情况下，可以直接通过第一集成电路控制电子设备的第一开关管断开，以断开电池与主板之间的通路。或者，电子设备在第一引脚上检测到第一信号的情况下，可以先确定第一信号是否满足条件(例如下述实施例中的第一条件)，并在第一信号满足条件的情况下，才通过第一集成电路控制电子设备的第一开关管断开，以断开电池与主板之间的通路。
在本申请的一些实施例中，上述步骤101具体可以通过下述的步骤101a实现，且上述步骤102具体可以通过下述的步骤102a实现。
步骤101a、在电子设备的电池与电子设备的主板之间的通路导通的情况下，电子设备控制控制模块在第一时长内控制第二开关管通断第一次数。
本申请实施例中，每次导通第二开关管的持续时长大于或等于第二时长。
步骤102a、电子设备在第一引脚上检测到满足第一条件的第一信号的情况下，通过第一集成电路控制第一开关管断开。
本申请实施例中，上述第一引脚在第二开关管断开的情况下的电压和在第二开关管导通的情况下的电压不同。上述第一条件包括：第一信号在第一时长内的脉冲的数量值与第一次数的数量值相同、且每个脉冲的脉冲时长大于或等于第二时长。
本申请实施例中，若第一信号满足第一条件，则可以认为可能需求进入船运模式，即可能需要断开电池与主板之间的通路，因此，电子设备可以直接通过第一集成电路控制第一开关管断开，以断开电池与主板之间的通路，从而使得电子设备进入船运模式。
如此可知，由于在需要断开电池与主板供电时，控制模块可以在第一时长内控制第二开关管通断第一次数，且每次导通第二开关的持续时间大于或等于第二时长，以在第一引脚上产生满足第一条件的第一信号，这样第一集成电路可以根据满足第一条件的第一信号来断开电池与主板之间的通路，而不是根据任意的信号来断开电池与主板之间的通路，因此，可以避免因受到干扰，而导致电池停止向主板供电的情况。
本申请实施例提供一种控制方法，电子设备可以在电子设备的电池与电子设备的主板之间的通路导通的情况下，控制主板的第一控制器调整电子设备的第一集成电路的第一引脚的电压，以在第一引脚上产生第一信号；并在第一引脚上产生第一信号的情况下，通过第一集成电路控制电子设备的第一开关管断开，以断开电池与主板之间的通路。由于在电池与主板之间的通路导通的情况下，电子设备可以通过控制第一控制器调整第一引脚的电压的方式，来在第一引脚上产生第一信号，以通过第一信号触发第一集成电路控制第一开关管断开，以断开电池与主板之间的通路，从而电池可以停止向电子设备的所有器件供电，而不是停止向电子设备的部分器件供电，因此，可以减少电池供电的器材的数量，以减少电池的电量消耗，这样可以减少出现在长时间不使用电子设备的情况下，电池长时间电量较低的情况，进而可以减少出现电池鼓包等现象，如此，可以提高电子设备的使用安全性。
在本申请的一些实施例中，在上述步骤102之后，本申请实施例提供的控制方法还可以包括下述的步骤201和步骤202。
步骤201、在接收到用户对主板的第三开关管的按压输入的情况下，电子设备通过第三开关管调整第一引脚的电压，以在第一引脚上产生第二信号。
本申请实施例中，上述按压输入用于控制第三开关管导通。
步骤202、电子设备在第一引脚上检测到第二信号的情况下，通过第一集成电路控制第一开关管导通，以导通电池与主板之间的通路。
在本申请的一些实施例中，电子设备在第一引脚上检测到第二信号的情况下，可以直接通过第一集成电路控制第一开关管导通，以导通电池与主板之间的通路。或者，电子设备在第一引脚上检测到第二信号的情况下，可以先确定第二信号是否满足条件(例如下述实施例中的第二条件)，并在第二信号满足该条件的情况下，通过第一集成电路控制第一开关管导通，以导通电池与主板之间的通路。
如此可知，电子设备可以在电池与主板之间的通路断开的情况下，通过电源装置为第一引脚提供电压，并通过按压第三开关管的方式来调整第一引脚的电压，以在第一引脚上准确地产生第二信号，并通过第二信号准确地触发第一集成电路导通电池与主板之间的通路。
在本申请的一些实施例中，上述按压输入的输入时长为第三时长。可选地，上述步骤202具体可以通过下述的步骤202a实现。
步骤202a、电子设备在第一引脚上检测到满足第二条件的第二信号的情况下，通过第一集成电路控制第一开关管导通。
本申请实施例中，上述第一引脚在第三开关管断开的情况下的电压和在第三开关管导通的情况下的电压不同；上述第二条件包括：第二信号对应的电压发生一次变化，且在第三时长内第二信号对应的电压未发生变化。
本申请实施例中，若第二信号满足第二条件，则可以认为可能需求退出船运模式，即可能需要导通电池与主板之间的通路供电，因此，电子设备可以直接第一集成电路控制第一开关管导通，以导通电池与主板之间的通路，从而使得电子设备退出船运模式。
如此可知，由于在需要导通电池与主板之间的通路时，可以通过控制第三开关管在第三时长内导通的方式，生成满足第二条件的第二信号，这样第一集成电路可以根据满足第二条件的第二信号来导通电池与主板之间的通路，而不是根据任意的信号来导通电池与主板之间的通路，因此，可以避免因受到干扰，而导致电池继续向主板供电的情况。
本申请实施例提供的控制方法，执行主体可以为控制装置。本申请实施例中以控制装置执行控制方法为例，说明本申请实施例提供的控制装置的。
图10示出了本申请实施例提供的控制装置的结构示意图。如图10所示，本申请实施例提供的控制装置50可以包括：控制模块51，用于在控制装置50的电池与控制装置50的主板之间的通路导通的情况下，控制主板的第一控制器调整控制装置50的第一集成电路的第一引脚的电压，以在第一引脚上产生第一信号；并在第一引脚上检测到第一信号的情况下，通过第一集成电路控制控制装置50的第一开关管断开，以断开电池与主板之间的通路。
本申请实施例提供了一种控制装置，由于在电池与主板之间的通路导通的情况下，控制装置可以通过控制第一控制器调整第一引脚的电压的方式，来在第一引脚上产生第一信号，以通过第一信号触发第一集成电路控制第一开关管断开，以断开电池与主板之间的通路，从而电池可以停止向控制装置的所有器件供电，而不是停止向控制装置的部分器件供电，因此，可以减少电池供电的器材的数量，以减少电池的电量消耗，这样可以减少出现在长时间不使用控制装置的情况下，电池长时间电量较低的情况，进而可以减少出现电池鼓包等现象，如此，可以提高控制装置的使用安全性。
在一种可能的实现方式中，上述控制模块51，具体用于控制第一控制器在第一时长内控制第二开关管通断第一次数，每次导通第二开关管的持续时长大于或等于第二时长；上述控制模块51，具体用于在第一引脚上检测到的第一信号满足第一条件的情况下，通过第一集成电路控制第一开关管断开。其中，上述第一引脚在第二开关管断开的情况下的电压和在第二开关管导通的情况下的电压不同；上述第一条件包括：第一信号在第一时长内的脉冲的个数为第一次数、且每个脉冲的脉冲时长大于或等于第二时长。
在一种可能的实现方式中，上述控制模块51，还用于在第一引脚上检测到第一信号的情况下，通过第一集成电路控制控制装置50的第一开关管断开，以断开电池与主板之间的通路之后，在接收到用户对主板的第三开关管的按压输入的情况下，通过第三开关管调整第一引脚的电压，以在第一引脚上产生第二信号，该按压输入用于控制第三开关管导通；并在第一引脚上检测到第二信号的情况下，通过第一集成电路控制第一开关管导通，以导通电池与主板之间的通路。
在一种可能的实现方式中，上述按压输入的输入时长为第三时长。上述控制模块51，具体用于在第一引脚上检测到的第二信号满足第二条件的情况下，通过第一集成电路控制第一开关管导通。其中，上述第一引脚在第三开关管断开的情况下的电压和在第三开关管导通的情况下的电压不同；上述第二条件包括：第二信号对应的电压发生一次变化，且在第三时长内第二信号对应的电压未发生变化。
本申请实施例中的控制装置可以是电子设备，也可以是电子设备中的部件，例如集成电路或芯片。该电子设备可以是终端，也可以为除终端之外的其他设备。示例性地，电子设备可以为手机、平板电脑、笔记本电脑、掌上电脑、车载电子设备、移动上网装置(mobile internet device，MID)、增强现实(augmented reality，AR)/虚拟现实(virtual reality，VR)设备、机器人、可穿戴设备、超级移动个人计算机(ultra-mobile personal computer，UMPC)、上网本或者个人数字助理(personal digital assistant，PDA)等，还可以为服务器、网络附属存储器(network attached storage，NAS)、个人计算机(personal computer，PC)、电视机(television，TV)、柜员机或者自助机等，本申请实施例不作具体限定。
本申请实施例中的控制装置可以为具有操作系统的装置。该操作系统可以为安卓(Android)操作系统，可以为iOS操作系统，还可以为其他可能的操作系统，本申请实施例不作具体限定。
本申请实施例提供的控制装置能够实现图9的方法实施例实现的各个过程，为避免重复，这里不再赘述。
在本申请的一些实施例中，如图11所示，本申请实施例还提供一种电子设备60，包括处理器61和存储器62，存储器62上存储有可在所述处理器61上运行的程序或指令，该程序或指令被处理器61执行时实现上述控制方法实施例的各个过程步骤，且能达到相同的技术效果，为避免重复，这里不再赘述。
需要说明的是，本申请实施例中的电子设备包括上述的移动电子设备和非移动电子设备。
图12为实现本申请实施例的一种电子设备的硬件结构示意图。
该电子设备100包括但不限于：射频单元101、网络模块102、音频输出单元103、输入单元104、传感器105、显示单元106、用户输入单元107、接口单元108、存储器109、以及处理器110等部件。
本领域技术人员可以理解，电子设备100还可以包括给各个部件供电的电源(比如电池)，电源可以通过电源管理系统与处理器110逻辑相连，从而通过电源管理系统实现管理充电、放电、以及功耗管理等功能。图12中示出的电子设备结构并不构成对电子设备的限定，电子设备可以包括比图示更多或更少的部件，或者组合某些部件，或者不同的部件布置，在此不再赘述。
其中，处理器110，用于在电子设备的电池与电子设备的主板之间的通路导通的情况下，控制主板的第一控制器调整电子设备的第一集成电路的第一引脚的电压，以在第一引脚上产生第一信号；并在第一引脚上检测到第一信号的情况下，通过第一集成电路控制电子设备的第一开关管断开，以断开电池与主板之间的通路。
本申请实施例提供一种电子设备，由于在电池与主板之间的通路导通的情况下，电子设备可以通过控制第一控制器调整第一引脚的电压的方式，来在第一引脚上产生第一信号，以通过第一信号触发第一集成电路控制第一开关管断开，以断开电池与主板之间的通路，从而电池可以停止向电子设备的所有器件供电，而不是停止向电子设备的部分器件供电，因此，可以减少电池供电的器材的数量，以减少电池的电量消耗，这样可以减少出现在长时间不使用电子设备的情况下，电池长时间电量较低的情况，进而可以减少出现电池鼓包等现象，如此，可以提高电子设备的使用安全性。
在本申请的一些实施例中，上述处理器110，具体用于控制第一控制器在第一时长内控制第二开关管通断第一次数，每次导通第二开关管的持续时长大于或等于第二时长。
上述处理器110，具体用于在第一引脚上检测到的第一信号满足第一条件的情况下，通过第一集成电路控制第一开关管断开。
其中，上述第一引脚在第二开关管断开的情况下的电压和在第二开关管导通的情况下的电压不同；上述第一条件包括：第一信号在第一时长内的脉冲的个数为第一次数、且每个脉冲的脉冲时长大于或等于第二时长。
在本申请的一些实施例中，上述处理器110，还用于在第一引脚上检测到第一信号的情况下，通过第一集成电路控制电子设备的第一开关管断开，以断开电池与主板之间的通路之后，在接收到用户对主板的第三开关管的按压输入的情况下，通过第三开关管调整第一引脚的电压，以在第一引脚上产生第二信号，该按压输入用于控制第三开关管导通；并在第一引脚上检测到第二信号的情况下，通过第一集成电路控制第一开关管导通，以导通电池与主板之间的通路。
在本申请的一些实施例中，上述按压输入的输入时长为第三时长。上述处理器110，具体用于在第一引脚上检测到的第二信号满足第二条件的情况下，通过第一集成电路控制第一开关管导通。
其中，上述第一引脚在第三开关管断开的情况下的电压和在第三开关管导通的情况下的电压不同；上述第二条件包括：第二信号对应的电压发生一次变化，且在第三时长内第二信号对应的电压未发生变化。
应理解的是，本申请实施例中，输入单元104可以包括图形处理器(graphics processing unit，GPU)1041和麦克风1042，图形处理器1041对在视频捕获模式或图像捕获模式中由图像捕获装置(如摄像头)获得的静态图片或视频的图像数据进行处理。显示单元106可包括显示面板1061，可以采用液晶显示器、有机发光二极管等形式来配置显示面板1061。用户输入单元107包括触控面板1071以及其他输入设备1072中的至少一种。触控面板1071，也称为触摸屏。触控面板1071可包括触摸检测装置和触摸控制器两个部分。其他输入设备1072可以包括但不限于物理键盘、功能键(比如音量控制按键、开关按键等)、轨迹球、鼠标、操作杆，在此不再赘述。
存储器109可用于存储软件程序以及各种数据。存储器109可主要包括存储程序或指令的第一存储区和存储数据的第二存储区，其中，第一存储区可存储操作系统、至少一个功能所需的应用程序或指令(比如声音播放功能、图像播放功能等)等。此外，存储器109可以包括易失性存储器或非易失性存储器，或者，存储器109可以包括易失性和非易失性存储器两者。其中，非易失性存储器可以是只读存储器(read-only memory，ROM)、可编程只读存储器(programmable ROM，PROM)、可擦除可编程只读存储器(erasable PROM，EPROM)、电可擦除可编程只读存储器(electrically EPROM，EEPROM)或闪存。易失性存储器可以是随机存取存储器(random access memory，RAM)，静态随机存取存储器(static RAM，SRAM)、动态随机存取存储器(dynamic RAM，DRAM)、同步动态随机存取存储器(synchronous DRAM，SDRAM)、双倍数据速率同步动态随机存取存储器(doubledata rate SDRAM，DDRSDRAM)、增强型同步动态随机存取存储器(enhanced SDRAM，ESDRAM)、同步连接动态随机存取存储器(synch link DRAM，SLDRAM)和直接内存总线随机存取存储器(direct rambus RAM，DRRAM)。本申请实施例中的存储器109包括但不限于这些和任意其它适合类型的存储器。
处理器110可包括一个或多个处理单元；可选地，处理器110集成应用处理器和调制解调处理器，其中，应用处理器主要处理涉及操作系统、用户界面和应用程序等的操作，调制解调处理器主要处理无线通信信号，如基带处理器。可以理解的是，上述调制解调处理器也可以不集成到处理器110中。
本申请实施例还提供一种可读存储介质，所述可读存储介质上存储有程序或指令，该程序或指令被处理器执行时实现上述控制方法实施例的各个过程，且能达到相同的技术效果，为避免重复，这里不再赘述。
其中，所述处理器为上述实施例中所述的电子设备中的处理器。所述可读存储介质，包括计算机可读存储介质，如计算机只读存储器ROM、随机存取存储器RAM、磁碟或者光盘等。
本申请实施例另提供了一种芯片，所述芯片包括处理器和通信接口，所述通信接口和所述处理器耦合，所述处理器用于运行程序或指令，实现上述控制方法实施例的各个过程，且能达到相同的技术效果，为避免重复，这里不再赘述。
应理解，本申请实施例提到的芯片还可以称为系统级芯片、系统芯片、芯片系统或片上系统芯片等。
本申请实施例提供一种计算机程序产品，该程序产品被存储在存储介质中，该程序产品被至少一个处理器执行以实现如上述控制方法实施例的各个过程，且能达到相同的技术效果，为避免重复，这里不再赘述。
以上所描述的装置实施例仅仅是示意性的，其中所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部模块来实现本实施例方案的目的。本领域普通技术人员在不付出创造性的劳动的情况下，即可以理解并实施。
本文中所称的“一个实施例”、“实施例”或者“一个或者多个实施例”意味着，结合实施例描述的特定特征、结构或者特性包括在本申请的至少一个实施例中。此外，请注意，这里“在一个实施例中”的词语例子不一定全指同一个实施例。
在此处所提供的说明书中，说明了大量具体细节。然而，能够理解，本申请的实施例可以在没有这些具体细节的情况下被实践。在一些实例中，并未详细示出公知的方法、结构和技术，以便不模糊对本说明书的理解。
在权利要求中，不应将位于括号之间的任何参考符号构造成对权利要求的限制。单词“包含”不排除存在未列在权利要求中的元件或步骤。位于元件之前的单词“一”或“一个”不排除存在多个这样的元件。本申请可以借助于包括有若干不同元件的硬件以及借助于适当编程的计算机来实现。在列举了若干装置的单元权利要求中，这些装置中的若干个可以是通过同一个硬件项来具体体现。单词第一、第二、以及第三等的使用不表示任何顺序。可将这些单词解释为名称。
最后应说明的是：以上实施例仅用以说明本申请的技术方案，而非对其限制；尽管参照前述实施例对本申请进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本申请各实施例技术方案的精神和范围。

Claims (16)

  1. 一种电子设备，包括：
    主板，所述主板上设置有第一控制器；
    电池，所述电池的第一极与所述主板的第一端连接，所述电池包括第一开关管和第一集成电路，所述第一开关管的第一端与所述电池的第二极连接，所述第一开关管的第二端与所述主板的第二端连接，所述第一集成电路包括第一引脚，所述第一引脚与所述第一控制器的信号产生端连接，所述第一集成电路的第一端与所述第一开关管的第三端连接；
    其中，所述第一控制器，用于在所述电池与所述主板之间的通路导通的情况下，调整所述第一引脚的电压，以在所述第一引脚上产生第一信号；
    所述第一集成电路，用于在所述第一引脚上检测到所述第一信号的情况下，控制所述第一开关管断开，以断开所述电池与所述主板之间的通路。
  2. 根据权利要求1所述的电子设备，其中，所述第一集成电路的第二端与所述电池的第一极连接，所述第一集成电路的第三端与所述电池的第二极连接。
  3. 根据权利要求1所述的电子设备，其中，所述第一控制器包括：
    第二开关管，所述第二开关管的第一端通过所述第一控制器的信号产生端与所述第一引脚连接，所述第二开关管的第二端接地；
    控制模块，所述控制模块与所述第二开关管的第三端连接；
    其中，所述第一引脚在所述第二开关管断开的情况下的电压和在所述第二开关管导通的情况下的电压不同；
    所述控制模块，用于在第一时长内控制所述第二开关管通断第一次数，且每次导通所述第二开关管的持续时长大于或等于第二时长，以在所述第一引脚上产生满足第一条件的所述第一信号；
    所述第一集成电路，具体用于在所述第一引脚上检测到满足所述第一条件的所述第一信号的情况下，控制所述第一开关管断开；
    所述第一条件包括：所述第一信号在所述第一时长内的脉冲的数量值与所述第一次数的数量值相同、且每个脉冲的脉冲时长大于或等于所述第二时长。
  4. 根据权利要求3所述的电子设备，其中，所述主板上还包括：
    电源管理集成电路PMIC，所述PMIC通过二极管与所述第一引脚连接；
    其中，所述PMIC与所述二极管的正极连接，所述第一引脚与所述二极管的负极连接；
    所述PMIC用于在所述电池与所述主板之间的通路导通的情况下，向所述第一引脚提供电压。
  5. 根据权利要求1所述的电子设备，其中，所述主板上还设置有第三开关管，所述第三开关管的第一端与所述第一引脚连接，所述第三开关管的第二端接地；
    所述第一集成电路的第三端通过第一电阻和所述第三开关管的第二端连接；
    其中，所述第一引脚在所述第三开关管断开的情况下的电压和在所述第三开关管导通的情况下的电压不同；
    所述第三开关管用于在被按压时导通，以在所述第一引脚上产生第二信号；
    所述第一集成电路，还用于在所述第一引脚上检测到所述第二信号的情况下，控制所述第一开关管导通，以导通所述电池与所述主板之间的通路。
  6. 根据权利要求5所述的电子设备，其中，所述第一集成电路中还包括：
    电源装置，所述电源装置与所述第一引脚连接；
    其中，所述电源装置用于在所述电池与所述主板之间的通路断开的情况下，向所述第一引脚提供电压。
  7. 根据权利要求6所述的电子设备，其中，所述电源装置包括：
    电源单元，所述电源单元用于向所述第一引脚提供电压；
    第四开关管，所述第四开关管的第一端与所述电源单元连接，所述第四开关管的第二端通过第二电阻与所述第一引脚连接；
    其中，在所述电池与所述主板之间的通路断开的情况下，所述第四开关管导通；在所述电池与所述主板之间的通路导通的情况下，所述第四开关管断开。
  8. 根据权利要求5所述的电子设备，其中，所述第一引脚在所述第三开关管断开的情况下的电压和在所述第三开关管导通的情况下的电压不同；
    在所述第三开关管在第三时长内被按压的情况下，所述第一引脚上产生满足第二条件的所述第二信号；
    所述第一集成电路，具体用于在所述第一引脚上检测到满足所述第二条件的所述第二信号的情况下，控制所述第一开关管导通；
    所述第二条件包括：所述第二信号对应的电压发生一次变化，且在第三时长内所述第二信号对应的电压未发生变化。
  9. 根据权利要求5所述的电子设备，其中，所述第一电阻的阻值大于或等于预设阻值。
  10. 根据权利要求1所述的电子设备，其中，所述第一开关管包括金属氧化物半导体型场效应管。
  11. 一种控制方法，应用于如权利要求1至10任一项所述的电子设备，该方法包括：
    在电子设备的电池与电子设备的主板之间的通路导通的情况下，控制主板的第一控制器调整电子设备的第一集成电路的第一引脚的电压，以在第一引脚上产生第一信号；
    在第一引脚上检测到第一信号的情况下，控制电子设备的第一开关管断开，以断开电池与主板之间的通路。
  12. 一种控制装置，该控制装置包括：
    控制模块，用于在控制装置的电池与控制装置的主板之间的通路导通的情况下，控制主板的第一控制器调整控制装置的第一集成电路的第一引脚的电压，以在第一引脚上产生第一信号；并在第一引脚上检测到第一信号的情况下，控制控制装置的第一开关管断开，以断开电池与主板之间的通路。
  13. 一种电子设备，该电子设备包括处理器和存储器，所述存储器存储可在所述处理器上运行的程序或指令，所述程序或指令被所述处理器执行时实现如权利要求11所述的方法的步骤。
  14. 一种可读存储介质，所述可读存储介质上存储程序或指令，所述程序或指令被处理器执行时实现如权利要求11所述的方法的步骤。
  15. 一种芯片，所述芯片包括处理器和通信接口，所述通信接口和所述处理器耦合，所述处理器用于运行程序或指令，实现如权利要求11所述的方法的步骤。
  16. 一种计算机程序产品，该程序产品被存储在存储介质中，该程序产品被至少一个处理器执行以实现如权利要求11所述的方法的步骤。
PCT/CN2025/104010 2024-06-27 2025-06-26 电子设备 Pending WO2026002153A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202410849560.8 2024-06-27
CN202410849560.8A CN118739493A (zh) 2024-06-27 2024-06-27 电子设备

Publications (1)

Publication Number Publication Date
WO2026002153A1 true WO2026002153A1 (zh) 2026-01-02

Family

ID=92868609

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2025/104010 Pending WO2026002153A1 (zh) 2024-06-27 2025-06-26 电子设备

Country Status (2)

Country Link
CN (1) CN118739493A (zh)
WO (1) WO2026002153A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN118739493A (zh) * 2024-06-27 2024-10-01 维沃移动通信有限公司 电子设备

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20160164328A1 (en) * 2014-12-03 2016-06-09 Samsung Sdi Co., Ltd. Battery pack
CN111782028A (zh) * 2020-06-22 2020-10-16 北京小米移动软件有限公司 电子设备及其控制方法、存储介质
CN114336531A (zh) * 2022-03-09 2022-04-12 荣耀终端有限公司 漏电保护电路和电子设备
CN114928146A (zh) * 2022-06-21 2022-08-19 维沃移动通信有限公司 电子设备
CN118739493A (zh) * 2024-06-27 2024-10-01 维沃移动通信有限公司 电子设备

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20160164328A1 (en) * 2014-12-03 2016-06-09 Samsung Sdi Co., Ltd. Battery pack
CN111782028A (zh) * 2020-06-22 2020-10-16 北京小米移动软件有限公司 电子设备及其控制方法、存储介质
CN114336531A (zh) * 2022-03-09 2022-04-12 荣耀终端有限公司 漏电保护电路和电子设备
CN114928146A (zh) * 2022-06-21 2022-08-19 维沃移动通信有限公司 电子设备
CN118739493A (zh) * 2024-06-27 2024-10-01 维沃移动通信有限公司 电子设备

Also Published As

Publication number Publication date
CN118739493A (zh) 2024-10-01

Similar Documents

Publication Publication Date Title
WO2026002151A1 (zh) 电子设备
CN108631401B (zh) 充电电路、方法、电子设备和存储介质
WO2026002153A1 (zh) 电子设备
CN112701751B (zh) 供电电路、供电方法和电子设备
US20230206878A1 (en) Image obtaining method and apparatus, server, and electronic device
WO2023061333A1 (zh) 泄放电路的控制方法及装置、泄放器件及电子设备
CN113036900B (zh) 显示屏供电电路和电子设备
US9781682B2 (en) Method for power-on control of mobile terminal
CN112713629A (zh) 充电方法、装置及电子设备
US12531425B2 (en) Circuit, power supply method, electronic device, and computer program product
WO2026002148A1 (zh) 电子设备
WO2024222679A1 (zh) 显示控制方法、装置及电子设备
WO2023202524A1 (zh) 充电电路、充电电路的控制方法、装置及移动终端
US20220046534A1 (en) Power control device, method, and terminal device
WO2024001941A1 (zh) 双电池串联电路、电路控制方法和电子设备
WO2023193731A1 (zh) 信号获取方法和电子设备
US12072768B2 (en) Flashing apparatus, booting and recovery apparatus, and electronic device
US20250141475A1 (en) Radio frequency control method and apparatus, and electronic device
WO2023202527A1 (zh) 电源电路的控制方法、装置、电子设备和可读存储介质
WO2024051563A1 (zh) 电子设备、充电设备及充电控制方法
CN115882569A (zh) 充电电路、充电控制方法和电子设备
WO2026092324A1 (zh) 开机控制方法、装置、电子设备及可读存储介质
CN115706428A (zh) 保护电路板、充放电系统、确定电池状态的方法及装置
CN121957693A (zh) 开机控制方法、装置、电子设备及可读存储介质
CN116631465A (zh) 供电方法、装置、电子设备及可读存储介质

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 25826180

Country of ref document: EP

Kind code of ref document: A1