WO2025264258A1 - Semiconductor device and method for manufacturing same - Google Patents

Semiconductor device and method for manufacturing same

Info

Publication number
WO2025264258A1
WO2025264258A1 PCT/US2024/056514 US2024056514W WO2025264258A1 WO 2025264258 A1 WO2025264258 A1 WO 2025264258A1 US 2024056514 W US2024056514 W US 2024056514W WO 2025264258 A1 WO2025264258 A1 WO 2025264258A1
Authority
WO
WIPO (PCT)
Prior art keywords
inner ring
outer ring
active region
removable
contact pad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
PCT/US2024/056514
Other languages
French (fr)
Inventor
Shesh Mani Pandey
Yogesh Kumar Sharma
Dennis Meyer
George DORMAN
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Microchip Technology Inc
Original Assignee
Microchip Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US18/948,736 external-priority patent/US20250385201A1/en
Application filed by Microchip Technology Inc filed Critical Microchip Technology Inc
Publication of WO2025264258A1 publication Critical patent/WO2025264258A1/en
Pending legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00—Arrangements for protection of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/482—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes for individual devices provided for in groups H10D8/00 - H10D48/00, e.g. for power transistors
    • H10W20/484—Interconnections having extended contours, e.g. pads having mesh shape or interconnections comprising connected parallel stripes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W44/00—Electrical arrangements for controlling or matching impedance
    • H10W44/401—Resistive arrangements

Definitions

  • the present disclosure relates generally to semiconductor devices, and more specifically to metal oxide semiconductor field effect transistors (MOSFETs) and methods for manufacturing same to optimize the circuit performance by tuning the gate resistance of the MOSFET.
  • MOSFETs metal oxide semiconductor field effect transistors
  • a semiconductor device may include an active region, an outer ring formed within the active region, the outer ring is operatively connected to the active region, an inner ring formed within the outer ring, a contact pad formed within the inner ring, the contact pad is operatively connected to the inner ring, an insulating region formed between the outer ring and the inner ring, and a removable finger formed between the outer ring and the inner ring, the removable finger operatively connects the outer ring to the inner ring.
  • the active region may comprise an n-type dopant.
  • the active region may comprise a p-type dopant.
  • the contact pad may comprise a metal.
  • the outer ring may comprise polysilicon.
  • the inner ring may comprise polysilicon.
  • the removable finger may comprise polysilicon.
  • a semiconductor device may include an active region, an outer ring formed within the active region, the outer ring is operatively connected to the active region, an inner ring formed within the inner ring, a contact pad formed within the inner ring, the contact pad is operatively connected to the inner ring, an insulating region formed between the outer ring and the inner ring, and a plurality of removable fingers formed between the outer ring and the inner ring, the plurality of removable fingers operatively connects the outer ring to the inner ring.
  • the active region may comprise an n-type dopant.
  • the active region may comprise a p-type dopant.
  • the contact pad may comprise a metal.
  • the outer ring may comprise polysilicon.
  • the inner ring may comprise polysilicon.
  • the plurality of removable fingers may comprise polysilicon.
  • the method may include forming an active region, forming an outer ring within the active region, the outer ring is operatively connected to the active region, forming an inner ring within the outer ring, forming a contact pad within the inner ring, the contact pad is operatively connected to the inner ring, forming an insulating region between the outer ring and the inner ring, and forming a removable finger between the outer ring and the inner ring, the removable finger operatively connecting the outer ring to the inner ring.
  • the active region may comprise an n-type dopant.
  • the active region may comprise a p-type dopant.
  • the contact pad may comprise a metal.
  • the outer ring may comprise polysilicon.
  • the inner ring may comprise polysilicon.
  • the removable finger may comprise polysilicon.
  • the method may comprise forming a plurality of removable fingers.
  • the plurality of removable fingers may comprise poly silicon.
  • FIG. 1 shows an illustration of a semiconductor device with one removable finger according to one or more examples.
  • FIG. 2 shows an illustration of a semiconductor device with a plurality of removable fingers according to one or more examples.
  • FIG. 3A shows an illustration of a semiconductor device with a plurality of removable fingers with one removable finger marked for removal according to one or more examples.
  • FIG. 4A shows an illustration of a semiconductor device with a plurality of removable fingers with three removable fingers marked for removal according to one or more examples.
  • FIG. 4B shows an illustration of the semiconductor device of FIG. 4 A with a plurality of removable fingers with three removable fingers removed according to one or more examples.
  • FIG. 1 shows an illustration of a semiconductor device 10 according to one or more examples.
  • the semiconductor device 10 may represent a transistor, and may be called a MOSFET, without limitation.
  • Semiconductor device 10 may include an active region 20.
  • the active region 20 may comprise an n-type dopant or the active region 20 may comprise a p-type dopant.
  • An outer ring 30 may be formed within the active region 20.
  • the outer ring 30 may be operatively connected to the active region 20.
  • the outer ring 30 may comprise polysilicon.
  • An inner ring 40 may be formed within the outer ring 30.
  • the inner ring 40 may comprise polysilicon.
  • a contact pad 50 may be formed within the inner ring 40.
  • the contact pad 50 may be operatively connected to the inner ring 40.
  • the contact pad 50 may comprise a metal.
  • An insulating region 60 may be formed between the outer ring 30 and the inner ring 40.
  • the insulating region 60 may comprise polysilicon, silicon dioxide or a mixture of polysilicon and silicon dioxide or any other insulating material or a mixture of all these.
  • a removable finger 70 may be formed between the outer ring 30 and the inner ring 40.
  • the removable finger 70 may operatively connect the outer ring 30 to the inner ring 40.
  • the removable finger 70 may comprise polysilicon.
  • there may be a very high resistance for the connection between the active region 20 and the contact pad 50 which is determinative of the resistance of the semiconductor device 10, e.g., the gate resistance of the transistor.
  • FIG. 2 shows an illustration of a semiconductor device 10 according to one or more examples.
  • the semiconductor device 10 may represent a transistor, and may be called a MOSFET, without limitation.
  • Semiconductor device 10 may include an active region 20.
  • the active region 20 may comprise an n-type dopant or the active region 20 may comprise a p-type dopant.
  • An outer ring 30 may be formed within the active region 20.
  • the outer ring 30 may be operatively connected to the active region 20.
  • the outer ring 30 may comprise polysilicon.
  • An inner ring 40 may be formed within the outer ring 30.
  • the inner ring 40 may comprise polysilicon.
  • a contact pad 50 may be formed within the inner ring 40.
  • the contact pad 50 may be operatively connected to the inner ring 40.
  • the contact pad 50 may comprise a metal.
  • An insulating region 60 may be formed between the outer ring 30 and the inner ring 40.
  • the insulating region 60 may comprise polysilicon, silicon dioxide or a mixture of polysilicon and silicon dioxide or any other insulating material or a mixture of all these.
  • a plurality of removable fingers 70 may be formed between the outer ring 30 and the inner ring 40.
  • the plurality of removable fingers 70 may operatively connect the outer ring 30 to the inner ring 40.
  • the plurality of removable fingers 70 may comprise polysilicon.
  • a plurality of removable fingers 70 may be a very low resistance for the connection between the active region 20 and the contact pad 50 which is determinative of the resistance of the semiconductor device 10, e.g., the gate resistance of the transistor.
  • FIGS. 3A-3B show an illustration of a semiconductor device 10 according to one or more examples wherein one of the removable fingers 71 may be removed from the plurality of removable fingers 70 of the semiconductor device 10.
  • the semiconductor device 10 may represent a transistor, and may be called a MOSFET, without limitation.
  • Semiconductor device 10 may include an active region 20.
  • the active region 20 may comprise an n-type dopant or the active region 20 may comprise a p-type dopant.
  • An outer ring 30 may be formed within the active region 20.
  • the outer ring 30 may be operatively connected to the active region 20.
  • the outer ring 30 may comprise polysilicon.
  • An inner ring 40 may be formed within the outer ring 30.
  • the inner ring 40 may comprise polysilicon.
  • a contact pad 50 may be formed within the inner ring 40.
  • the contact pad 50 may be operatively connected to the inner ring 40.
  • the contact pad 50 may comprise a metal.
  • An insulating region 60 may be formed between the outer ring 30 and the inner ring 40.
  • the insulating region 60 may comprise polysilicon, silicon dioxide or a mixture of polysilicon and silicon dioxide or any other insulating material or a mixture of all these.
  • a plurality of removable fingers 70, 71 may be formed between the outer ring 30 and the inner ring 40.
  • the plurality of removable fingers 70, 71 may operatively connect the outer ring 30 to the inner ring 40. As shown in FIG.
  • a removable finger 71 of the plurality of removable fingers 70 may be marked for removal. As shown in FIG. 3B, the marked removable finger 71 of FIG. 3 A of the plurality of removable fingers 70 has been removed. As shown in FIG. 3B vs. 3A, the removal of removable finger 71 from the plurality of the removable fingers 70 increases the resistance for the connection between the active region 20 and the contact pad 50 which is determinative of the resistance of the semiconductor device 10, e.g., the gate resistance of the transistor.
  • FIGS. 4A-4B show an illustration of a semiconductor device 10 according to one or more examples wherein three of the plurality of removable fingers 71 may be removed from the plurality of removable fingers 70 of the semiconductor device 10.
  • the semiconductor device 10 may represent a transistor, and may be called a MOSFET, without limitation.
  • Semiconductor device 10 may include an active region 20.
  • the active region 20 may comprise an n-type dopant or the active region 20 may comprise a p-type dopant.
  • An outer ring 30 may be formed within the active region 20.
  • the outer ring 30 may be operatively connected to the active region 20.
  • the outer ring 30 may comprise polysilicon.
  • An inner ring 40 may be formed within the outer ring 30.
  • the inner ring 40 may comprise polysilicon.
  • a contact pad 50 may be formed within the inner ring 40.
  • the contact pad 50 may be operatively connected to the inner ring 40.
  • the contact pad 50 may comprise a metal.
  • An insulating region 60 may be formed between the outer ring 30 and the inner ring 40.
  • the insulating region 60 may comprise polysilicon, silicon dioxide or a mixture of polysilicon and silicon dioxide or any other insulating material or a mixture of all these.
  • a plurality of removable fingers 70, 71 may be formed between the outer ring 30 and the inner ring 40.
  • the plurality of removable fingers 70, 71 may operatively connect the outer ring 30 to the inner ring 40.
  • three removable fingers 71 of the plurality of removable fingers 70 may be marked for removal.
  • the 71 from the plurality of the removable fingers 70 increases the resistance for the connection between the active region 20 and the contact pad 50 which is determinative of the resistance of the semiconductor device 10, e.g., the gate resistance of the transistor.
  • the method of manufacturing a semiconductor device 10 may represent a transistor, and may be called a MOSFET, without limitation.
  • the method may include forming an active region 20.
  • the active region 20 may comprise an n-type dopant or the active region 20 may comprise a p-type dopant.
  • the method may include forming an outer ring 30 within the active region 20.
  • the outer ring 30 may be operatively connected to the active region 20.
  • the outer ring 30 may comprise polysilicon.
  • the method may include forming an inner ring 40 within the outer ring 30.
  • the inner ring 40 may comprise polysilicon.
  • the method may include forming a contact pad 50 within the inner ring 40.
  • the contact pad 50 may be operatively connected to the inner ring 40.
  • the contact pad 50 may comprise a metal.
  • the method may include forming an insulating region 60 between the outer ring 30 and the inner ring 40.
  • the insulating region 60 may comprise polysilicon, silicon dioxide or a mixture of polysilicon and silicon dioxide or any other insulating material or a mixture of all these.
  • the method may include forming a single removable finger 70 between the outer ring 30 and the inner ring 40 as shown in FIG. 1 or the method may include forming a plurality of removable fingers 70 between the outer ring 30 and the inner ring 40 as shown in FIG. 2.
  • the removable finger 70 of FIG.1 or plurality of removable fingers 70 of FIG. 2 may operatively connect the outer ring 30 to the inner ring 40.
  • the removable finger 70 of FIG. 1 or plurality of removable fingers 70 of FIG. 2 may comprise polysilicon. With only a single removable finger as shown in FIG. 1, there is a very high resistance between the active region 20 and the contact pad 50 which is determinative of the resistance of the semiconductor device 10, e g., the gate resistance of the transistor. Alternatively, a plurality of removable fingers as shown in FIG. 2 may be a very low resistance for the connection between the active region 20 and the contact pad 50 which is determinative of the resistance of the semiconductor device 10, e g., the gate resistance of the transistor.
  • the semiconductor device 10 may have a single removable finger 71 removed to adjust the resistance of the semiconductor device 10 as shown in FIGS. 3A-3B. Alternatively, the semiconductor device 10 may have multiple removable fingers 71, e.g. three removable fingers 71, removed to adjust the resistance of the semiconductor device 10 as shown in FIGS. 4A-4B.

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

A semiconductor device that may include an outer ring formed within an active region wherein the outer ring is operatively connected to the active region. A contact pad formed within an inner ring wherein the contact pad is operatively connected to the inner ring. An insulating region formed between the outer ring and the inner ring. A removable finger formed between the outer ring and the inner ring wherein the removable finger operatively connects the outer ring to the inner ring.

Description

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
CROSS-REFERENCE TO RELATED APPLICATION
[0001] The present application claims priority to U.S. Non-Pro visional Patent Application No. 18/948,736, filed on November 15, 2024, and U.S. Provisional Patent Application No. 63/661,464, filed on June 18, 2024, the contents of which are hereby incorporated by reference in their entirety.
TECHNICAL FIELD
[0002] The present disclosure relates generally to semiconductor devices, and more specifically to metal oxide semiconductor field effect transistors (MOSFETs) and methods for manufacturing same to optimize the circuit performance by tuning the gate resistance of the MOSFET.
SUMMARY
[0003] According to an aspect of one or more examples, there is provided a semiconductor device that may include an active region, an outer ring formed within the active region, the outer ring is operatively connected to the active region, an inner ring formed within the outer ring, a contact pad formed within the inner ring, the contact pad is operatively connected to the inner ring, an insulating region formed between the outer ring and the inner ring, and a removable finger formed between the outer ring and the inner ring, the removable finger operatively connects the outer ring to the inner ring. The active region may comprise an n-type dopant. The active region may comprise a p-type dopant. The contact pad may comprise a metal. The outer ring may comprise polysilicon. The inner ring may comprise polysilicon. The removable finger may comprise polysilicon. [0004] According to an aspect of one or more examples, there is provided a semiconductor device that may include an active region, an outer ring formed within the active region, the outer ring is operatively connected to the active region, an inner ring formed within the inner ring, a contact pad formed within the inner ring, the contact pad is operatively connected to the inner ring, an insulating region formed between the outer ring and the inner ring, and a plurality of removable fingers formed between the outer ring and the inner ring, the plurality of removable fingers operatively connects the outer ring to the inner ring. The active region may comprise an n-type dopant. The active region may comprise a p-type dopant. The contact pad may comprise a metal. The outer ring may comprise polysilicon. The inner ring may comprise polysilicon. The plurality of removable fingers may comprise polysilicon.
[0005] According to an aspect of one or more examples, there is provided method of manufacturing a semiconductor device. The method may include forming an active region, forming an outer ring within the active region, the outer ring is operatively connected to the active region, forming an inner ring within the outer ring, forming a contact pad within the inner ring, the contact pad is operatively connected to the inner ring, forming an insulating region between the outer ring and the inner ring, and forming a removable finger between the outer ring and the inner ring, the removable finger operatively connecting the outer ring to the inner ring. The active region may comprise an n-type dopant. The active region may comprise a p-type dopant. The contact pad may comprise a metal. The outer ring may comprise polysilicon. The inner ring may comprise polysilicon. The removable finger may comprise polysilicon. The method may comprise forming a plurality of removable fingers. The plurality of removable fingers may comprise poly silicon.
BRIEF DESCRIPTION OF DRAWINGS [0006] FIG. 1 shows an illustration of a semiconductor device with one removable finger according to one or more examples.
[0007] FIG. 2 shows an illustration of a semiconductor device with a plurality of removable fingers according to one or more examples.
[0008] FIG. 3A shows an illustration of a semiconductor device with a plurality of removable fingers with one removable finger marked for removal according to one or more examples.
[0009] FIG. 3B shows an illustration of the semiconductor device of FIG. 3A with a plurality of removable fingers with one removable finger removed according to one or more examples.
[0010] FIG. 4A shows an illustration of a semiconductor device with a plurality of removable fingers with three removable fingers marked for removal according to one or more examples.
[0011] FIG. 4B shows an illustration of the semiconductor device of FIG. 4 A with a plurality of removable fingers with three removable fingers removed according to one or more examples.
DETAILED DESCRIPTION OF VARIOUS EXAMPLES
[0012] Reference will now be made in detail to the following various examples, which are illustrated in the accompanying drawings, wherein like reference numerals refer to like elements throughout. The following examples may be in various forms without being limited to the examples set forth herein.
[0013] FIG. 1 shows an illustration of a semiconductor device 10 according to one or more examples. The semiconductor device 10 may represent a transistor, and may be called a MOSFET, without limitation. Semiconductor device 10 may include an active region 20. The active region 20 may comprise an n-type dopant or the active region 20 may comprise a p-type dopant. An outer ring 30 may be formed within the active region 20. The outer ring 30 may be operatively connected to the active region 20. The outer ring 30 may comprise polysilicon. An inner ring 40 may be formed within the outer ring 30. The inner ring 40 may comprise polysilicon. A contact pad 50 may be formed within the inner ring 40. The contact pad 50 may be operatively connected to the inner ring 40. The contact pad 50 may comprise a metal. An insulating region 60 may be formed between the outer ring 30 and the inner ring 40. The insulating region 60 may comprise polysilicon, silicon dioxide or a mixture of polysilicon and silicon dioxide or any other insulating material or a mixture of all these. As shown in FIG. 1, a removable finger 70 may be formed between the outer ring 30 and the inner ring 40. The removable finger 70 may operatively connect the outer ring 30 to the inner ring 40. The removable finger 70 may comprise polysilicon. As shown in FIG. 1, with only a single removable finger 70, there may be a very high resistance for the connection between the active region 20 and the contact pad 50 which is determinative of the resistance of the semiconductor device 10, e.g., the gate resistance of the transistor.
[0014] FIG. 2 shows an illustration of a semiconductor device 10 according to one or more examples. The semiconductor device 10 may represent a transistor, and may be called a MOSFET, without limitation. Semiconductor device 10 may include an active region 20. The active region 20 may comprise an n-type dopant or the active region 20 may comprise a p-type dopant. An outer ring 30 may be formed within the active region 20. The outer ring 30 may be operatively connected to the active region 20. The outer ring 30 may comprise polysilicon. An inner ring 40 may be formed within the outer ring 30. The inner ring 40 may comprise polysilicon. A contact pad 50 may be formed within the inner ring 40. The contact pad 50 may be operatively connected to the inner ring 40. The contact pad 50 may comprise a metal. An insulating region 60 may be formed between the outer ring 30 and the inner ring 40. The insulating region 60 may comprise polysilicon, silicon dioxide or a mixture of polysilicon and silicon dioxide or any other insulating material or a mixture of all these. As shown in FIG. 2, a plurality of removable fingers 70 may be formed between the outer ring 30 and the inner ring 40. The plurality of removable fingers 70 may operatively connect the outer ring 30 to the inner ring 40. The plurality of removable fingers 70 may comprise polysilicon. As shown in FIG. 2, a plurality of removable fingers 70 may be a very low resistance for the connection between the active region 20 and the contact pad 50 which is determinative of the resistance of the semiconductor device 10, e.g., the gate resistance of the transistor.
[0015] FIGS. 3A-3B show an illustration of a semiconductor device 10 according to one or more examples wherein one of the removable fingers 71 may be removed from the plurality of removable fingers 70 of the semiconductor device 10. The semiconductor device 10 may represent a transistor, and may be called a MOSFET, without limitation. Semiconductor device 10 may include an active region 20. The active region 20 may comprise an n-type dopant or the active region 20 may comprise a p-type dopant. An outer ring 30 may be formed within the active region 20. The outer ring 30 may be operatively connected to the active region 20. The outer ring 30 may comprise polysilicon. An inner ring 40 may be formed within the outer ring 30. The inner ring 40 may comprise polysilicon. A contact pad 50 may be formed within the inner ring 40. The contact pad 50 may be operatively connected to the inner ring 40. The contact pad 50 may comprise a metal. An insulating region 60 may be formed between the outer ring 30 and the inner ring 40. The insulating region 60 may comprise polysilicon, silicon dioxide or a mixture of polysilicon and silicon dioxide or any other insulating material or a mixture of all these. As shown in FIGS. 3A-3B, a plurality of removable fingers 70, 71 may be formed between the outer ring 30 and the inner ring 40. The plurality of removable fingers 70, 71 may operatively connect the outer ring 30 to the inner ring 40. As shown in FIG. 3A, a removable finger 71 of the plurality of removable fingers 70 may be marked for removal. As shown in FIG. 3B, the marked removable finger 71 of FIG. 3 A of the plurality of removable fingers 70 has been removed. As shown in FIG. 3B vs. 3A, the removal of removable finger 71 from the plurality of the removable fingers 70 increases the resistance for the connection between the active region 20 and the contact pad 50 which is determinative of the resistance of the semiconductor device 10, e.g., the gate resistance of the transistor.
[0016] FIGS. 4A-4B show an illustration of a semiconductor device 10 according to one or more examples wherein three of the plurality of removable fingers 71 may be removed from the plurality of removable fingers 70 of the semiconductor device 10. The semiconductor device 10 may represent a transistor, and may be called a MOSFET, without limitation. Semiconductor device 10 may include an active region 20. The active region 20 may comprise an n-type dopant or the active region 20 may comprise a p-type dopant. An outer ring 30 may be formed within the active region 20. The outer ring 30 may be operatively connected to the active region 20. The outer ring 30 may comprise polysilicon. An inner ring 40 may be formed within the outer ring 30. The inner ring 40 may comprise polysilicon. A contact pad 50 may be formed within the inner ring 40. The contact pad 50 may be operatively connected to the inner ring 40. The contact pad 50 may comprise a metal. An insulating region 60 may be formed between the outer ring 30 and the inner ring 40. The insulating region 60 may comprise polysilicon, silicon dioxide or a mixture of polysilicon and silicon dioxide or any other insulating material or a mixture of all these. As shown in FIGS. 3A-3B, a plurality of removable fingers 70, 71 may be formed between the outer ring 30 and the inner ring 40. The plurality of removable fingers 70, 71 may operatively connect the outer ring 30 to the inner ring 40. As shown in FIG. 3A, three removable fingers 71 of the plurality of removable fingers 70 may be marked for removal. As shown in FIG. 3B, the three marked removable fingers 71 of FIG. 3 A of the plurality of removable fingers
70 have been removed. As shown in FIG. 3B vs. 3A, the removal of the three removable fingers
71 from the plurality of the removable fingers 70 increases the resistance for the connection between the active region 20 and the contact pad 50 which is determinative of the resistance of the semiconductor device 10, e.g., the gate resistance of the transistor.
[0017] The method of manufacturing a semiconductor device 10 according to one or more examples. The semiconductor device 10 may represent a transistor, and may be called a MOSFET, without limitation. The method may include forming an active region 20. The active region 20 may comprise an n-type dopant or the active region 20 may comprise a p-type dopant. The method may include forming an outer ring 30 within the active region 20. The outer ring 30 may be operatively connected to the active region 20. The outer ring 30 may comprise polysilicon. The method may include forming an inner ring 40 within the outer ring 30. The inner ring 40 may comprise polysilicon. The method may include forming a contact pad 50 within the inner ring 40. The contact pad 50 may be operatively connected to the inner ring 40. The contact pad 50 may comprise a metal. The method may include forming an insulating region 60 between the outer ring 30 and the inner ring 40. The insulating region 60 may comprise polysilicon, silicon dioxide or a mixture of polysilicon and silicon dioxide or any other insulating material or a mixture of all these. The method may include forming a single removable finger 70 between the outer ring 30 and the inner ring 40 as shown in FIG. 1 or the method may include forming a plurality of removable fingers 70 between the outer ring 30 and the inner ring 40 as shown in FIG. 2. The removable finger 70 of FIG.1 or plurality of removable fingers 70 of FIG. 2 may operatively connect the outer ring 30 to the inner ring 40. The removable finger 70 of FIG. 1 or plurality of removable fingers 70 of FIG. 2 may comprise polysilicon. With only a single removable finger as shown in FIG. 1, there is a very high resistance between the active region 20 and the contact pad 50 which is determinative of the resistance of the semiconductor device 10, e g., the gate resistance of the transistor. Alternatively, a plurality of removable fingers as shown in FIG. 2 may be a very low resistance for the connection between the active region 20 and the contact pad 50 which is determinative of the resistance of the semiconductor device 10, e g., the gate resistance of the transistor. The semiconductor device 10 may have a single removable finger 71 removed to adjust the resistance of the semiconductor device 10 as shown in FIGS. 3A-3B. Alternatively, the semiconductor device 10 may have multiple removable fingers 71, e.g. three removable fingers 71, removed to adjust the resistance of the semiconductor device 10 as shown in FIGS. 4A-4B.
[0018] Various examples have been disclosed herein, in connection with the above description and the drawings. It will be understood that it would be unduly repetitious to literally describe and illustrate every combination and sub combination of these examples. Accordingly, all examples may be combined in any way and/or combination, and the present specification, including the drawings, shall be construed to constitute a complete written description of all combinations and subcombinations of the examples described herein, and of the manner and process of making and using them, and shall support claims to any such combination or subcombination.
[0019] It will be appreciated by persons skilied in the art that the examples described herein are not limited to what has been particularly shown and described herein above. In addition, unless mention was made above to the contrary, it should be noted that all of the accompanying drawings are not to scale. A variety of modifications and variations are possible in light of the above teachings.

Claims

What is claimed is:
1. A semiconductor device comprising: an active region; an outer ring formed within the active region, the outer ring is operatively connected to the active region; an inner ring formed within the outer ring; a contact pad formed within the inner ring, the contact pad is operatively connected to the inner ring; an insulating region formed between the outer ring and the inner ring; and a removable finger formed between the outer ring and the inner ring, the removable finger operatively connects the outer ring to the inner ring.
2. The device of claim 1, wherein the active region comprises an n-type dopant.
3. The device of claim 1, wherein the active region comprises a p-type dopant.
4. The device of claim 1, wherein the contact pad comprises a metal.
5. The device of claim 1, wherein the outer ring comprises polysilicon.
6. The device of claim 5, wherein the inner ring comprises polysilicon.
7. The device of claim 6, wherein the removable finger comprises polysilicon.
8. A semiconductor device comprising: an active region; an outer ring formed within the active region, the outer ring is operatively connected to the active region; an inner ring formed within the inner ring; a contact pad formed within the inner ring, the contact pad is operatively connected to the inner ring; an insulating region formed between the outer ring and the inner ring; and a plurality of removable fingers formed between the outer ring and the inner ring, the plurality of removable fingers operatively connects the outer ring to the inner ring.
9. The device of claim 8, wherein the active region comprises an n-type dopant.
10. The device of claim 8, wherein the active region comprises a p-type dopant.
11. The device of claim 8, wherein the contact pad comprises a metal.
12. The device of claim 8, wherein the outer ring comprises polysilicon.
13. The device of claim 12, wherein the inner ring comprises polysilicon.
14. The device of claim 13, wherein the plurality of removable fingers comprises polysilicon.
15. A method of manufacturing a semiconductor device, the method comprising: forming an active region; forming an outer ring within the active region, the outer ring is operatively connected to the active region; forming an inner ring within the outer ring; forming a contact pad within the inner ring, the contact pad is operatively connected to the inner ring; forming an insulating region between the outer ring and the inner ring; and forming a removable finger between the outer ring and the inner ring, the removable finger operatively connecting the outer ring to the inner ring.
16. The method of claim 15, wherein the active region comprises an n-type dopant.
17. The method of claim 15, wherein the active region comprises a p-type dopant.
18. The method of claim 15, wherein the contact pad comprises a metal.
19. The method of claim 15, wherein the outer ring comprises polysilicon.
20. The method of claim 19, wherein the inner ring comprises polysilicon.
21. The method of claim 20, wherein the removable finger comprises polysilicon.
22. The method of claim 15, wherein the method comprises forming a plurality of removable fingers.
PCT/US2024/056514 2024-06-18 2024-11-19 Semiconductor device and method for manufacturing same Pending WO2025264258A1 (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006269633A (en) * 2005-03-23 2006-10-05 Toshiba Corp Power semiconductor device
TW201820630A (en) * 2016-11-28 2018-06-01 聯華電子股份有限公司 Semiconductor component
US20220238644A1 (en) * 2019-06-19 2022-07-28 Power Integrations, Inc. Coupled polysilicon guard rings for enhancing breakdown voltage in a power semiconductor device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006269633A (en) * 2005-03-23 2006-10-05 Toshiba Corp Power semiconductor device
TW201820630A (en) * 2016-11-28 2018-06-01 聯華電子股份有限公司 Semiconductor component
US20220238644A1 (en) * 2019-06-19 2022-07-28 Power Integrations, Inc. Coupled polysilicon guard rings for enhancing breakdown voltage in a power semiconductor device

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