WO2025246775A1 - 显示面板及其制备方法、显示装置 - Google Patents

显示面板及其制备方法、显示装置

Info

Publication number
WO2025246775A1
WO2025246775A1 PCT/CN2025/091817 CN2025091817W WO2025246775A1 WO 2025246775 A1 WO2025246775 A1 WO 2025246775A1 CN 2025091817 W CN2025091817 W CN 2025091817W WO 2025246775 A1 WO2025246775 A1 WO 2025246775A1
Authority
WO
WIPO (PCT)
Prior art keywords
layer
display panel
auxiliary electrode
pixel
pixel unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
PCT/CN2025/091817
Other languages
English (en)
French (fr)
Inventor
冯靖伊
郑克宁
吴桐
朱莉
曹席磊
袁长龙
李浪涛
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
Beijing BOE Technology Development Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
Beijing BOE Technology Development Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by BOE Technology Group Co Ltd, Chengdu BOE Optoelectronics Technology Co Ltd, Beijing BOE Technology Development Co Ltd filed Critical BOE Technology Group Co Ltd
Publication of WO2025246775A1 publication Critical patent/WO2025246775A1/zh
Pending legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/123—Connection of the pixel electrodes to the thin film transistors [TFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H10K59/1315—Interconnections, e.g. wiring lines or terminals comprising structures specially adapted for lowering the resistance
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H10K59/353—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels characterised by the geometrical arrangement of the RGB subpixels

Definitions

  • This application relates to the field of display technology, and in particular to a display panel, its manufacturing method, and a display device.
  • AP advanced patterning
  • the purpose of this application is to provide a display panel, a method for manufacturing the same, and a display device.
  • the technical solution adopted in this application is as follows:
  • a first aspect of this application provides a display panel, the display panel comprising:
  • a pixel defining layer disposed on a substrate, the pixel defining layer including a plurality of first openings and second openings penetrating the pixel defining layer, the first openings defining the light-emitting areas of each sub-pixel unit of the display panel, and the second openings disposed between two adjacent first openings;
  • an isolation pillar is disposed on the pixel defining layer, the orthogonal projection of the isolation pillar on the substrate surrounding the orthogonal projection of the light-emitting region on the substrate.
  • a second opening is added to the pixel delimiting layer, which effectively improves the adhesion of the upper and lower film materials.
  • the display panel further includes:
  • the orthographic projections of the organic material layers corresponding to two adjacent sub-pixels on the substrate partially overlap.
  • the orthographic projections of the cathodes corresponding to two adjacent sub-pixels on the substrate partially overlap.
  • the orthographic projections of the encapsulation layers corresponding to two adjacent sub-pixels on the substrate partially overlap.
  • This implementation method by setting a first opening and a second opening in the pixel defining layer, effectively improves the adhesion of the upper and lower film materials by adding the second opening, reduces the area of the continuously set pixel defining layer, thereby reducing the mutual constraints between materials, avoiding stress accumulation, increasing the flexibility of the display panel, improving the stress resistance of the display panel, preventing the pixel defining layer from breaking when the display panel is subjected to external impact, bending or rolling, and preventing water and oxygen intrusion that could cause device failure, thus improving the reliability of the display panel. At the same time, it also helps the flexible display panel to return to a flat state when unfolded, avoiding creases.
  • the display panel further includes a third opening penetrating the organic material layer, the cathode, and the encapsulation layer, wherein the orthographic projection of the third opening on the substrate overlaps the orthographic projection of the second opening on the substrate.
  • This implementation connects the organic material layer, cathode, and encapsulation layer between at least two light-emitting areas, with the organic material layer and cathode spaced apart. This breaks the path for water and oxygen intrusion, further enhancing the reliability of the display device. Furthermore, by disconnecting part of the encapsulation layer between adjacent light-emitting areas, the stress resistance of the display panel is further enhanced, preventing defects such as breakage of the pixel defining layer, cathode, organic material layer, and encapsulation layer covering the cathode when the display panel is bent, rolled, or subjected to external impact. This further improves the service life of the display panel.
  • the isolation pillar includes a fourth opening whose orthographic projection on the substrate overlaps the orthographic projection of the second opening on the substrate.
  • This implementation method further improves the stress resistance of the display panel by forming a fourth opening on the isolation pillar, while also increasing the adhesion of the encapsulation layer.
  • the isolation pillar includes a first metal layer and a second metal layer stacked sequentially on the pixel defining layer.
  • the sidewalls of the isolation column are formed with an undercut structure.
  • the display panel further includes an anode and an auxiliary electrode disposed in the same layer as the anode and insulated therefrom, wherein the orthographic projection of the auxiliary electrode on the substrate at least partially surrounds the orthographic projection of the anode on the substrate;
  • the cathode is electrically connected to the first metal layer of the isolation pillar, and the first metal layer of the isolation pillar is electrically connected to the auxiliary electrode through a through-hole to the auxiliary electrode.
  • This implementation method sets up an auxiliary electrode, and the cathode is electrically connected to the auxiliary electrode through an isolation column to form a composite cathode. This effectively reduces the resistance of the cathode and enhances its conductivity, thereby reducing the resistance voltage drop of the display panel. Furthermore, in this implementation method, the auxiliary electrode and the anode are set in the same layer, which can be obtained through the same manufacturing process, simplifying the manufacturing process while reducing the resistance voltage drop of the display panel.
  • the display panel further includes a driving circuit layer and an auxiliary electrode disposed on the substrate, wherein the auxiliary electrode is disposed in the same layer as any metal film layer of the driving circuit layer.
  • the cathode is electrically connected to the first metal layer of the isolation pillar, and the first metal layer of the isolation pillar is electrically connected to the auxiliary electrode through a through-hole to the auxiliary electrode.
  • the auxiliary electrode includes a first auxiliary electrode and a second auxiliary electrode that are insulated from each other.
  • the sub-pixel unit includes a first color sub-pixel unit, a second color sub-pixel unit, and a third color sub-pixel unit;
  • the first auxiliary electrode is electrically connected to the cathodes of two of the first color sub-pixel unit, the second color sub-pixel unit, and the third color sub-pixel unit
  • the second auxiliary electrode is electrically connected to the cathode of the other of the first color sub-pixel unit, the second color sub-pixel unit, and the third color sub-pixel unit.
  • the auxiliary electrode includes a third auxiliary electrode, a fourth auxiliary electrode, and a fifth auxiliary electrode that are mutually insulated from each other;
  • the sub-pixel unit includes a first color sub-pixel unit, a second color sub-pixel unit, and a third color sub-pixel unit;
  • the third, fourth, and fifth auxiliary electrodes are electrically connected to the cathodes corresponding to the first, second, and third color sub-pixel units, respectively.
  • the display panel further includes an inter-pixel connection structure disposed on the same layer as the auxiliary electrode;
  • the sub-pixel unit includes a first color sub-pixel unit, a second color sub-pixel unit, and a third color sub-pixel unit;
  • the isolation pillars surrounding the first color sub-pixel unit, the isolation pillars surrounding the second color sub-pixel unit, and the isolation pillars surrounding the third color sub-pixel unit are electrically connected through the inter-pixel connection structure, wherein the first metal layer of at least one isolation pillar is electrically connected to its corresponding auxiliary electrode via a via extending to the auxiliary electrode.
  • the display panel further includes an inter-pixel connection structure disposed on the same layer as the auxiliary electrode;
  • the first metal layer of at least one of the electrically connected isolation pillars is electrically connected to its corresponding auxiliary electrode via a via extending to the auxiliary electrode.
  • the display panel further includes an inter-pixel connection structure disposed on the same layer as the auxiliary electrode;
  • the isolation pillars surrounding sub-pixels of the same color are electrically connected through the inter-pixel connection structure.
  • a second aspect of this application provides a method for manufacturing a display panel based on the first aspect of this invention, comprising:
  • a pixel defining layer is formed by depositing pixel defining layer material on one side of a substrate and etching to form a plurality of first openings and second openings, thereby obtaining the pixel defining layer.
  • the first opening defines the light-emitting area of each sub-pixel unit, and the second opening is disposed between two adjacent first openings.
  • An isolation pillar is formed, wherein the isolation pillar is disposed on the side of the pixel defining layer away from the substrate, and the orthogonal projection of the isolation pillar on the substrate surrounds the orthogonal projection of the light-emitting region on the substrate.
  • the preparation method further includes:
  • An organic material layer is formed covering the anode, the pixel defining layer, and the isolation pillars;
  • a cathode is formed on the organic material layer
  • a third opening is formed that penetrates the organic material layer, the cathode, and the encapsulation layer, and the orthographic projection of the third opening onto the substrate covers the second opening.
  • forming the isolation pillar includes:
  • An isolation pillar material is deposited on the side of the pixel defining layer away from the substrate.
  • the isolation pillar material located in the first opening is etched away to form a fourth opening that penetrates the isolation pillar material, thus forming an isolation pillar.
  • the orthogonal projection of the fourth opening on the substrate covers the second opening.
  • the process includes the following before forming the pixel-bound layer:
  • An anode and an auxiliary electrode disposed in the same layer as the anode are formed on the substrate.
  • the process includes the following before forming the pixel-bound layer:
  • a driving circuit layer and an auxiliary electrode disposed in the same layer as any metal film layer of the driving circuit layer are formed on the substrate.
  • Anode is formed.
  • a third aspect of this application provides a display device, including the display panel provided in the first aspect of this application.
  • the display panel provided in this embodiment adds a second opening to the pixel delimiting layer, which can effectively improve the adhesion of the upper and lower film materials. Furthermore, by reducing the area of the continuously arranged pixel delimiting layer, the mutual constraint between materials is reduced, stress accumulation is avoided, and the stress resistance of the display panel is improved. This prevents the pixel delimiting layer from breaking when the display panel is subjected to external impact, thereby preventing water and oxygen from entering along the fracture and causing device failure, and improving the reliability of the display panel.
  • Figure 1 shows a cross-sectional structural diagram of a display panel provided in one embodiment of this application.
  • Figure 2 shows a schematic diagram of the planar structure of a display panel provided in one embodiment of this application.
  • Figure 3 shows a cross-sectional structural diagram of a display panel provided in one embodiment of this application.
  • Figure 4 shows a top view of a display panel provided in Figure 3 of this application.
  • Figure 5 shows a top view of a display panel provided in one embodiment of this application.
  • Figure 6 shows a schematic cross-sectional view of the display panel provided in Figure 5 of this application along section line A-A'.
  • Figure 7 shows a cross-sectional structural diagram of a display panel provided in one embodiment of this application.
  • Figure 8 shows a cross-sectional structural diagram of a display panel provided in one embodiment of this application.
  • Figure 9 shows a cross-sectional structural diagram of a display panel provided in one embodiment of this application.
  • Figure 10 shows a top view of a display panel provided in one embodiment of this application.
  • Figure 11 shows a top view of a display panel provided in one embodiment of this application.
  • Figure 12 shows a top view of a display panel provided in one embodiment of this application.
  • Figure 13 shows a cross-sectional structural diagram of a display panel provided in one embodiment of this application.
  • Figure 14 shows a cross-sectional structural diagram of a display panel provided in one embodiment of this application.
  • Figure 15 shows a cross-sectional structural schematic diagram of a display panel provided in one embodiment of this application.
  • first may be used herein to describe various components, members, elements, regions, layers, and/or parts
  • these components, members, elements, regions, layers, and/or parts should not be limited by these terms. Rather, these terms are used to distinguish one component, member, element, region, layer, and/or part from another.
  • first component, first member, first element, first region, first layer, and/or first part discussed below may be referred to as a second component, second member, second element, second region, second layer, and/or second part without departing from the teachings of this application.
  • co-layer arrangement means that two layers, components, members, elements, or portions can be formed by the same manufacturing process (e.g., patterning process), and that these two layers, components, members, elements, or portions are generally formed of the same material.
  • co-layer arrangement of two or more functional layers means that these co-layer functional layers can be formed using the same material layer and the same manufacturing process, thereby simplifying the manufacturing process of the display panel.
  • patterning process generally includes steps such as photoresist coating, exposure, development, etching, and photoresist stripping.
  • steps such as photoresist coating, exposure, development, etching, and photoresist stripping.
  • one-step patterning process refers to a process that uses a photomask to form patterned layers, components, or parts.
  • AP aperture Performance
  • This method employs a partitioned etching approach for the organic light-emitting layer (OLED), overcoming the limitation on aperture ratio caused by metal masks in OLED etching.
  • OLED organic light-emitting layer
  • AP technology places great emphasis on the reliability of the light-emitting units. Therefore, the pixel delimiting layer is made of inorganic materials. While this improves the reliability of the light-emitting units, it reduces the flexibility of the pixel delimiting layer. Furthermore, because inorganic materials have weaker stress resistance, the display panel is prone to cracking under external impacts, bending, or rolling.
  • the inorganic pixel boundary layer is relatively thicker than the organic pixel boundary layer.
  • Large-area continuous inorganic pixel boundary layers are more prone to cracking when bent, rolled or impacted. External water and oxygen can erode the light-emitting material through the cracks, reducing the reliability of the display.
  • this application provides a display panel, as shown in FIG1, the display panel including:
  • a pixel defining layer 202 is disposed on one side of the substrate 201.
  • the pixel defining layer includes a plurality of first openings 2021 and second openings 2022 passing through it.
  • the first openings 2021 define the light-emitting area of each sub-pixel unit of the display panel, and the second openings 2022 are disposed between two adjacent first openings 2021.
  • An isolation pillar 204 is disposed on the pixel defining layer.
  • the orthogonal projection of the isolation pillar 204 on the substrate surrounds the orthogonal projection of the light-emitting area on the substrate.
  • the orthogonal projection of the isolation pillar 204 on the substrate 201 covers the orthogonal projection of the second opening 2022 on the substrate 201.
  • this embodiment adds a second opening to the pixel delimiting layer, the adhesion of the upper and lower film layers can be effectively improved. Furthermore, by reducing the area of the continuously arranged pixel delimiting layer, the mutual constraint between materials can be reduced, stress accumulation can be avoided, and the stress resistance of the display panel can be improved. Consequently, it prevents the pixel delimiting layer from breaking when the display panel is subjected to external impact, thus preventing water and oxygen from entering along the fracture and causing device failure, thereby improving the reliability of the display panel.
  • a plurality of anodes 203 arranged in an array are formed on the substrate, followed by deposition of a pixel defining layer material and patterning of a first opening 2021 to expose at least a portion of the anodes 203.
  • at least one second opening 2022 is patterned to prevent defects such as cracks in the weakly resistant pixel defining layer.
  • the second opening 2022 is located between two adjacent first openings 2021, creating a gap between the pixel defining structures surrounding the two pixels adjacent to the second opening 2022, thereby reducing stress in the area where the second opening 2022 is formed when subjected to external impact or bending.
  • the display panel is a flexible display panel, as shown in Figure 2, including a bending region 10B and a first non-bending region 10A and a second non-bending region 10C located at both ends of the bending region along a first direction.
  • the display panel includes:
  • the pixel defining layer 202 located on one side of the flexible substrate, requires each film layer to withstand complex stresses when the display panel is folded.
  • the pixel defining layer includes a first opening 2021 and a second opening 2022.
  • the first opening 2021 defines multiple light-emitting areas of the sub-pixel unit, and the second opening 2022 is located between two adjacent first openings 2021 to enhance the bending resistance of the display panel.
  • the isolation pillar 204 is located on the side of the pixel defining layer away from the flexible substrate, and the orthographic projection of the isolation pillar 204 on the flexible substrate surrounds the orthographic projection of the first opening 2021 on the flexible substrate.
  • This implementation incorporates a first opening 2021 and a second opening 2022 in the pixel defining layer.
  • the adhesion of the upper and lower film layers is effectively improved, and the area of the continuously arranged pixel defining layer is reduced.
  • the second opening 2022 can be located in the bending region 10B of the flexible display panel, but not in the non-bending region.
  • the orthographic projection of the second opening 2022 onto the flexible substrate is within the orthographic projection range of the bending region 10B onto the flexible substrate, and the orthographic projections of the second opening 2022 onto the flexible substrate and the orthographic projections of the non-bending region onto the flexible substrate do not overlap.
  • This implementation only sets a second opening in the bending area, improving the stress resistance of the display panel's bending region and preventing the pixel boundary layer from breaking when the display panel is bent or rolled, thus extending the lifespan of the display panel. Simultaneously, it increases the upper limit of the display panel's pixel density while reducing process difficulty and manufacturing costs.
  • the display panel further includes:
  • An organic material layer 205 covering the anode 203, the pixel defining layer 102, and the isolation pillars 204;
  • Encapsulation layer 207 covering cathode 206.
  • the organic material layer 205 is an organic light-emitting material layer.
  • the organic material layer 205 includes a first portion 2051 and a second portion 2052.
  • the orthographic projection of the first portion 2051 on the substrate 201 covers the orthographic projection of the first opening 2021 on the substrate 201.
  • the first portion 2051 is electrically connected to the anode 203 and the cathode 206, respectively, and emits light by current injection.
  • the second portion 2052 is separated from the first portion 2051 at the boundary of the isolation pillar 204.
  • the second portion 2052 does not have a light-emitting function, and the orthographic projection of the second portion 2052 on the substrate is within the range of the orthographic projection of the pixel defining layer 202 on the substrate.
  • the isolation pillar 204 is used to separate the cathode 206 and the organic material layer 205 of adjacent sub-pixels.
  • the isolation pillar 204 can be an isolation pillar with a passivation layer or a metal isolation pillar.
  • the sidewall of the isolation pillar has an undercut structure, and the connection between the sidewall of the isolation pillar near the light-emitting area and the pixel defining layer is recessed.
  • the isolation pillar 204 is a metal isolation pillar, including a first metal layer 2041 and a second metal layer 2042 stacked sequentially.
  • the material of the first metal layer 2041 is, for example, aluminum
  • the material of the second metal layer 2042 is, for example, titanium. This application does not limit the specific material of the metal isolation pillar.
  • the etching rate of the first metal layer material is greater than the etching rate of the second metal layer material, so that the first metal layer can be recessed relative to the second metal layer during the etching process.
  • the first metal layer material and the second metal layer material are laid in sequence, and an opening is etched to expose the first opening area.
  • the isolation pillar 204 is an isolation pillar with a passivation layer, including a first metal layer, a second metal layer and a passivation layer stacked in sequence.
  • the passivation layer can be a black or transparent organic material.
  • an undercut structure is formed when the isolation pillar material is patterned.
  • the isolation pillar material is treated with an etching solution, since the reaction rate of titanium is slower than that of aluminum during the etching process, as shown in Figure 3, the isolation pillar 204 forms an undercut structure, and the boundary of its second metal layer 2042 extends beyond the boundary of the first metal layer 2041.
  • This implementation features an isolation pillar on the side of the pixel delimiting layer away from the substrate.
  • the isolation pillar has an undercut structure, and the organic material layers of adjacent sub-pixels break at the side of the isolation pillar, separating the organic material layers of different sub-pixels. Furthermore, the breakage of the organic material layer at the side of the isolation pillar cuts off the path for water and oxygen to erode into the organic material used to achieve the light-emitting function, further improving the reliability of the display.
  • the orthographic projections of the organic material layers 205 corresponding to two adjacent sub-pixels on the substrate 201 partially overlap.
  • the orthographic projections of the cathodes 206 corresponding to two adjacent sub-pixels on the substrate 201 partially overlap.
  • the orthographic projections of the encapsulation layers 207 corresponding to two adjacent sub-pixels on the substrate 201 partially overlap.
  • This implementation method creates an overlap between the organic material layer, cathode, and encapsulation layer corresponding to two adjacent sub-pixels, thus increasing the path for water and oxygen intrusion, increasing the contact area between the film layer and the upper film layer, thereby increasing the adhesion and further enhancing the reliability of the display device.
  • the display panel further includes a third opening 2071 that penetrates the organic material layer 205, the cathode 206, and the encapsulation layer 207.
  • the orthographic projection of the third opening 2071 on the substrate covers the orthographic projection of the second opening 2022 on the substrate 201, as shown in Figure 4.
  • This implementation design uses a third opening 2071 to connect the organic material layer, cathode, and encapsulation layer between at least two light-emitting areas. This allows the organic material layer and cathode to be spaced apart, thus blocking the path for water and oxygen intrusion and further enhancing the reliability of the display device. Furthermore, the third opening 2071 partially disconnects the encapsulation layer between adjacent light-emitting areas, further enhancing the stress resistance of the display panel. This prevents defects such as breakage of the pixel defining layer, cathode, organic material layer, and encapsulation layer covering the cathode when the display panel is bent, rolled, or subjected to external impact, thereby further improving the lifespan of the display panel.
  • the isolation pillar 204 includes a fourth opening 2043, the orthographic projection of the fourth opening 2043 on the substrate 201 covering the orthographic projection of the second opening 2022 on the substrate 201.
  • this implementation method etches away the isolation pillar material in unnecessary areas, while retaining the isolation pillar material surrounding each sub-pixel unit.
  • This implementation further improves the stress resistance of the display panel by forming a fourth opening on the isolation pillar, and also increases the adhesion of the encapsulation layer.
  • the display panel further includes a fifth opening, wherein the fifth opening penetrates the encapsulation layer 207, the cathode 206, the organic material layer 205 and the isolation pillar 204, and the orthographic projection of the fifth opening on the substrate covers the first opening 2021.
  • This implementation method forms a fifth opening, disconnecting part of the encapsulation layer, cathode, organic material layer, and isolation pillar, thus connecting the organic material layer, cathode, encapsulation layer, and isolation pillar between at least two light-emitting areas.
  • This breaks the path for water and oxygen intrusion, further enhancing the reliability of the display device.
  • disconnecting the encapsulation layer covering adjacent light-emitting areas further enhances the stress resistance of the display panel, preventing defects such as breakage of the pixel defining layer, cathode, organic material layer, and encapsulation layer covering the cathode when the display panel is bent, rolled, or subjected to external impact, thereby further improving the service life of the display panel.
  • the cathode 206 is a semi-transparent metal layer that easily reflects light; even though it is a semi-transparent metal, it still has a certain amount of reflection.
  • This implementation patternes the cathode, improving the contrast of the display panel while reducing its reflectivity.
  • the display panel further includes a second encapsulation layer 208, which covers the encapsulation layer 207, and the material of the second encapsulation layer extends to the fifth opening and the first opening 2021 and contacts the substrate.
  • the fabrication steps include:
  • a substrate is provided, for example, a flexible substrate
  • An anode 203 is formed on the substrate
  • the anode metal material may be a metal oxide such as ITO (indium tin oxide) or IZO (indium zinc oxide), or a metal or alloy of Ag (silver), Al (aluminum), or Mo (molybdenum).
  • ITO indium tin oxide
  • IZO indium zinc oxide
  • a metal or alloy of Ag silver
  • Al aluminum
  • Mo molybdenum
  • a first opening 2021 for defining a light-emitting area and a second opening 2022 located outside the light-emitting area are formed by a mask plate, the second opening 2022 being located, for example, between two adjacent first openings 2021.
  • the pixel defining layer 202 is made of inorganic material to prevent impurities such as water and oxygen from entering the light-emitting device, thereby improving the reliability of the display panel;
  • the thickness of the pixel defining layer 202 is greater than or equal to 3000 angstroms and less than or equal to 5000 angstroms to further improve the reliability of the display panel;
  • Isolation pillar material is deposited and patterned on the side of pixel defining layer 202 away from substrate 201 to form isolation pillar 204;
  • a layer of aluminum and titanium is deposited, and a fourth opening is formed by etching with a mask and photoresist to obtain an isolation pillar 204 located on the side of the pixel boundary layer away from the substrate between adjacent sub-pixel units;
  • a first-color organic light-emitting material, a cathode, an encapsulation layer material, and two sacrificial layer materials are sequentially deposited on the pixel defining layer 202, the isolation pillar 204, and the anode 203.
  • the first-color organic light-emitting material, the cathode material, and the encapsulation layer material located in the light-emitting area near the first-color sub-pixel unit on the isolation pillars on both sides of the first-color sub-pixel region are patterned and retained.
  • the sacrificial layer material is used to compensate for the loss of the encapsulation layer material in the red sub-pixel region during the subsequent dry etching of green and blue sub-pixels;
  • a dry etching process is used to pattern the first color organic light-emitting material, cathode, encapsulation layer material and two sacrificial layer materials, retaining the first color organic light-emitting material, cathode material, encapsulation layer material and two sacrificial layer materials located in the light-emitting area of the first color sub-pixel unit 301 and on the isolation pillars on both sides of it, close to the light-emitting area of the first color sub-pixel unit 301.
  • a second color organic light-emitting layer material, a cathode material, an encapsulation layer material and a sacrificial layer material are deposited sequentially, and the second color organic light-emitting layer material, cathode material, encapsulation layer material and sacrificial layer material located in the light-emitting area of the second color sub-pixel unit 302 and on the isolation pillars on both sides of it are patterned and retained.
  • a sacrificial layer material is used to compensate for the loss during the subsequent etching of the third color sub-pixel unit
  • a dry etching process is used to pattern the second color organic light-emitting material, the cathode, the encapsulation layer material, and a sacrificial layer material;
  • a third color organic light-emitting layer material, a cathode material, and an encapsulation layer material are sequentially deposited, and the third color organic light-emitting layer material, cathode material, and encapsulation layer material located on the light-emitting area of the third color sub-pixel unit 303 and the isolation pillars on both sides of it are patterned and retained.
  • the thickness of the cathode film layer needs to be controlled within a certain range.
  • the cathode is relatively thin, but a thin cathode results in high resistance, leading to a voltage drop and affecting the display panel's performance.
  • the aforementioned implementations involve segmenting the cathode, dividing the entire cathode surface into multiple parts. This increases the resistance of each segmented cathode, exacerbating the voltage drop phenomenon. Therefore, this embodiment adds an auxiliary electrode electrically connected to the cathode, forming a composite structure with the cathode.
  • the sub-pixel unit includes a first color sub-pixel unit 301, a second color sub-pixel unit 302, and a third color sub-pixel unit 303.
  • the display panel also includes an auxiliary electrode 401 disposed in the same layer as the anode 203 and insulated therefrom, the orthogonal projection of the auxiliary electrode 401 on the substrate at least partially surrounds the orthogonal projection of the anode 203 on the substrate;
  • the cathode 206 is electrically connected to the first metal layer 2041 of the isolation pillar 204, and the first metal layer 2041 of the isolation pillar 204 is electrically connected to the auxiliary electrode 401 through a through hole.
  • This implementation method uses an auxiliary electrode disposed in the same layer as the anode, and the cathode is electrically connected to the auxiliary electrode through an isolation pillar to form a composite cathode. This effectively reduces the cathode resistance and enhances its conductivity, thereby reducing the IR drop of the display panel. Furthermore, the co-layer placement of the auxiliary electrode and anode in this implementation method allows for fabrication using the same process, simplifying the fabrication process while reducing the IR drop of the display panel.
  • the via through to the auxiliary electrode includes a second opening 2022.
  • the first metal layer 2041 of its isolation pillar 204 can also be electrically connected to the auxiliary electrode 401 through the second opening 2022.
  • the manufacturing process of the aforementioned display panel includes:
  • Anode metal material is deposited on one side of the substrate, and patterned to form anode 203 and auxiliary electrode 401;
  • the anode metal material is, for example, metal oxides such as ITO and IZO, or metals such as Ag, Al, and Mo, or their alloys;
  • a first opening 2021 for defining a light-emitting area and a second opening 2022 located outside the light-emitting area are formed by a mask.
  • the second opening 2022 is located between two adjacent first openings 2021 to expose the auxiliary electrode 401;
  • the second opening 2022 is located between two adjacent auxiliary electrodes 401, and the pixel defining layer also forms a through hole 402 to expose at least a portion of the auxiliary electrodes 401.
  • the pixel defining layer 202 is made of inorganic material to prevent impurities such as water and oxygen from entering the light-emitting device, thereby improving the reliability of the display panel;
  • an isolation pillar material is deposited and patterned to form an isolation pillar 204 and an inter-pixel connection structure 403;
  • the cathode 206 is electrically connected to the auxiliary electrode 401 through the first metal layer 2041 of the isolation pillar 204, and the first metal layer 2041 of the isolation pillar 204 is electrically connected to the auxiliary electrode 401 through the through hole 402 or the second opening 2022.
  • An organic material layer 205, a cathode 206, and an encapsulation layer 207 are formed above the pixel defining layer, the isolation pillar 204, and the anode 203.
  • a second encapsulation layer 208 is formed to cover the encapsulation layer 207.
  • the display panel further includes a driving circuit layer and an auxiliary electrode 401 disposed on the side of the substrate 201 near the pixel defining layer 202, wherein the auxiliary electrode 401 is disposed in the same layer as any metal film layer of the driving circuit layer.
  • the cathode is electrically connected to the first metal layer of the isolation pillar, and the first metal layer of the isolation pillar is electrically connected to the auxiliary electrode through a through-hole to the auxiliary electrode.
  • any metal film layer of the driving circuit layer may be a source, drain, gate, or metal light-shielding layer.
  • This implementation method uses an auxiliary electrode disposed on the same layer as any metal film layer of the driving circuit layer.
  • the cathode is electrically connected to the auxiliary electrode through an isolation pillar, forming a composite cathode. This effectively reduces the cathode resistance and enhances its conductivity, thereby reducing the IR drop of the display panel.
  • the co-location of the auxiliary electrode and any metal film layer of the driving circuit layer in this implementation method can be achieved through the same fabrication process, simplifying the fabrication process while reducing the IR drop of the display panel.
  • the auxiliary electrode 401 is a metal or alloy material with excellent conductivity, and the thickness of the auxiliary electrode 401 is negatively correlated with the resistance, and the area of the auxiliary electrode 401 is negatively correlated with the resistance.
  • the electrical connection of auxiliary electrodes at the same potential further increases the area of the auxiliary electrode and reduces the resistance voltage drop of the display panel.
  • the area of the cathode 206 is negatively correlated with its resistance value.
  • the cathodes 206 corresponding to the auxiliary electrodes 401 at the same potential are electrically connected.
  • they can be electrically connected through the metal portion of the isolation pillar 204, or adjacent cathodes 206 can be in direct contact.
  • This implementation further reduces the resistance of the composite structure formed by the electrical connection between the auxiliary electrode and the corresponding cathode by pattern design, thereby further reducing the resistance voltage drop of the display panel.
  • the auxiliary electrode 401 is electrically connected to the corresponding cathode 206 to provide it with the corresponding potential.
  • the sub-pixel unit includes a first color sub-pixel unit 301, a second color sub-pixel unit 302, and a third color sub-pixel unit 303.
  • the cathode 206 is electrically connected to the first metal layer 2041 of the isolation pillar 204.
  • the first metal layer 2041 of the isolation pillar 204 is electrically connected to the auxiliary electrode 401 through a through hole.
  • the auxiliary electrode 401 is disposed in the same layer as the anode 203 or any metal film layer of the driving circuit layer.
  • the sub-pixel unit includes a first color sub-pixel unit 301, a second color sub-pixel unit 302, and a third color sub-pixel unit 303.
  • the cathode 206 is electrically connected to the first metal layer 2041 of the isolation pillar 204, and the first metal layer 2041 is electrically connected to the auxiliary electrode 401 through a via 402.
  • the isolation pillars 204 surrounding the first color sub-pixel unit 301, the second color sub-pixel unit 302, and the third color sub-pixel unit 303 are electrically connected via an inter-pixel connection structure 403. At least one of the isolation pillars 204 or the inter-pixel connection structure 403 is electrically connected via a via to the corresponding auxiliary electrode 401.
  • the cathode resistance is reduced, thus lowering the device's IR drop.
  • the isolation pillars surrounding each sub-pixel unit are electrically connected. At least one of these isolation pillars is electrically connected via a via that extends to the corresponding auxiliary electrode, simplifying circuit wiring, reducing manufacturing costs, and avoiding electromagnetic interference caused by excessive vias.
  • this application proposes to set up multiple auxiliary electrodes, connect each auxiliary electrode to a different potential, and apply a suitable potential according to the characteristics of the light-emitting material, so as to improve the display effect while achieving low power.
  • the auxiliary electrode 401 includes a first auxiliary electrode 4011 and a second auxiliary electrode 4012 that are insulated from each other.
  • the first auxiliary electrode 4011 is electrically connected to the cathodes of two of the first color sub-pixel units 301, the second color sub-pixel unit 302, and the third color sub-pixel unit 303.
  • the second auxiliary electrode 4012 is electrically connected to the cathode of the other one of the first color sub-pixel units 301, the second color sub-pixel unit 302, and the third color sub-pixel unit 303.
  • the first color sub-pixel unit 301 is a blue sub-pixel unit
  • the second color sub-pixel unit 302 is a red sub-pixel unit
  • the third color sub-pixel unit 303 is a green sub-pixel unit.
  • the cathode 206 connected to the first auxiliary electrode 4011 and the cathode 206 connected to the second auxiliary electrode 4012 are insulated from each other in the same layer.
  • the first auxiliary electrode 4011 includes a plurality of interconnected first auxiliary sub-electrodes arranged in the same layer;
  • the second auxiliary electrode 4012 includes a plurality of interconnected second auxiliary sub-electrodes arranged in the same layer.
  • the excitation voltage of the blue light-emitting material is higher than that of the red and green light-emitting materials.
  • the first auxiliary electrode 4011 is electrically connected to the cathode 206 of the green sub-pixel unit and the red sub-pixel unit, and the second auxiliary electrode 4012 is electrically connected to the cathode 206 of the blue sub-pixel unit.
  • the potential connected to the first auxiliary electrode 4011 is lower than that connected to the second auxiliary electrode 4012.
  • This implementation improves the flexibility of the display panel by using patterned pixel defining layers and other film layers, preventing the display panel from breaking when subjected to external stress.
  • each sub-pixel is electrically connected to its corresponding auxiliary electrode, thereby achieving a difference in the cathode potential of each sub-pixel, which reduces the power consumption of the display panel and reduces the resistance voltage drop of the display panel.
  • the display panel further includes an inter-pixel connection structure 403 disposed on the same layer as the isolation pillar 204;
  • the auxiliary electrode 401 includes a first auxiliary electrode 4011 and a second auxiliary electrode 4012 that are insulated from each other.
  • the first auxiliary electrode 4011 is electrically connected to the cathodes of two of the first color sub-pixel units 301, the second color sub-pixel unit 302, and the third color sub-pixel unit 303.
  • the second auxiliary electrode 4012 is electrically connected to the cathode of the other one of the first color sub-pixel units 301, the second color sub-pixel unit 302, and the third color sub-pixel unit 303.
  • Two types of the isolation pillars surrounding the first color sub-pixel unit, the second color sub-pixel unit, and the third color sub-pixel unit are electrically connected via an inter-pixel connection structure 403. At least one of the two connected isolation pillars is electrically connected to an auxiliary electrode via a via 402 extending to the corresponding auxiliary electrode.
  • the inter-pixel connection structure connecting two types of the isolation pillars surrounding the first color sub-pixel unit, the second color sub-pixel unit, and the third color sub-pixel unit is electrically connected to the auxiliary electrode via a via extending to the corresponding auxiliary electrode.
  • the isolation pillars surrounding the first color sub-pixel unit, the second color sub-pixel unit, and the third color sub-pixel unit are electrically connected to each other via an inter-pixel connection structure. At least one of them is electrically connected to its corresponding auxiliary electrode via a via extending to the corresponding auxiliary electrode.
  • the inter-pixel connection structure connecting the isolation pillars of the other type is electrically connected to them via a via extending to the corresponding auxiliary electrode.
  • the first color sub-pixel unit is a blue sub-pixel unit
  • the second color sub-pixel unit is a red sub-pixel unit
  • the third color sub-pixel unit is a green sub-pixel unit.
  • the first auxiliary electrode 4011 is electrically connected to the cathodes of the blue sub-pixel unit and the red sub-pixel unit, and the second auxiliary electrode 4012 has the same cathode potential as the green sub-pixel unit.
  • an isolation pillar surrounding a blue sub-pixel unit and an isolation pillar surrounding a red sub-pixel unit are electrically connected via an inter-pixel connection structure 403.
  • the first metal layer of at least one of the electrically connected isolation pillars extends downward through the pixel delimiting layer and is electrically connected to the first auxiliary electrode 4011.
  • a portion of the inter-pixel connection structure connecting the isolation pillars surrounding the blue sub-pixel and the isolation pillars surrounding the red sub-pixel extends downward through the pixel delimiting layer and is electrically connected to the first auxiliary electrode 4011, so that the cathode potentials of the blue sub-pixel unit and the red sub-pixel unit are the same as the potential of the first auxiliary electrode 4011.
  • the isolation pillars surrounding each green sub-pixel are electrically connected via an inter-pixel connection structure 403.
  • the first metal layer of at least one of the electrically connected isolation pillars surrounding the green sub-pixel is electrically connected to the second auxiliary electrode 4012 via a via extending to the second auxiliary electrode 4012.
  • the inter-pixel connection structure connecting the isolation pillars surrounding each green pixel is electrically connected to the second auxiliary electrode 4012 via a via extending to the second auxiliary electrode 4012, so that the cathode potential corresponding to the green sub-pixel unit is the same as the potential of the second auxiliary electrode 4012.
  • the cathode electrically connected to the first auxiliary electrode 4011 and the cathode electrically connected to the second auxiliary electrode 4012 are insulated from each other.
  • isolation pillars surrounding sub-pixels of the same color are electrically connected via an inter-pixel connection structure 403, and the first metal layer of at least one of the connected isolation pillars is electrically connected to its corresponding auxiliary electrode via a via extending to its corresponding auxiliary electrode.
  • the isolation pillar surrounding the blue sub-pixel unit is electrically connected to the first auxiliary electrode 4011
  • the isolation pillar surrounding the green sub-pixel unit is electrically connected to the second auxiliary electrode 4012
  • the isolation pillar surrounding the red sub-pixel unit is electrically connected to the second auxiliary electrode 4012.
  • This implementation improves the flexibility of the display panel by using patterned pixel defining layers and other film layers, preventing breakage during bending. Simultaneously, by designing different color sub-pixels and their corresponding auxiliary electrodes, it achieves cathode potential differentiation, thereby reducing power consumption and resistance voltage drop. Furthermore, by connecting two types of isolation pillars surrounding the first, second, and third color sub-pixel units, with at least one of these connected isolation pillars electrically connected via a through-hole to the corresponding auxiliary electrode, it achieves cathode potential differentiation and reduces resistance voltage drop while simplifying circuit wiring, lowering manufacturing costs, and avoiding electromagnetic interference caused by excessive vias.
  • the auxiliary electrode 401 includes a third auxiliary electrode 4013, a fourth auxiliary electrode 4014 and a fifth auxiliary electrode 4015 that are mutually insulated from each other.
  • the third auxiliary electrode 4013, the fourth auxiliary electrode 4014, and the fifth auxiliary electrode 4015 are electrically connected to the cathodes 206 of the first color sub-pixel unit 301, the second color sub-pixel unit 302, and the third color sub-pixel unit 303, respectively.
  • Isolation pillars surrounding sub-pixels of the same color are electrically connected through inter-pixel connection structure 403.
  • the cathode corresponding to each sub-pixel is electrically connected to the first metal layer 2041 surrounding the isolation pillar.
  • the first metal layer 2041 of the connected isolation pillars is electrically connected to its corresponding auxiliary electrode through a via to its corresponding auxiliary electrode.
  • the first metal layers of the connected isolation pillars are electrically connected through inter-pixel connection structure.
  • Any inter-pixel connection structure is electrically connected to its corresponding auxiliary electrode through a via to its corresponding auxiliary electrode.
  • This implementation uses a third, fourth, and fifth auxiliary electrode that are mutually insulated, allowing different color sub-pixel units to be electrically connected to their corresponding auxiliary electrodes, thus achieving a differentiated cathode potential design.
  • One embodiment of this application provides a method for manufacturing a display panel, as shown in FIG13, including:
  • Anode 203 is formed
  • a pixel defining layer is formed by depositing pixel defining layer material on one side of the substrate and etching to form a plurality of first openings 2021 and second openings 2022 to obtain a pixel defining layer.
  • the first opening 2021 defines the light-emitting area of each sub-pixel unit, and the second opening 2022 is disposed between two adjacent first openings 2021.
  • An isolation pillar is formed, which is located on the side of the pixel defining layer away from the substrate.
  • the orthogonal projection of the isolation pillar on the substrate surrounds the orthogonal projection of the light-emitting area on the substrate.
  • forming the isolation pillars includes: sequentially depositing a first metal layer 2041 and a second metal layer 2042, and forming openings by wet etching to expose the anode 203 of each sub-pixel unit.
  • the preparation method further includes:
  • An organic material layer 205 is formed, which covers the anode 203, the pixel defining layer 202, and the isolation pillars 204.
  • a cathode 206 is formed, and the cathode 206 is disposed on the organic material layer 205;
  • An encapsulation layer 207 is formed, which covers the cathode 206;
  • a third opening 2071 is formed that penetrates the organic material layer 205, the cathode 206 and the encapsulation layer 207, and the orthogonal projection of the third opening on the substrate covers the second opening 2022.
  • the preparation method includes:
  • Anode 203 is formed
  • a pixel defining layer is formed by depositing pixel defining layer material on one side of the substrate and etching to form a plurality of first openings 2021 and second openings 2022 to obtain a pixel defining layer.
  • the first opening 2021 defines the light-emitting area of each sub-pixel unit, and the second opening 2022 is disposed between two adjacent first openings 2021.
  • Isolation pillar 204 is formed. Isolation pillar material is deposited on the side of the pixel defining layer away from the substrate. Isolation pillar material located in the first opening 2021 is etched away to form a fourth opening 2043 that penetrates the isolation pillar material. Isolation pillar 204 is formed. The orthogonal projection of the fourth opening 2043 on the substrate 201 covers the second opening 2022.
  • An organic material layer 205 is formed, which covers the anode 203, the pixel defining layer 202, and the isolation pillars 204.
  • a cathode 206 is formed, and the cathode 206 is covered with an organic material layer 205;
  • An encapsulation layer 207 is formed, which covers the cathode 206;
  • a third opening is formed that penetrates the organic material layer 205, the cathode 206 and the encapsulation layer 207, and the orthogonal projection of the third opening on the substrate covers the second opening 2022.
  • the preparation method includes:
  • Anode 203 and auxiliary electrode 401 are formed;
  • the auxiliary electrode 401 includes a first auxiliary electrode 4011 and a second auxiliary electrode 4012;
  • a pixel defining layer is formed by depositing pixel defining layer material on one side of the substrate and etching to form a plurality of first openings 2021, second openings 2022 and vias 402 to obtain pixel defining layer 202.
  • the first openings 2021 define the light-emitting area of each sub-pixel unit, and the second openings 2022 are disposed between two adjacent first openings 2021.
  • An isolation pillar 204 and a pixel connection structure disposed in the same layer as the isolation pillar 204 are formed.
  • An isolation pillar material is laid on the side of the pixel defining layer away from the substrate to form a fourth opening 2043 that penetrates the isolation pillar material.
  • the orthogonal projection of the fourth opening 2043 on the substrate 201 covers the second opening 2022.
  • a first-color organic light-emitting material, a cathode, an encapsulation layer material, and two sacrificial layer materials are sequentially deposited on the pixel defining layer, the isolation pillar 204, the inter-pixel connection structure, and the anode 203.
  • the first-color organic light-emitting material, the cathode material, and the encapsulation layer material located in the light-emitting area near the first-color sub-pixel unit on the isolation pillars on both sides of the first-color sub-pixel region are patterned and retained.
  • the sacrificial layer material is used to compensate for the loss of the encapsulation layer material in the red sub-pixel region during the subsequent dry etching of green and blue sub-pixels;
  • a dry etching process is used to pattern the first color organic light-emitting material, cathode, encapsulation layer material and two sacrificial layer materials, retaining the first color organic light-emitting material, cathode material, encapsulation layer material and two sacrificial layer materials located in the light-emitting area of the first color sub-pixel unit 301 and on the isolation pillars on both sides of it, close to the light-emitting area of the first color sub-pixel unit 301.
  • a second color organic light-emitting layer material, a cathode material, an encapsulation layer material and a sacrificial layer material are deposited sequentially, and the second color organic light-emitting layer material, cathode material, encapsulation layer material and sacrificial layer material located in the light-emitting area of the second color sub-pixel unit 302 and on the isolation pillars on both sides of it are patterned and retained.
  • a sacrificial layer material is used to compensate for the loss during the subsequent etching of the third color sub-pixel unit
  • a dry etching process is used to pattern the second color organic light-emitting material, the cathode, the encapsulation layer material, and a sacrificial layer material;
  • a third color organic light-emitting layer material, a cathode material, and an encapsulation layer material are sequentially deposited, and the third color organic light-emitting layer material, cathode material, and encapsulation layer material located on the light-emitting area of the third color sub-pixel unit 303 and the isolation pillars on both sides of it are patterned and retained.
  • the cathode corresponding to each sub-pixel light-emitting unit is electrically connected to the first metal layer 2041 of the isolation pillar surrounding it.
  • the first metal layer surrounding the isolation pillar of the first color sub-pixel unit 301 and the first metal layer surrounding the isolation pillar of the second color sub-pixel unit 302 are electrically connected to the first auxiliary electrode 4011 through a through-hole to the first auxiliary electrode 4011.
  • the first metal layer surrounding the isolation pillar of the third color sub-pixel unit 303 is electrically connected to the second auxiliary electrode 4012 through a through-hole to the second auxiliary electrode 4012.
  • the formation of the isolation pillar 204 also includes the formation of an inter-pixel connection structure 403 disposed on the same layer as the isolation pillar 204.
  • isolation pillar materials are sequentially isolated on the pixel defining layer to form isolation pillars 204 and pixel connection structures 403 disposed on the same layer as the isolation pillars 204.
  • the process includes the following before forming the pixel-bound layer:
  • a driving circuit layer and an auxiliary electrode 401 disposed on the same layer as any metal film layer of the driving circuit layer are formed on the substrate 201.
  • An anode 203 is formed on the driving circuit layer.
  • Another embodiment of this application provides a display device, including the above-described display panel and a controller connected to the display panel.
  • the display device can be any product or component with display function, such as a mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, or navigator. This embodiment does not limit this.

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Abstract

本申请公开一种显示面板及其制备方法、显示装置，涉及显示技术领域。显示面板包括的像素界定层形成有第二开口，可以有效提高上下膜层材料的附着性。并且，通过减小连续设置的像素界定层的面积，减小了材料之间的相互约束，避免了应力积累，提高了显示面板的抗应力性能。由此可以避免显示面板在受到外部冲击时像素界定层发生断裂，进而避免水氧沿断裂处入侵造成器件失效，提高了显示面板的可靠性。

Description

显示面板及其制备方法、显示装置
本公开要求于2024年05月28日提交的申请号为202410671577.9，发明名称为“一种显示面板及其制备方法、显示装置”的中国专利申请的优先权，上述案件的全部内容通过引用结合在本公开中。
技术领域
本申请涉及显示技术领域，特别涉及一种显示面板及其制备方法、显示装置。
背景技术
目前，为了实现高分辨率显示器的制作，通常采用AP(advanced patterning，高级图案设计)技术制备像素单元，采用无掩膜板沉积和光刻技术来形成像素。考虑到产品可靠性，通常采用该技术制备的显示面板中的像素界定层较厚，像素界定层容易受应力影响发生断裂，出现裂纹等，降低了显示面板的可靠性。
发明内容
本申请的目的在于提供一种显示面板及其制备方法、显示装置，本申请采用下述技术方案：
本申请第一方面提供一种显示面板，所述显示面板包括：
衬底；
设置在衬底上的像素界定层，所述像素界定层包括多个贯通所述像素界定层的第一开口和第二开口，所述第一开口限定出所述显示面板的各子像素单元的发光区域，所述第二开口设置于相邻两个第一开口之间；
以及，设置在所述像素界定层上的隔离柱，所述隔离柱在衬底上的正投影环绕所述发光区域在衬底上的正投影。
本实施例在像素界定层增设了第二开口，有效提高上下膜层材料的附着性，通过减小了连续设置的像素界定层的面积，减小了材料之间的相互约束，避免了应力积累，提高了显示面板的抗应力性能，避免显示面板在受到外部冲击时像素界定层发生断裂，水氧沿断裂处入侵造成器件失效，提高了显示面板的可靠性。
在一种可能的实现方式中，所述显示面板还包括：
覆盖所述像素界定层、以及隔离柱的有机材料层；
设置在所述有机材料层上的阴极；
以及，覆盖所述阴极的封装层。
在一种可能的实现方式中，相邻两个子像素对应的有机材料层在所述衬底上的正投影存在部分交叠；
相邻两个子像素对应的阴极在所述衬底上的正投影存在部分交叠；
相邻两个子像素对应的封装层在所述衬底上的正投影存在部分交叠。
本实现方式通过在像素界定层设置有第一开口和第二开口，通过增设第二开口，有效提高了上下膜层材料的附着性，减小了连续设置的像素界定层的面积，从而减小了材料之间的相互约束，避免了应力积累，增加了显示面板的柔性，提高了显示面板的抗应力性能，避免显示面板在受到外部冲击、弯折或卷曲时像素界定层发生断裂，发生水氧入侵造成器件失效，提高了显示面板的可靠性，同时，也有利于柔性显示面板在展开时恢复平整状态，避免出现折痕。
在一种可能的实现方式中，所述显示面板还包括贯通所述有机材料层、阴极和封装层的第三开口，所述第三开口在所述衬底上的正投影覆盖所述第二开口在所述衬底上的正投影。
本实现方式将至少两个发光区域之间的有机材料层、阴极和封装层贯通，使得有机材料层和阴极间隔设置，从而断开了水氧入侵的路径，进一步增强了显示器件的信赖性，并且，将相邻发光区域之间的部分封装层断开，进一步增强了显示面板的抗应力性能，避免显示面板在弯折、卷曲或者受到外力冲击时，像素界定层、阴极、有机材料层和覆盖阴极的封装层发生断裂等不良，进一步提高了显示面板的使用寿命。
在一种可能的实现方式中，所述隔离柱包括第四开口，所述第四开口在所述衬底上的正投影覆盖所述第二开口在所述衬底上的正投影。
本实现方式通过在隔离柱上形成第四开口，进一步提高了显示面板的抗应力性能，同时，增加了封装层的粘附力。
在一种可能的实现方式中，所述隔离柱包括依次层叠设置在所述像素界定层上的第一金属层和第二金属层。
在一种可能的实现方式中，所述隔离柱的侧壁形成有底切结构。
在一种可能的实现方式中，所述显示面板还包括阳极，以及与所述阳极同层设置且绝缘的辅助电极，所述辅助电极在衬底上的正投影至少部分环绕所述阳极在衬底上的正投影；
所述阴极与所述隔离柱的第一金属层电连接，所述隔离柱的第一金属层经贯通至辅助电极的过孔与所述辅助电极电连接。
本实现方式通过设置辅助电极，阴极通过隔离柱与辅助电极电连接，构成复合阴极，有效降低了阴极的电阻，增强了阴极的导电性能，从而降低了显示面板的电阻压降，并且，本实现方式中辅助电极和阳极同层设置，能够通过同一制备工艺得到，在降低了显示面板的电阻压降的同时简化了制备流程。
在一种可能的实现方式中，所述显示面板还包括设置在衬底上的驱动电路层和辅助电极，所述辅助电极与驱动电路层的任一金属膜层同层设置；
所述阴极与所述隔离柱的第一金属层电连接，所述隔离柱的第一金属层经贯通至辅助电极的过孔与所述辅助电极电连接。
在一种可能的实现方式中，所述辅助电极包括绝缘设置的第一辅助电极和第二辅助电极；
所述子像素单元包括第一颜色子像素单元、第二颜色子像素单元和第三颜色子像素单元；
所述第一辅助电极与所述第一颜色子像素单元、第二颜色子像素单元和第三颜色子像素单元中的两种的阴极电连接，所述第二辅助电极与所述第一颜色子像素单元、第二颜色子像素单元和第三颜色子像素单元中的另外一种的阴极电连接。
在一种可能的实现方式中，所述辅助电极包括相互绝缘设置的第三辅助电极、第四辅助电极和第五辅助电极；
所述子像素单元包括第一颜色子像素单元、第二颜色子像素单元和第三颜色子像素单元；
所述第三辅助电极、第四辅助电极和第五辅助电极分别与所述第一颜色子像素单元、第二颜色子像素单元和第三颜色子像素单元对应的阴极电连接。
在一种可能的实现方式中，所述显示面板还包括与所述辅助电极同层设置的像素间连接结构；
所述子像素单元包括第一颜色子像素单元、第二颜色子像素单元和第三颜色子像素单元；
环绕所述第一颜色子像素单元的隔离柱、环绕所述第二颜色子像素的隔离柱和环绕所述第三颜色子像素单元的隔离柱通过所述像素间连接结构电连接，其中至少一个隔离柱的第一金属层经贯通至辅助电极的过孔与其对应的辅助电极电连接。
在一种可能的实现方式中，所述显示面板还包括与所述辅助电极同层设置的像素间连接结构；
环绕所述第一颜色子像素单元的隔离柱、环绕所述第二颜色子像素单元的隔离柱和环绕所述第三颜色子像素单元的隔离柱中的两种通过所述像素间连接结构电连接，电连接的隔离柱中的至少一个的第一金属层经贯通至辅助电极的过孔与其对应的辅助电极电连接。
在一种可能的实现方式中，所述显示面板还包括与所述辅助电极同层设置的像素间连接结构；
各环绕相同颜色子像素的隔离柱之间通过所述像素间连接结构电连接。
本申请第二方面提供一种基于本发明第一方面提供的显示面板的制备方法，包括：
提供一衬底；
形成像素界定层，在衬底一侧铺设像素界定层材料并刻蚀形成多个第一开口和第二开口，得到所述像素界定层，所述第一开口限定出各子像素单元的发光区域，所述第二开口设置于相邻两个第一开口之间；
形成隔离柱，所述隔离柱设置于像素界定层远离衬底一侧，所述隔离柱在所述衬底上的正投影围绕所述发光区域在衬底上的正投影。
在一种可能的实现方式中，所述制备方法还包括：
形成覆盖阳极、所述像素界定层以及所述隔离柱的有机材料层；
在所述有机材料层上形成阴极；
形成覆盖所述阴极的封装层；
形成贯穿所述有机材料层、阴极和封装层的第三开口，所述第三开口在所述衬底上的正投影覆盖所述第二开口。
在一种可能的实现方式中，所述形成隔离柱包括：
在所述像素界定层远离衬底一侧铺设隔离柱材料，刻蚀去除位于所述第一开口内的隔离柱材料，形成贯穿所述隔离柱材料的第四开口，形成隔离柱，所述第四开口在衬底上的正投影覆盖所述第二开口。
在一种可能的实现方式中，在形成像素界定层之前还包括：
在衬底上形成阳极和与阳极同层设置的辅助电极。
在一种可能的实现方式中，在形成像素界定层之前还包括：
在衬底上形成驱动电路层以及与驱动电路层的任一金属膜层同层设置的辅助电极；
形成阳极。
本申请第三方面提供一种显示装置，包括本申请第一方面提供的显示面板。
本申请的有益效果如下：
本实施例提供的显示面板在像素界定层增设了第二开口，可以有效提高上下膜层材料的附着性。并且，通过减小连续设置的像素界定层的面积，减小了材料之间的相互约束，避免了应力积累，提高了显示面板的抗应力性能。由此可以避免显示面板在受到外部冲击时像素界定层发生断裂，进而避免水氧沿断裂处入侵造成器件失效，提高了显示面板的可靠性。
附图说明
下面结合附图对本申请的具体实施方式作进一步详细的说明。
图1示出本申请的一个实施例提供的一种显示面板的剖面结构示意图。
图2示出本申请的一个实施例提供的一种显示面板的平面结构示意图。
图3示出本申请的一个实施例提供的一种显示面板的剖面结构示意图。
图4示出本申请的图3提供的一种显示面板的俯视图。
图5示出本申请的一个实施例提供的一种显示面板的俯视图。
图6示出本申请的图5提供的显示面板沿剖面线A-A’得到的剖面结构示意图。
图7示出本申请的一个实施例提供的一种显示面板的剖面结构示意图。
图8示出本申请的一个实施例提供的一种显示面板的剖面结构示意图。
图9示出本申请的一个实施例提供的一种显示面板的剖面结构示意图。
图10示出本申请的一个实施例提供的一种显示面板的俯视图。
图11示出本申请的一个实施例提供的一种显示面板的俯视图。
图12示出本申请的一个实施例提供的一种显示面板的俯视图。
图13示出本申请的一个实施例提供的一种显示面板的剖面结构示意图。
图14示出本申请的一个实施例提供的一种显示面板的剖面结构示意图。
图15示出本申请的一个实施例提供的一种显示面板的剖面结构示意图。
具体实施方式
本申请中所述的“在……上”、“在……上形成”和“设置在……上”可以表示一层直接形成或设置在另一层上，也可以表示一层间接形成或设置在另一层上，即两层之间还存在其它的层。
需要说明的是，虽然术语“第一”、“第二”等可以在此用于描述各种部件、构件、元件、区域、层和/或部分，但是这些部件、构件、元件、区域、层和/或部分不应受到这些术语限制。而是，这些术语用于将一个部件、构件、元件、区域、层和/或部分与另一个相区分。因而，例如，下面讨论的第一部件、第一构件、第一元件、第一区域、第一层和/或第一部分可以被称为第二部件、第二构件、第二元件、第二区域、第二层和/或第二部分，而不背离本申请的教导。
在本申请中，除非另有说明，所采用的术语“同层设置”指的是两个层、部件、构件、元件或部分可以通过相同制备工艺(例如构图工艺等)形成，并且，这两个层、部件、构件、元件或部分一般由相同的材料形成。例如两个或更多个功能层同层设置指的是这些同层设置的功能层可以采用相同的材料层并利用相同制备工艺形成，从而可以简化显示面板的制备工艺。
在本申请中，除非另有说明，表述“构图工艺”一般包括光刻胶的涂布、曝光、显影、刻蚀、光刻胶的剥离等步骤。表述“一次构图工艺”意指使用一块掩模板形成图案化的层、部件、构件等的工艺。
为了提升高分辨率显示器的显示开口率，采用AP技术制备像素单元，即采用有机发光层分区刻蚀的方法，脱离有机发光层刻蚀被金属掩膜版限制开口率上限的问题，AP技术非常重视发光单元的可靠性。因此，将像素界定层限定为由无机材料制备，虽然提高了发光单元的可靠性但是降低了像素界定层的柔性。并且，由于无机材料对应力的耐受能力较弱，显示面板在受到外部冲击、弯折或卷曲的情况下容易出现裂纹。
进一步地，为了提高可靠性，无机像素界定层的厚度相对有机像素界定层的厚度较大，大面积连续的无机像素界定层在弯折、卷曲或受到撞击的情况下更加容易出现裂纹，外部水氧会经裂纹侵蚀至发光材料，降低了显示器的可靠性。
基于上述考虑，本申请实施例提供了一种显示面板，如图1所示，显示面板包括：
衬底201；
设置在衬底201一侧的像素界定层202，像素界定层包括多个贯通其的第一开口2021和第二开口2022，第一开口2021限定出显示面板的各子像素单元的发光区域，第二开口2022设置于相邻两个第一开口2021之间；
设置在像素界定层上的隔离柱204，隔离柱204在衬底上的正投影环绕发光区域在衬底上的正投影，所述隔离柱204在衬底201上的正投影覆盖所述第二开口2022在衬底201上的正投影。
由于本实施例在像素界定层增设了第二开口，因此可以有效提高上下膜层材料的附着性。并且，通过减小了连续设置的像素界定层的面积，可以减小了材料之间的相互约束，避免了应力积累，提高了显示面板的抗应力性能。进而，避免显示面板在受到外部冲击时像素界定层发生断裂，水氧沿断裂处入侵造成器件失效，提高了显示面板的可靠性。
可选地，在形成显示面板时，在衬底上形成多个阵列排布的阳极203，之后沉积像素界定层材料，并图案化形成第一开口2021，以露出阳极203的至少部分。并且，图案化形成至少一个第二开口2022以避免耐受能力弱的像素界定层产生裂纹等不良，第二开口2022位于相邻的两个第一开口2021之间，以使得围绕与第二开口2022相邻的两个像素的像素界定结构之间存在间隙，从而减小了受到外部冲击或发生弯折时形成第二开口2022的区域的应力。
在一种可能的实现方式中，显示面板为柔性显示面板，如图2所示，包括弯折区10B以及沿第一方向位于弯折区两端的第一非弯折区10A和第二非弯折区10C，显示面板包括：
柔性衬底；
位于柔性衬底一侧的像素界定层202，当对显示面板进行折叠时，各个膜层需要承受复杂的应力。考虑到上述情况，设置像素界定层包括有第一开口2021和第二开口2022，第一开口2021限定出子像素单元的多个发光区域，第二开口2022位于相邻两个第一开口2021之间，以增强显示面板的抗弯折性能；
位于像素界定层远离柔性衬底一侧的隔离柱204，隔离柱204在柔性衬底上的正投影围绕第一开口2021在柔性衬底上的正投影。
本实现方式通过在像素界定层设置有第一开口2021和第二开口2022，通过增设第二开口2022，可以有效的提高上下膜层材料的附着性，减小连续设置的像素界定层的面积。进而可以减小材料之间的相互约束，避免了应力积累，增加了显示面板的柔性，提高了显示面板的抗应力性能。由此，可以避免显示面板在受到外部冲击、弯折或卷曲时像素界定层发生断裂，发生水氧入侵造成器件失效，提高了显示面板的可靠性。同时，也有利于柔性显示面板在展开时恢复平整状态，避免出现折痕。
考虑到像素界定层增设开口对子像素区域密度带来的影响，并且考虑到折叠显示面板的主要应力区域集中在弯折区10B。在一种可能的实现方式中，第二开口2022可以位于柔性显示面板的弯折区10B，且不位于柔性显示面板的非弯折区。可选的，第二开口2022在柔性衬底的正投影位于弯折区10B在柔性衬底的正投影范围内，且第二开口2022在柔性衬底的正投影和非弯折区在柔性衬底的正投影不交叠。
本实现方式仅在弯折区设置第二开口，提高了显示面板弯折区域的抗应力性能，避免了显示面板在弯折或卷曲时像素界定层发生断裂，提高了显示面板的使用寿命。同时，提高了显示面板的像素密度上限，并且降低了工艺难度和制备成本。
在一种可能的实现方式中，如图1和图3所示，显示面板还包括：
覆盖阳极203、像素界定层102、以及隔离柱204的有机材料层205；
覆盖有机材料层205的阴极206；
覆盖阴极206的封装层207。
示例性的，有机材料层205为有机发光材料层。如图3所示，有机材料层205包括第一部分2051和第二部分2052。第一部分2051在衬底201上的正投影覆盖第一开口2021在衬底201上的正投影，第一部分2051分别与阳极203和阴极206电连接，通过电流注入激发第一部分2051发光。第二部分2052与第一部分2051在隔离柱204边界处隔断。第二部分2052不具备发光功能，且第二部分2052在衬底上的正投影位于像素界定层202在衬底上的正投影范围内。
在一种可能的实现方式中，隔离柱204用于隔断相邻子像素的阴极206和有机材料层205，隔离柱204可以为带有钝化层的隔离柱或金属隔离柱。
在一种可能的实现方式中，隔离柱的侧壁形成有底切结构，所述隔离柱的靠近发光区域的侧壁与所述像素界定层的连接处存在内缩。
示例性的，如图3所示，隔离柱204为金属隔离柱，包括依次层叠设置的第一金属层2041和第二金属层2042。第一金属层2041的材料例如为铝，第二金属层2042的材料例如为钛，本申请不对金属隔离柱的具体材料进行限定，第一金属层材料的刻蚀速度大于第二金属层材料的刻蚀速度，以使得在刻蚀过程中能使得第一金属层相对于第二金属层内缩。
在制备金属隔离柱时，依次整层铺设第一金属层材料和第二金属层材料，刻蚀形成开口以暴露第一开口区域。
示例性的，隔离柱204为带有钝化层的隔离柱，包括依次层叠设置的第一金属层、第二金属层和钝化层，钝化层可以为黑色或者透明的有机材料。
由于材料特性的差异，在对隔离柱材料进行图案化时，会形成底切结构。以第一金属层材料为铝，第二金属层的材料为钛为例，例如通过刻蚀液对隔离柱材料进行处理，由于蚀刻过程中钛的反应速率较铝更慢，因此，如图3所示，隔离柱204形成有底切结构，其第二金属层2042的边界超出第一金属层2041的边界。
本实现方式在像素界定层远离衬底一侧设置了隔离柱，隔离柱形成有底切结构，相邻子像素的有机材料层在隔离柱侧面断裂，将不同子像素的有机材料层分隔开。并且，各子像素的有机材料层在隔离柱侧面断裂，切断了水氧沿有机材料层侵蚀进入用于实现发光功能部分的有机材料的路径，进一步提高了显示器的可靠性。
在一种可能的实现方式中，如图1所示，
相邻两个子像素对应的有机材料层205在衬底201上的正投影存在部分交叠；
相邻两个子像素对应的阴极206在所述衬底201上的正投影存在部分交叠；
相邻两个子像素对应的封装层207在所述衬底201上的正投影存在部分交叠。
本实现方式通过设置相邻两个子像素对应的有机材料层、阴极和封装层存在部分交叠，形成有搭接部，增长了水氧入侵的路径，增大了膜层与上方膜层的接触面积，从而增大了的粘附力，进一步增强了显示器件的信赖性。
在一种可能的实现方式中，如图3所示，显示面板还包括贯通有机材料层205、阴极206和封装层207的第三开口2071，第三开口2071在衬底上的正投影覆盖第二开口2022在衬底201上的正投影，其俯视图如图4所示。
本实现方式设计第三开口2071将至少两个发光区域之间的有机材料层、阴极和封装层贯通，使得有机材料层和阴极间隔设置，从而断开了水氧入侵的路径，进一步增强了显示器件的信赖性。并且，设计第三开口2071将相邻发光区域之间的部分封装层断开，进一步增强了显示面板的抗应力性能，避免显示面板在弯折、卷曲或者受到外力冲击时，像素界定层、阴极、有机材料层和覆盖阴极的封装层发生断裂等不良，进一步提高了显示面板的使用寿命。
在一种可能的实现方式中，如图6所示，隔离柱204包括第四开口2043，第四开口2043在衬底201上的正投影覆盖第二开口2022在衬底201上的正投影。
由图5可知，本实现方式将非必要区域的隔离柱材料刻蚀掉，保留围绕各子像素单元的隔离柱材料。
本实现方式通过在隔离柱上形成第四开口，进一步提高了显示面板的抗应力性能，并且，增加了封装层的粘附力。
在一种可能的实现方式中，显示面板还包括第五开口，其中，第五开口贯通封装层207、阴极206、有机材料层205和隔离柱204，第五开口在衬底上的正投影覆盖第一开口2021。
本实现方式通过形成第五开口，断开部分封装层、阴极、有机材料层和隔离柱，将至少两个发光区域之间的有机材料层、阴极、封装层和隔离柱贯通，从而断开了水氧入侵的路径，进一步增强了显示器件的信赖性，并且，将覆盖相邻发光区域的封装层断开，进一步增强了显示面板的抗应力性能，避免显示面板在弯折、卷曲或者受到外力冲击时，像素界定层、阴极、有机材料层和覆盖阴极的封装层发生断裂等不良，进一步提高了显示面板的使用寿命。
在一种可能的实现方式中，阴极206为半透明金属层，容易反射光，即使为半透明金属还是具有一定的反射量。
本实现方式对阴极进行图案化，提高了显示面板的对比度同时降低了显示面板的反射率。
在一种可能的实现方式中，如图6所示，显示面板还包括第二封装层208，第二封装层208覆盖封装层207，第二封装层材料延伸至第五开口以及第一开口2021并与衬底接触。
以制备图6所示的显示面板为例，制备步骤包括：
提供一衬底，衬底例如为柔性衬底；
在衬底上形成阳极203；
可选的，阳极金属材料例如为ITO(氧化铟锡)、IZO(氧化铟锌)等金属氧化物或者Ag(银)、Al(铝)、Mo(钼)等金属或其合金材料。
铺设像素界定层材料，图案化形成像素界定层；
示例性的，通过掩膜板形成用于限定发光区域的第一开口2021以及位于发光区域之外的第二开口2022，第二开口2022例如位于相邻两个第一开口2021之间。
其中，像素界定层202为无机材料，以避免水氧等杂质进入发光器件中，提高了显示面板的可靠性；
像素界定层202的厚度大于等于3000埃并且小于等于5000埃，以进一步提高显示面板的可靠性；
在像素界定层202的远离衬底201一侧沉积隔离柱材料并图案化形成隔离柱204；
示例性的，沉积一层金属铝和金属钛，利用掩膜板和光刻胶刻蚀形成第四开口，得到位于相邻子像素单元之间的像素界定层远离衬底一侧的隔离柱204；
在像素界定层202、隔离柱204以及阳极203上依次沉积第一颜色有机发光材料、阴极、封装层材料和两层牺牲层材料，图案化保留位于第一颜色子像素区域以及其两侧的隔离柱上的靠近第一颜色子像素单元的发光区域的第一颜色有机发光材料、阴极材料和封装层材料；
其中，牺牲层材料用于补偿后续绿色子像素和蓝色子像素干刻时对红色子像素区域的封装层材料造成的损耗；
示例性的，采用干刻工艺对第一颜色有机发光材料、阴极、封装层材料和两层牺牲层材料进行图案化，保留位于第一颜色子像素单元301的发光区域以及其两侧的隔离柱上的靠近第一颜色子像素单元301的发光区域的第一颜色有机发光材料、阴极材料、封装层材料和两层牺牲层材料。
在形成的产品一侧依次沉积第二颜色有机发光层材料、阴极材料、封装层材料和一层牺牲层材料，并图案化保留位于第二颜色子像素单元302的发光区域以及其两侧的隔离柱上的靠近第二颜色子像素单元302的发光区域的第二颜色有机发光层材料、阴极材料、封装层材料和一层牺牲层材料；
一层牺牲层材料用于补偿后续第三颜色子像素单元刻蚀的损耗；
示例性的，采用干刻工艺对第二颜色有机发光材料、阴极、封装层材料和一层牺牲层材料进行图案化；
在形成的产品一侧依次沉积第三颜色有机发光层材料、阴极材料和封装层材料，并图案化保留位于第三颜色子像素单元303的发光区域以及其两侧的隔离柱上的靠近第三颜色子像素单元303的发光区域的第三颜色有机发光层材料、阴极材料和封装层材料。
为了实现更好的显示效果，需要保证阴极的透明度，因此阴极的膜层厚度需要控制在一定范围内。通常阴极的厚度较薄，而较薄厚度的阴极会带来高电阻，进而导致出现电阻压降的问题，影响了显示面板的显示效果。并且，上述实现方式中存在对阴极进行分割的情况，整面铺设的阴极被分割为多份，导致分割后的各个阴极的电阻变大，加重了电阻压降现象，因此本申请实施例增设了与阴极电连接的辅助电极，与阴极结合形成复合结构。
在一种可能的实现方式中，如图7所示，子像素单元包括第一颜色子像素单元301、第二颜色子像素单元302和第三颜色子像素单元303；
显示面板还包括与阳极203同层设置且绝缘的辅助电极401，辅助电极401在衬底上的正投影至少部分环绕阳极203在衬底上的正投影；
阴极206与隔离柱204的第一金属层2041电连接，所述隔离柱204的第一金属层2041经贯通至辅助电极401的过孔与辅助电极401电连接。
本实现方式通过设置与阳极同层设置的辅助电极，阴极通过隔离柱与辅助电极电连接，构成复合阴极，有效降低了阴极的电阻，增强了阴极的导电性能，从而降低了显示面板的电阻压降(IR drop)。并且，本实现方式中辅助电极和阳极同层设置，能够通过同一制备工艺得到，在降低了显示面板的电阻压降的同时简化了制备流程。
应当说明的是，贯通至辅助电极的过孔包括第二开口2022，对于在衬底201上的正投影覆盖第二开口2022在衬底201上的正投影的显示面板，其隔离柱204的第一金属层2041还能够通过第二开口2022与辅助电极401电连接。
上述显示面板的制备流程包括：
在衬底一侧沉积阳极金属材料，图案化形成阳极203和辅助电极401；
具体的，阳极金属材料例如为ITO、IZO等金属氧化物或者Ag、Al、Mo等金属或其合金材料；
铺设像素界定层材料并图案化形成像素界定层202；
示例性的，通过掩膜板形成用于限定发光区域的第一开口2021以及位于发光区域之外的第二开口2022；
示例性的，如图7和图8所示，第二开口2022位于相邻两个第一开口2021之间暴露出辅助电极401；
示例性的，如图9所示，第二开口2022位于相邻两个辅助电极401之间，像素界定层还形成有过孔402，以暴露出至少部分辅助电极401。
其中，像素界定层202为无机材料，以避免水氧等杂质进入发光器件中，提高了显示面板的可靠性；
在像素界定层202的远离衬底一侧沉积隔离柱材料并图案化形成隔离柱204和像素间连接结构403；
示例性的，阴极206通过隔离柱204的第一金属层2041与辅助电极401电连接，隔离柱204的第一金属层2041通过过孔402或第二开口2022与辅助电极401电连接。
在像素界定层、隔离柱204以及阳极203上方形成有机材料层205、阴极206以及封装层207。
形成覆盖封装层207的第二封装层208。
在一种可能的实现方式中，所述显示面板还包括设置于衬底201靠近像素界定层202一侧的驱动电路层和辅助电极401，所述辅助电极401与驱动电路层的任一金属膜层同层设置。
所述阴极与所述隔离柱的第一金属层电连接，所述隔离柱的第一金属层经贯通至辅助电极的过孔与所述辅助电极电连接。
示例性的，所述驱动电路层的任一金属膜层例如为源极、漏极、栅极或金属遮光层。
本实现方式通过设置与驱动电路层的任一金属膜层同层设置的辅助电极，阴极通过隔离柱与辅助电极电连接，构成复合阴极，有效降低了阴极的电阻，增强了阴极的导电性能，从而降低了显示面板的电阻压降(IR drop)。并且，本实现方式中辅助电极和驱动电路层的任一金属膜层同层设置，能够通过同一制备工艺得到，在降低了显示面板的电阻压降的同时简化了制备流程。
在一种可能的实现方式中，辅助电极401为导电性优良的金属或合金材料，辅助电极401的厚度与电阻成负相关，辅助电极401的面积与电阻成负相关。
本实现方式中，辅助电极的面积越大，其电阻越小，与其对应的阴极电连接形成的复合结构的电阻越小，能更大程度上降低电阻压降，相同电位的辅助电极电连接，进一步增大了辅助电极的面积，降低了显示面板的电阻压降。
可选的，阴极206的面积与其电阻值成负相关，为了进一步降低电阻压降，相同电位的辅助电极401对应的阴极206电连接。可选的，可以通过隔离柱204的金属部分电连接，也可以相邻的阴极206直接接触，在进行阴极206图案化时仅将不同电位的辅助电极401对应的阴极206之间形成开口，保留其他位置的阴极206金属材料。
本实现方式通过对辅助电极和阴极进行图案设计，进一步降低了辅助电极和对应阴极电连接形成的复合结构的阻值，进一步降低了显示面板的电阻压降。
在一种可能的实现方式中，辅助电极401与对应的阴极206电连接为其提供对应的电位。
在一种可能的实现方式中，子像素单元包括第一颜色子像素单元301、第二颜色子像素单元302和第三颜色子像素单元303。
阴极206与隔离柱204的第一金属层2041电连接，隔离柱204的第一金属层2041经贯通至辅助电极401的过孔与辅助电极401电连接，所述辅助电极401与阳极203或驱动电路层的任一金属膜层同层设置。
本实现方式中，通过增设辅助电极401并与阴极206电连接，减小了阴极206的电阻，降低了器件的IR Drop。
在一种可能的实现方式中，子像素单元包括第一颜色子像素单元301、第二颜色子像素单元302和第三颜色子像素单元303。
阴极206与隔离柱204的第一金属层2041电连接，第一金属层2041经贯通至辅助电极401的过孔402电连接。
如图10所示，环绕第一颜色子像素单元301的隔离柱204、环绕第二颜色子像素302的隔离柱204和环绕第三颜色子像素单元303的隔离柱204之间通过像素间连接结构403电连接。其中至少一个隔离柱204或像素间连接结构403经贯通至对应的辅助电极401的过孔电连接。
本实现方式中，通过增设辅助电极并与阴极电连接，减小了阴极的电阻，降低了器件的IR Drop，并通过设置像素间连接结构使得环绕各子像素单元的隔离柱之间电连接。其中至少一个隔离柱经贯通至对应的辅助电极的过孔电连接，简化了电路布线，降低制造成本的同时避免了过孔过多导致的电磁干扰。
考虑到在显示器领域中，不同颜色的发光材料的激发电压不同，传统的驱动方式对各个子像素施加的阴极电位相同，无法充分利用各子像素的性能，且造成了一部分功率的浪费，因此本申请实施例提出设置多种辅助电极，对各辅助电极分别接入不同电位，针对发光材料的特性施加适合的电位，在实现低功率的同时提升显示效果。
在一种可能的实现方式中，如图11所示，辅助电极401包括绝缘设置的第一辅助电极4011和第二辅助电极4012。
第一辅助电极4011与第一颜色子像素单元301、第二颜色子像素单元302和第三颜色子像素单元303中的两种的阴极电连接。第二辅助电极4012与第一颜色子像素单元301、第二颜色子像素单元302和第三颜色子像素单元303中的另外一种的阴极电连接。
示例性的，第一颜色子像素单元301为蓝色子像素单元，第二颜色子像素单元302为红色子像素单元，第三颜色子像素单元303为绿色子像素单元。
应当说明的是，在该实现方式中，与第一辅助电极4011相连的阴极206和与第二辅助电极4012相连的阴极206同层绝缘设置。第一辅助电极4011包括多个同层设置的相互连接的第一辅助子电极；第二辅助电极4012包括多个同层设置的相互连接的第二辅助子电极。
具体的，蓝色发光材料的激发电压较红色以及绿色发光材料的激发电压更高，第一辅助电极4011与绿色子像素单元和红色子像素单元的阴极206电连接，第二辅助电极4012与蓝色子像素单元的阴极206电连接，第一辅助电极4011接入的电位较第二辅助电极4012接入的电位更低。
本实现方式通过图案化像素界定层等膜层提高了显示面板的柔性，避免显示面板在受到外部应力时发生断裂的同时，通过设计相互绝缘的第一辅助电极和第二辅助电极，使得各子像素与其对应的辅助电极电连接，实现了各子像素的阴极电位差异化，从而降低了显示面板的功耗，减小了显示面板的电阻压降。
在一种可能的实现方式中，如图11所示，所述显示面板还包括与隔离柱204同层设置的像素间连接结构403；
辅助电极401包括绝缘设置的第一辅助电极4011和第二辅助电极4012。
第一辅助电极4011与第一颜色子像素单元301、第二颜色子像素单元302和第三颜色子像素单元303中的两种的阴极电连接。第二辅助电极4012与第一颜色子像素单元301、第二颜色子像素单元302和第三颜色子像素单元303中的另外一种的阴极电连接。
环绕第一颜色子像素单元的隔离柱、环绕第二颜色子像素单元的隔离柱和环绕第三颜色子像素单元的隔离柱中的两种通过像素间连接结构403电连接。相连接的两种隔离柱中的至少一个经贯通至对应的辅助电极的过孔402与辅助电极电连接。或者，上述连接环绕第一颜色子像素单元的隔离柱、环绕第二颜色子像素单元的隔离柱和环绕第三颜色子像素单元的隔离柱中的两种的像素间连接结构经贯通至对应的辅助电极的过孔与辅助电极电连接。
示例性的，环绕第一颜色子像素单元的隔离柱、环绕第二颜色子像素单元的隔离柱和环绕第三颜色子像素单元的隔离柱中的另一种的各个隔离柱之间通过像素间连接结构电连接。其中至少一个经贯通至对应的辅助电极的过孔与其对应的辅助电极电连接。或者，连接另一种的各个隔离柱的像素间连接结构经贯通至对应的辅助电极的过孔与其电连接。
可选的，第一颜色子像素单元为蓝色子像素单元，第二颜色子像素单元为红色子像素单元，第三颜色子像素单元为绿色子像素单元。
示例性的，第一辅助电极4011与蓝色子像素单元和红色子像素单元的阴极电连接，第二辅助电极4012与绿色子像素单元的阴极电位相同。
示例性的，设置环绕蓝色子像素单元的隔离柱和环绕红色子像素单元的隔离柱通过像素间连接结构403电连接，电连接的隔离柱中的至少一个的第一金属层向下延伸穿过像素界定层与第一辅助电极4011电连接，或，连接环绕蓝色子像素的隔离柱和环绕红色子像素的隔离柱的像素间连接结构的一部分向下延伸穿过像素界定层与第一辅助电极4011电连接，以实现蓝色子像素单元和红色子像素单元的阴极电位与第一辅助电极4011电位相同。
示例性的，各环绕绿色子像素的隔离柱间通过像素间连接结构403电连接，电连接的环绕绿色子像素的隔离柱中的至少一个的第一金属层通过贯通至第二辅助电极4012的过孔与第二辅助电极4012电连接。或，连接各环绕绿色像素的隔离柱的像素间连接结构通过贯通至第二辅助电极4012的过孔与第二辅助电极4012电连接，以实现绿色子像素单元对应的阴极电位与第二辅助电极4012电位相同。
应当说明的是，在该实现方式中，与第一辅助电极4011电连接的阴极和与第二辅助电极4012电连接的阴极绝缘设置。
在一种可能的实现方式中，环绕相同颜色子像素的隔离柱通过像素间连接结构403电连接，相连接的隔离柱中的至少一个的第一金属层通过延伸至其对应的辅助电极的过孔与其对应的辅助电极电连接。
示例性的，环绕蓝色子像素单元的隔离柱与第一辅助电极4011电连接，环绕绿色子像素单元的隔离柱与第二辅助电极4012电连接，环绕红色子像素单元的隔离柱与第二辅助电极4012电连接。
本实现方式通过图案化像素界定层等膜层提高了显示面板的柔性，避免弯折时显示面板内发生断裂的同时，通过设计不同颜色子像素与其对应的辅助电极电连接，实现了阴极电位差异化，从而降低了显示面板的功耗，减小了显示面板的电阻压降。并且，通过设置环绕第一颜色子像素单元的隔离柱、环绕第二颜色子像素单元的隔离柱和环绕第三颜色子像素单元的隔离柱中的两种相连接，相连接的两种隔离柱中的至少一个经贯通至对应的辅助电极的过孔电连接，在实现阴极电位差异化设计和减小电阻压降的同时，简化了电路布线，降低了制造成本的同时避免了过孔过多导致的电磁干扰。
在一种可能的实现方式中，如图12所示，辅助电极401包括相互绝缘设置的第三辅助电极4013、第四辅助电极4014和第五辅助电极4015。
第三辅助电极4013、第四辅助电极4014和第五辅助电极4015分别与第一颜色子像素单元301、第二颜色子像素单元302和第三颜色子像素单元303的阴极206电连接。
围绕相同颜色子像素的隔离柱通过像素间连接结构403电连接，各子像素对应的阴极与环绕其的隔离柱的第一金属层2041电连接，相连接的隔离柱的第一金属层2041经贯通至其对应的辅助电极的过孔与其对应的辅助电极电连接，或者，相连接的隔离柱的第一金属层通过像素间连接结构电连接，任一像素间连接结构经贯通至对应的辅助电极的过孔与其对应的辅助电极电连接。
本实现方式设置相互绝缘的第三辅助电极、第四辅助电极和第五辅助电极，令不同颜色子像素单元与其对应的辅助电极电连接，实现了阴极电位差异化设计。
本申请的一个实施例提供了一种显示面板的制备方法，如图13所示，包括：
提供一衬底201；
形成阳极203；
形成像素界定层，在衬底一侧铺设像素界定层材料并刻蚀形成多个第一开口2021和第二开口2022，得到像素界定层，第一开口2021限定出各子像素单元的发光区域，第二开口2022设置于相邻两个第一开口2021之间；
形成隔离柱，隔离柱设置于像素界定层远离衬底一侧，隔离柱在衬底上的正投影围绕发光区域在衬底上的正投影。
在一种可能的实现方式中，形成隔离柱包括：依次沉积第一金属层2041和第二金属层2042，通过湿法刻蚀形成开口，以暴露出各子像素单元的阳极203。
在一种可能的实现方式中，制备方法还包括：
形成有机材料层205，有机材料层205覆盖阳极203、像素界定层202以及隔离柱204；
形成阴极206，阴极206设置在有机材料层205上；
形成封装层207，封装层207覆盖阴极206；
形成贯穿有机材料层205、阴极206和封装层207的第三开口2071，第三开口在衬底上的正投影覆盖第二开口2022。
在一种可能的实现方式中，如图14所示，制备方法包括：
提供一衬底201；
形成阳极203；
形成像素界定层，在衬底一侧铺设像素界定层材料并刻蚀形成多个第一开口2021和第二开口2022，得到像素界定层，第一开口2021限定出各子像素单元的发光区域，第二开口2022设置于相邻两个第一开口2021之间；
形成隔离柱204，在像素界定层远离衬底一侧铺设隔离柱材料，刻蚀去除位于第一开口2021内的隔离柱材料，形成贯穿隔离柱材料的第四开口2043，形成隔离柱204，第四开口2043在衬底201上的正投影覆盖第二开口2022。
形成有机材料层205，有机材料层205覆盖阳极203、像素界定层202以及隔离柱204；
形成阴极206，阴极206覆盖有机材料层205；
形成封装层207，封装层207覆盖阴极206；
形成贯穿有机材料层205、阴极206和封装层207的第三开口，第三开口在衬底上的正投影覆盖第二开口2022。
在一种可能的实现方式中，如图15所示，制备方法包括：
提供一衬底201；
形成阳极203和辅助电极401；
示例性的，辅助电极401包括第一辅助电极4011和第二辅助电极4012；
形成像素界定层，在衬底一侧铺设像素界定层材料并刻蚀形成多个第一开口2021、第二开口2022和过孔402，得到像素界定层202，第一开口2021限定出各子像素单元的发光区域，第二开口2022设置于相邻两个第一开口2021之间；
形成隔离柱204和与隔离柱204同层设置的像素间连接结构，在像素界定层远离衬底一侧铺设隔离柱材料，形成贯穿隔离柱材料的第四开口2043，第四开口2043在衬底201上的正投影覆盖第二开口2022。
在像素界定层、隔离柱204、像素间连接结构以及阳极203上依次沉积第一颜色有机发光材料、阴极、封装层材料和两层牺牲层材料，图案化保留位于第一颜色子像素区域以及其两侧的隔离柱上的靠近第一颜色子像素单元的发光区域的第一颜色有机发光材料、阴极材料和封装层材料；
其中，牺牲层材料用于补偿后续绿色子像素和蓝色子像素干刻时对红色子像素区域的封装层材料造成的损耗；
示例性的，采用干刻工艺对第一颜色有机发光材料、阴极、封装层材料和两层牺牲层材料进行图案化，保留位于第一颜色子像素单元301的发光区域以及其两侧的隔离柱上的靠近第一颜色子像素单元301的发光区域的第一颜色有机发光材料、阴极材料、封装层材料和两层牺牲层材料。
在形成的产品一侧依次沉积第二颜色有机发光层材料、阴极材料、封装层材料和一层牺牲层材料，并图案化保留位于第二颜色子像素单元302的发光区域以及其两侧的隔离柱上的靠近第二颜色子像素单元302的发光区域的第二颜色有机发光层材料、阴极材料、封装层材料和一层牺牲层材料；
一层牺牲层材料用于补偿后续第三颜色子像素单元刻蚀的损耗；
示例性的，采用干刻工艺对第二颜色有机发光材料、阴极、封装层材料和一层牺牲层材料进行图案化；
在形成的产品一侧依次沉积第三颜色有机发光层材料、阴极材料和封装层材料，并图案化保留位于第三颜色子像素单元303的发光区域以及其两侧的隔离柱上的靠近第三颜色子像素单元303的发光区域的第三颜色有机发光层材料、阴极材料和封装层材料。
示例性的，如图15所示，各子像素发光单元对应的阴极与围绕其的隔离柱的第一金属层2041电连接，围绕第一颜色子像素单元301的隔离柱的第一金属层和围绕第二颜色子像素单元302的隔离柱的第一金属层通过贯穿至第一辅助电极4011的过孔与第一辅助电极4011电连接，围绕第三颜色子像素单元303的隔离柱的第一金属层通过贯穿至第二辅助电极4012的过孔与第二辅助电极4012电连接。
在一种可能的实现方式中，在形成隔离柱204的同时还包括形成与隔离柱204同层设置的像素间连接结构403。
示例性的，在像素界定层上依次隔离柱材料，图案化形成隔离柱204以及与隔离柱204同层设置的像素间连接结构403。
在一种可能的实现方式中，在形成像素界定层之前还包括：
在衬底201上形成驱动电路层以及与驱动电路层的任一金属膜层同层设置的辅助电极401；
在驱动电路层上形成阳极203。
本申请的另一个实施例提供了一种显示装置，包括上述显示面板以及与显示面板连接的控制器。
其中，显示装置可以为手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件，本实施例对此不做限定。
显然，本申请的上述实施例仅仅是为清楚地说明本申请所作的举例，而并非是对本申请的实施方式的限定，对于本领域的普通技术人员来说，在上述说明的基础上还可以做出其它不同形式的变化或变动，这里无法对所有的实施方式予以穷举，凡是属于本申请的技术方案所引伸出的显而易见的变化或变动仍处于本申请的保护范围之列。

Claims (20)

  1. 一种显示面板，其特征在于，所述显示面板包括：
    衬底；
    设置在衬底上的像素界定层，所述像素界定层包括多个贯通所述像素界定层的第一开口和第二开口，所述第一开口限定出所述显示面板的各子像素单元的发光区域，所述第二开口设置于相邻两个第一开口之间；
    以及，设置在所述像素界定层上的隔离柱，所述隔离柱在所述衬底上的正投影环绕所述发光区域在衬底上的正投影。
  2. 根据权利要求1所述的显示面板，其特征在于，所述显示面板还包括：
    覆盖所述像素界定层以及隔离柱的有机材料层；
    设置在所述有机材料层上的阴极；
    以及，覆盖所述阴极的封装层。
  3. 根据权利要求2所示的显示面板，其特征在于，
    相邻两个子像素对应的有机材料层在所述衬底上的正投影存在部分交叠；
    相邻两个子像素对应的阴极在所述衬底上的正投影存在部分交叠；
    相邻两个子像素对应的封装层在所述衬底上的正投影存在部分交叠。
  4. 根据权利要求2所述的显示面板，其特征在于，所述显示面板还包括贯通所述有机材料层、阴极和封装层的第三开口，所述第三开口在所述衬底上的正投影覆盖所述第二开口在所述衬底上的正投影。
  5. 根据权利要求1所述的显示面板，其特征在于，
    所述隔离柱包括第四开口，所述第四开口在所述衬底上的正投影覆盖所述第二开口在所述衬底上的正投影。
  6. 根据权利要求1所述的显示面板，其特征在于，
    所述隔离柱包括依次层叠设置的第一金属层和第二金属层。
  7. 根据权利要求6所述的显示面板，其特征在于，
    所述隔离柱的侧壁形成有底切结构。
  8. 根据权利要求6所述的显示面板，其特征在于，
    所述显示面板还包括阳极，以及与所述阳极同层设置且绝缘的辅助电极，所述辅助电极在衬底上的正投影至少部分环绕所述阳极在衬底上的正投影；
    所述阴极与所述隔离柱的第一金属层电连接，所述隔离柱的第一金属层经贯通至辅助电极的过孔与所述辅助电极电连接。
  9. 根据权利要求6所述的显示面板，其特征在于，
    所述显示面板还包括设置于衬底靠近像素界定层一侧的驱动电路层和辅助电极，所述辅助电极与驱动电路层的任一金属膜层同层设置；
    所述阴极与所述隔离柱的第一金属层电连接，所述隔离柱的第一金属层经贯通至辅助电极的过孔与所述辅助电极电连接。
  10. 根据权利要求8或9所述的显示面板，其特征在于，
    所述辅助电极包括绝缘设置的第一辅助电极和第二辅助电极；
    所述子像素单元包括第一颜色子像素单元、第二颜色子像素单元和第三颜色子像素单元；
    所述第一辅助电极与所述第一颜色子像素单元、第二颜色子像素单元和第三颜色子像素单元中的两种的阴极电连接，所述第二辅助电极与所述第一颜色子像素单元、第二颜色子像素单元和第三颜色子像素单元中的另外一种的阴极电连接。
  11. 根据权利要求8或9所述的显示面板，其特征在于，
    所述辅助电极包括相互绝缘设置的第三辅助电极、第四辅助电极和第五辅助电极；
    所述子像素单元包括第一颜色子像素单元、第二颜色子像素单元和第三颜色子像素单元；
    所述第三辅助电极、第四辅助电极和第五辅助电极分别与所述第一颜色子像素单元、第二颜色子像素单元和第三颜色子像素单元对应的阴极电连接。
  12. 根据权利要求8或9所述的显示面板，其特征在于，
    所述显示面板还包括与所述辅助电极同层设置的像素间连接结构；
    所述子像素单元包括第一颜色子像素单元、第二颜色子像素单元和第三颜色子像素单元；
    环绕所述第一颜色子像素单元的隔离柱、环绕所述第二颜色子像素的隔离柱和环绕所述第三颜色子像素单元的隔离柱通过所述像素间连接结构电连接，其中至少一个隔离柱的第一金属层经贯通至辅助电极的过孔与其对应的辅助电极电连接。
  13. 根据权利要求10所述的显示面板，其特征在于，
    所述显示面板还包括与所述辅助电极同层设置的像素间连接结构；
    环绕所述第一颜色子像素单元的隔离柱、环绕所述第二颜色子像素单元的隔离柱和环绕所述第三颜色子像素单元的隔离柱中的两种通过所述像素间连接结构电连接，电连接的隔离柱中的至少一个的第一金属层经贯通至辅助电极的过孔与其对应的辅助电极电连接。
  14. 根据权利要求11所述的显示面板，其特征在于，
    所述显示面板还包括与所述辅助电极同层设置的像素间连接结构；
    各环绕相同颜色子像素的隔离柱之间通过所述像素间连接结构电连接。
  15. 一种显示装置，其特征在于，
    所述显示装置包括权利要求1-14中任一项所述的显示面板。
  16. 一种权利要求1-14中任一项所述的显示面板的制备方法，其特征在于，包括：
    提供一衬底；
    形成像素界定层，在衬底一侧铺设像素界定层材料并刻蚀形成多个第一开口和第二开口，得到所述像素界定层，所述第一开口限定出各子像素单元的发光区域，所述第二开口设置于相邻两个第一开口之间；
    形成隔离柱，所述隔离柱设置于像素界定层远离衬底一侧，所述隔离柱在所述衬底上的正投影围绕所述发光区域在衬底上的正投影。
  17. 根据权利要求16所述的制备方法，其特征在于，所述制备方法还包括：
    形成覆盖阳极、所述像素界定层以及所述隔离柱的有机材料层；
    在所述有机材料层上形成阴极；
    形成覆盖所述阴极的封装层；
    形成贯穿所述有机材料层、阴极和封装层的第三开口，所述第三开口在所述衬底上的正投影覆盖所述第二开口。
  18. 根据权利要求16所述的制备方法，其特征在于，所述形成隔离柱包括：
    在所述像素界定层远离衬底一侧铺设隔离柱材料，刻蚀去除位于所述第一开口内的隔离柱材料，形成贯穿所述隔离柱材料的第四开口，形成隔离柱，所述第四开口在衬底上的正投影覆盖所述第二开口。
  19. 根据权利要求16所述的制备方法，其特征在于，
    在形成像素界定层之前还包括：
    在衬底上形成阳极和与阳极同层设置的辅助电极。
  20. 根据权利要求16所述的制备方法，其特征在于，
    在形成像素界定层之前还包括：
    在衬底上形成驱动电路层以及与驱动电路层的任一金属膜层同层设置的辅助电极；
    在驱动电路层上形成阳极。
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CN108565347A (zh) * 2018-04-24 2018-09-21 京东方科技集团股份有限公司 一种oled基板及其制备方法
CN116782699A (zh) * 2023-07-31 2023-09-19 京东方科技集团股份有限公司 显示面板及其制作方法、显示装置

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CN108565347A (zh) * 2018-04-24 2018-09-21 京东方科技集团股份有限公司 一种oled基板及其制备方法
CN116782699A (zh) * 2023-07-31 2023-09-19 京东方科技集团股份有限公司 显示面板及其制作方法、显示装置

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